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Published June 1, 2014 | Version v1
Conference paper Open

A 135–160 GHz balanced frequency doubler in 45 nm CMOS with 3.5 dBm peak power

Authors/Creators

  • Lin, Hsin-Chang
  • Rebeiz, Gabriel M.

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DOI
10.1109/mwsym.2014.6848544
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10.1109/mwsym.2014.6848544

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Created
June 5, 2018
Modified
August 2, 2024

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