Published December 3, 2017 | Version v1

Polyhedral-based Dynamic Loop Pipelining for High-Level Synthesis

  • 1. Imperial College London
  • 2. Xilinx

Description

This data set contains the results presented in the paper "Polyhedral-based Dynamic Loop Pipelining for High-Level Synthesis", to be published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

Files

PolyDLP_result_collection.zip

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