Logical infidelity after applying a logical T gate to different input states
t_gate_input_state,exp,exp_errorbar,sim,sim_errobar
0,0.15812265923129765,-0.021127394127783305 +0.01758466541364545,0.08117358243539607,0.0012739395274113407
1,0.10394214522188461,-0.01492169752605399 +0.01619000788675895,0.08649102542991893,0.0012825953483081112
+,0.13243085807900568,-0.01811908449023547 +0.017391268345596567,0.08644152795523596,0.001282515741423837
+i,0.021848739511484694,-0.006722688916972475 +0.005042016799098881,0.03381999999999996,0.0005716310663356216