Address spaces editor contains the summary of the address spaces of the component. This editor can be used to add and remove address spaces to the containing component.
Address space defines the addressable memory space that can be accessed through
a master bus interface. It is the programmer's view to the rest of the system.
Note: Address spaces are actually instance-specific concepts (what other units are
there and what are their addresses) rather than component-specific. Nevertheless, IP-XACT standard
defines address space inside a component, although it is seldom a reusable element.
Name is a mandatory identifier for the address space.
Addressable unit bits specifies the number of bits each address increment contains, e.g. 8 bits or 32 bits. The AUB is mandatory if the address space contains a local memory map. AUB is 8 by default.
Range is mandatory and defines the size of the address space in addressable units. In other words, it is the number of separate addresses in the address space.
Width is mandatory and defines the data width of a row in bits thus defining the maximum size for a single transfer.
Master interface binding shows the master bus interfaces bound to the address space. The binding can be set in the bus interface editor.
Is present is optional and allows enabling/disabling of a address space presence in a component. Value 1 indicates that the address space is present in the component whereas value 0 marks the address space to be treated as if it does not exist. Is present can be given as a SystemVerilog expression, but it must evaluate to 1 or 0.
Description is an optional field for textual description of the address space.
Address spaces editor contains a context menu (right mouse button) providing following options:
EXAMPLE. The address space AS0 defines the available address space of the whole system
when accessed through bus interface MainIF. This is what the component CPU0 requires
of the system, but the components connected to MainIF may be different.