Data Sheet
8
Low power
Supply current 800 μA/amplifier
Fully specified at +2.7 V, +5 V, and ±5 V supplies High speed and fast settling on 5 V
NC
–IN
+IN
–VS
1
7
2
–
6
3
+
5
4
AD8031
NC = NO CONNECT
NC
+VS OUT NC
OUT1 1
–IN1 2
3
01056-001
+IN1
–VS 4
AD8032
+ –
8 +VS
7 OUT2
01056-002
6 –IN2
5 +IN2
80 MHz, −3 dB bandwidth (G = +1) 30 V/μs slew rate
125 ns settling time to 0.1%
Figure 1. 8-Lead PDIP (N) and SOIC_N (R)
Figure 2. 8-Lead PDIP (N), SOIC_N (R), and MSOP (RM)
Rail-to-rail input and output
No phase reversal with input 0.5 V beyond supplies
VOUT 1
AD8031
5 +VS
Input CMVR extends beyond rails by 200 mV Output swing to within 20 mV of either rail
Low distortion
–VS 2
+IN 3
+ –
01056-003
4 –IN
−62 dB @ 1 MHz, VO = 2 V p-p
−86 dB @ 100 kHz, VO = 4.6 V p-p
Output current: 15 mA
High grade option: VOS (maximum) = 1.5 mV
High speed, battery-operated systems High component density systems Portable test instruments
A/D buffers Active filters
High speed, set-and-demand amplifiers
Figure 3. 5-Lead SOT-23 (RJ-5)
Operating on supplies from +2.7 V to +12 V and dual supplies up to ±6 V, the AD8031/AD8032 are ideal for a wide range of applications, from battery-operated systems with large bandwidth requirements to high speed systems where component density requires lower power dissipation. The AD8031/AD8032 are available in 8-lead PDIP and 8-lead SOIC_N packages and operate over the industrial temperature range of −40°C to
VIN = 4.85V p-p
+85°C. The AD8031A is also available in the space-saving 5-lead SOT-23 package, and the AD8032A is available in an 8-lead MSOP package.
The AD8031 (single) and AD8032 (dual) single-supply, voltage feedback amplifiers feature high speed performance with
80 MHz of small signal bandwidth, 30 V/μs slew rate, and 125 ns settling time. This performance is possible while consuming less than 4.0 mW of power from a single 5 V supply. These features
2µs/DIV
2µs/DIV
1V/DIV
1V/DIV
VOUT = 4.65V p-p G = +1
increase the operation time of high speed, battery-powered systems without compromising dynamic performance.
Figure 4. Input VIN Figure 5. Output VOUT
01056-004
01056-005
+5V
1kΩ
The products have true single-supply capability with rail-to-rail –
input and output characteristics and are specified for +2.7 V, +5 V,
VOUT
and ±5 V supplies. The input voltage range can extend to 500 mV beyond each rail. The output voltage swings to within 20 mV of
VIN +
1.7pF
01056-006
+2.5V
each rail providing the maximum output dynamic range.
The AD8031/AD8032 also offer excellent signal quality for only 800 μA of supply current per amplifier; THD is −62 dBc with a 2 V p-p, 1 MHz output signal, and –86 dBc for a 100 kHz,
4.6 V p-p signal on +5 V supply. The low distortion and fast settling time make them ideal as buffers to single-supply ADCs.
Figure 6. Rail-to-Rail Performance at 100 kHz
Rev. G Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedby Analog Devicesforitsuse, norforanyinfringements ofpatents orother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com
Typical Performance Characteristics 7
Overdriving the Input Stage 13
Output Stage, Open-Loop Gain and Distortion vs. Clearance from Power Supply 14
A 2 MHz Single-Supply, Biquad Band-Pass Filter 16
High Performance, Single-Supply Line Driver 16
3/14—Rev. F to Rev. G
Changes to Second Paragraph of Theory of Operation Section... 13 Changes to Ordering Guide 20
8/13—Rev. E to Rev. F
Changed Input Current Noise at f = 100 kHz from 2.4 pA/√Hz to 0.4 pA/√Hz (Throughout) 3
6/13—Rev. D to Rev. E
Changes to DC Performance Parameter, Table 1 3
Updated Outline Dimensions 19
Changes to Ordering Guide 20
11/08—Rev. C to Rev. D
Change to Table 3 Column Heading 5
Change to Ordering Guide 20
7/06—Rev. B to Rev. C
Updated Format..................................................................Universal
Updated Outline Dimensions 18
Change to Ordering Guide 20
9/99—Rev. A to Rev. B
@ TA = 25°C, VS = 2.7 V, RL = 1 kΩ to 1.35 V, RF = 2.5 kΩ, unless otherwise noted.
Table 1.
Parameter | Conditions | Min Typ Max | Min Typ Max | Unit | ||||
DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth Slew Rate Settling Time to 0.1% | G = +1, VO < 0.4 V p-p G = −1, VO = 2 V step G = −1, VO = 2 V step, CL = 10 pF | 54 25 | 80 30 125 | 54 25 | 80 30 125 | MHz V/µs ns | ||
DISTORTION/NOISE PERFORMANCE | ||||||||
Total Harmonic Distortion | fC = 1 MHz, VO = 2 V p-p, G = +2 | −62 | −62 | dBc | ||||
fC = 100 kHz, VO = 2 V p-p, G = +2 | −86 | −86 | dBc | |||||
Input Voltage Noise | f = 1 kHz | 15 | 15 | nV/√Hz | ||||
Input Current Noise | f = 100 kHz | 0.4 | 0.4 | pA/√Hz | ||||
f = 1 kHz | 5 | 5 | pA/√Hz | |||||
Crosstalk (AD8032 Only) | f = 5 MHz | −60 | −60 | dB | ||||
DC PERFORMANCE | ||||||||
Input Offset Voltage | VCM = VCC/2; VOUT = 1.35 V | ±1 | ±6 | ±0.5 | ±1.5 | mV | ||
TMIN to TMAX | ±6 | ±10 | ±1.6 | ±2.5 | mV | |||
Offset Drift | VCM = VCC/2; VOUT = 1.35 V | 10 | 10 | µV/°C | ||||
Input Bias Current | VCM = VCC/2; VOUT = 1.35 V | 0.45 | 2 | 0.45 | 2 | µA | ||
TMIN to TMAX | 2.2 | 2.2 | µA | |||||
Input Offset Current | 50 | 500 | 50 | 500 | nA | |||
Open-Loop Gain | VCM = VCC/2; VOUT = 0.35 V to 2.35 V | 76 | 80 | 76 | 80 | dB | ||
TMIN to TMAX | 74 | 74 | dB | |||||
INPUT CHARACTERISTICS | ||||||||
Common-Mode Input Resistance | 40 | 40 | MΩ | |||||
Differential Input Resistance | 280 | 280 | kΩ | |||||
Input Capacitance | 1.6 | 1.6 | pF | |||||
Input Voltage Range | −0.5 to | −0.5 to | V | |||||
+3.2 | +3.2 | |||||||
Input Common-Mode Voltage Range | −0.2 to | −0.2 to | V | |||||
+2.9 | +2.9 | |||||||
Common-Mode Rejection Ratio | VCM = 0 V to 2.7 V | 46 | 64 | 46 | 64 | dB | ||
VCM = 0 V to 1.55 V | 58 | 74 | 58 | 74 | dB | |||
Differential Input Voltage | 3.4 | 3.4 | V | |||||
OUTPUT CHARACTERISTICS | ||||||||
Output Voltage Swing Low | RL = 10 kΩ | 0.05 | 0.02 | 0.05 | 0.02 | V | ||
Output Voltage Swing High | 2.6 | 2.68 | 2.6 | 2.68 | V | |||
Output Voltage Swing Low | RL = 1 kΩ | 0.15 | 0.08 | 0.15 | 0.08 | V | ||
Output Voltage Swing High | 2.55 | 2.6 | 2.55 | 2.6 | V | |||
Output Current | 15 | 15 | mA | |||||
Short Circuit Current | Sourcing | 21 | 21 | mA | ||||
Sinking | −34 | −34 | mA | |||||
Capacitive Load Drive | 15 | 15 | pF | |||||
POWER SUPPLY | ||||||||
Operating Range | 2.7 | 12 | 2.7 | 12 | V | |||
Quiescent Current per Amplifier | 750 | 1250 | 750 | 1250 | μA | |||
Power Supply Rejection Ratio | VS− = 0 V to −1 V or VS+ = +2.7 V to +3.7 V | 75 | 86 | 75 | 86 | dB |
@ TA = 25°C, VS = 5 V, RL = 1 kΩ to 2.5 V, RF = 2.5 kΩ, unless otherwise noted.
Table 2.
Parameter | Conditions | Min Typ Max | Min Typ Max | Unit | ||||
DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth Slew Rate Settling Time to 0.1% | G = +1, VO < 0.4 V p-p G = −1, VO = 2 V step G = −1, VO = 2 V step, CL = 10 pF | 54 27 | 80 32 125 | 54 27 | 80 32 125 | MHz V/µs ns | ||
DISTORTION/NOISE PERFORMANCE | ||||||||
Total Harmonic Distortion | fC = 1 MHz, VO = 2 V p-p, G = +2 | −62 | −62 | dBc | ||||
fC = 100 kHz, VO = 2 V p-p, G = +2 | −86 | −86 | dBc | |||||
Input Voltage Noise | f = 1 kHz | 15 | 15 | nV/√Hz | ||||
Input Current Noise | f = 100 kHz | 0.4 | 0.4 | pA/√Hz | ||||
f = 1 kHz | 5 | 5 | pA/√Hz | |||||
Differential Gain | RL = 1 kΩ | 0.17 | 0.17 | % | ||||
Differential Phase | RL = 1 kΩ | 0.11 | 0.11 | Degrees | ||||
Crosstalk (AD8032 Only) | f = 5 MHz | −60 | −60 | dB | ||||
DC PERFORMANCE | ||||||||
Input Offset Voltage | VCM = VCC/2; VOUT = 2.5 V | ±1 | ±6 | ±0.5 | ±1.5 | mV | ||
TMIN to TMAX | ±6 | ±10 | ±1.6 | ±2.5 | mV | |||
Offset Drift | VCM = VCC/2; VOUT = 2.5 V | 5 | 5 | µV/°C | ||||
Input Bias Current | VCM = VCC/2; VOUT = 2.5 V | 0.45 | 1.2 | 0.45 | 1.2 | µA | ||
TMIN to TMAX | 2.0 | 2.0 | µA | |||||
Input Offset Current | 50 | 350 | 50 | 250 | nA | |||
Open-Loop Gain | VCM = VCC/2; VOUT = 1.5 V to 3.5 V | 76 | 82 | 76 | 82 | dB | ||
TMIN to TMAX | 74 | 74 | dB | |||||
INPUT CHARACTERISTICS | ||||||||
Common-Mode Input Resistance | 40 | 40 | MΩ | |||||
Differential Input Resistance | 280 | 280 | kΩ | |||||
Input Capacitance | 1.6 | 1.6 | pF | |||||
Input Voltage Range | −0.5 to | −0.5 to | V | |||||
+5.5 | +5.5 | |||||||
Input Common-Mode Voltage Range | −0.2 to | −0.2 to | V | |||||
+5.2 | +5.2 | |||||||
Common-Mode Rejection Ratio | VCM = 0 V to 5 V | 56 | 70 | 56 | 70 | dB | ||
VCM = 0 V to 3.8 V | 66 | 80 | 66 | 80 | dB | |||
Differential Input Voltage | 3.4 | 3.4 | V | |||||
OUTPUT CHARACTERISTICS | ||||||||
Output Voltage Swing Low | RL = 10 kΩ | 0.05 | 0.02 | 0.05 | 0.02 | V | ||
Output Voltage Swing High | 4.95 | 4.98 | 4.95 | 4.98 | V | |||
Output Voltage Swing Low | RL = 1 kΩ | 0.2 | 0.1 | 0.2 | 0.1 | V | ||
Output Voltage Swing High | 4.8 | 4.9 | 4.8 | 4.9 | V | |||
Output Current | 15 | 15 | mA | |||||
Short Circuit Current | Sourcing | 28 | 28 | mA | ||||
Sinking | −46 | −46 | mA | |||||
Capacitive Load Drive | 15 | 15 | pF | |||||
POWER SUPPLY | ||||||||
Operating Range | 2.7 | 12 | 2.7 | 12 | V | |||
Quiescent Current per Amplifier | 800 | 1400 | 800 | 1400 | µA | |||
Power Supply Rejection Ratio | VS− = 0 V to −1 V or VS+ = +5 V to +6 V | 75 | 86 | 75 | 86 | dB |
@ TA = 25°C, VS = ±5 V, RL = 1 kΩ to 0 V, RF = 2.5 kΩ, unless otherwise noted.
Table 3.
Parameter | Conditions | Min Typ Max | Min Typ Max | Unit | ||||
DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth Slew Rate Settling Time to 0.1% | G = +1, VO < 0.4 V p-p G = −1, VO = 2 V step G = −1, VO = 2 V step, CL = 10 pF | 54 30 | 80 35 125 | 54 30 | 80 35 125 | MHz V/µs ns | ||
DISTORTION/NOISE PERFORMANCE | ||||||||
Total Harmonic Distortion | fC = 1 MHz, VO = 2 V p-p, G = +2 | −62 | −62 | dBc | ||||
fC = 100 kHz, VO = 2 V p-p, G = +2 | −86 | −86 | dBc | |||||
Input Voltage Noise | f = 1 kHz | 15 | 15 | nV/√Hz | ||||
Input Current Noise | f = 100 kHz | 0.4 | 0.4 | pA/√Hz | ||||
f = 1 kHz | 5 | 5 | pA/√Hz | |||||
Differential Gain | RL = 1 kΩ | 0.15 | 0.15 | % | ||||
Differential Phase | RL = 1 kΩ | 0.15 | 0.15 | Degrees | ||||
Crosstalk (AD8032 Only) | f = 5 MHz | −60 | −60 | dB | ||||
DC PERFORMANCE | ||||||||
Input Offset Voltage | VCM = 0 V; VOUT = 0 V | ±1 | ±6 | ±0.5 | ±1.5 | mV | ||
TMIN to TMAX | ±6 | ±10 | ±1.6 | ±2.5 | mV | |||
Offset Drift | VCM = 0 V; VOUT = 0 V | 5 | 5 | µV/°C | ||||
Input Bias Current | VCM = 0 V; VOUT = 0 V | 0.45 | 1.2 | 0.45 | 1.2 | µA | ||
TMIN to TMAX | 2.0 | 2.0 | µA | |||||
Input Offset Current | 50 | 350 | 50 | 250 | nA | |||
Open-Loop Gain | VCM = 0 V; VOUT = ±2 V | 76 | 80 | 76 | 80 | dB | ||
TMIN to TMAX | 74 | 74 | dB | |||||
INPUT CHARACTERISTICS | ||||||||
Common-Mode Input Resistance | 40 | 40 | MΩ | |||||
Differential Input Resistance | 280 | 280 | kΩ | |||||
Input Capacitance | 1.6 | 1.6 | pF | |||||
Input Voltage Range | −5.5 to | −5.5 to | V | |||||
+5.5 | +5.5 | |||||||
Input Common-Mode Voltage Range | −5.2 to | −5.2 to | V | |||||
+5.2 | +5.2 | |||||||
Common-Mode Rejection Ratio | VCM = −5 V to +5 V | 60 | 80 | 60 | 80 | dB | ||
VCM = −5 V to +3.5 V | 66 | 90 | 66 | 90 | dB | |||
Differential/Input Voltage | 3.4 | 3.4 | V | |||||
OUTPUT CHARACTERISTICS | ||||||||
Output Voltage Swing Low | RL = 10 kΩ | −4.94 | −4.98 | −4.94 | −4.98 | V | ||
Output Voltage Swing High | +4.94 | +4.98 | +4.94 | +4.98 | V | |||
Output Voltage Swing Low | RL = 1 kΩ | −4.7 | −4.85 | −4.7 | −4.85 | V | ||
Output Voltage Swing High | +4.7 | +4.75 | +4.7 | +4.75 | V | |||
Output Current | 15 | 15 | mA | |||||
Short Circuit Current | Sourcing | 35 | 35 | mA | ||||
Sinking | −50 | −50 | mA | |||||
Capacitive Load Drive | 15 | 15 | pF | |||||
POWER SUPPLY | ||||||||
Operating Range | ±1.35 | ±6 | ±1.35 | ±6 | V | |||
Quiescent Current per Amplifier | 900 | 1600 | 900 | 1600 | µA | |||
Power Supply Rejection Ratio | VS− = −5 V to −6 V or VS+ = +5 V to +6 V | 76 | 86 | 76 | 86 | dB |
Parameter | Rating |
Supply Voltage | 12.6 V |
8-Lead PDIP (N) | 1.3 W |
8-Lead SOIC_N (R) | 0.8 W |
8-Lead MSOP (RM) | 0.6 W |
5-Lead SOT-23 (RJ) | 0.5 W |
Input Voltage (Common Mode) | ±VS ± 0.5 V |
Differential Input Voltage | ±3.4 V |
Output Short-Circuit Duration | Observe Power Derating Curves |
Storage Temperature Range (N, R, RM, RJ) | −65°C to +125°C |
Lead Temperature (Soldering 10 sec) | 300°C |
Table 4.
1 Specification is for the device in free air: 8-Lead PDIP: θJA = 90°C/W.
8-Lead SOIC_N: θJA = 155°C/W.
8-Lead MSOP: θJA = 200°C/W.
5-Lead SOT-23: θJA = 240°C/W.
The maximum power that can be safely dissipated by the AD8031/AD8032 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Exceeding this limit temporarily can cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure.
While the AD8031/AD8032 are internally short-circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves shown in Figure 7.
2.0
TJ = +150°C
MAXIMUM POWER DISSIPATION (W)
8-LEAD PDIP
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
1.5
1.0
8-LEAD MSOP
8-LEAD SOIC
device reliability.
0.5 5-LEAD SOT-23
01056-007
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE (°C)
Figure 7. Maximum Power Dissipation vs. Temperature
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
90
800
80
N = 250
NUMBER OF PARTS IN BIN
70
60
50
40
30
20
10
600
INPUT BIAS CURRENT (nA)
400
200
0
–200
–400
–600
VS = 2.7V
VS = 5V
VS = 10V
0
–5 –4 –3 –2 –1 0 1 2 3 4 5
VOS (mV)
–800
01056-011
0 1 2 3 4 5 6 7 8 9 10
COMMON-MODE VOLTAGE (V)
01056-008
Figure 8. Typical VOS Distribution @ VS = 5 V Figure 11. Input Bias Current vs. Common-Mode Voltage
2.5
2.3
0
VS = 5V | |||||||||
–0.1
OFFSET VOLTAGE (mV)
2.1
1.9
1.7
VS = +5V
VS = ±5V
–0.2
OFFSET VOLTAGE (mV)
–0.3
–0.4
01056-009
–0.5
1.5
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
Figure 9. Input Offset Voltage vs. Temperature
–0.6
01056-012
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON-MODE VOLTAGE (V)
Figure 12. VOS vs. Common-Mode Voltage
1.00
0.95
0.90
INPUT BIAS (µA)
0.85
0.80
0.75
0.70
0.65
0.60
0.55
VS = 5V | ||||||||||||
0.50
1000
SUPPLY CURRENT/AMPLIFIER (µA)
950
900
850
800
750
700
650
600
±IS, VS = ±5V
+IS, VS = +5V
01056-010
+IS, VS = +2.7V
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
Figure 10. Input Bias Current vs. Temperature
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
01056-013
TEMPERATURE (°C)
Figure 13. Supply Current vs. Temperature
0
DIFFERENCE FROM VCC (V)
–0.5
–1.0
–1.5
VCC = 2.7V
VCC = 5V
VCC
1.2
DIFFERENCE FROM VEE (V)
1.0
0.8
0.6
VCC = 10V
VCC = 5V
VIN
VCC
VEE
R VCC
2
VOUT LOAD
–2.0
–2.5
VCC = 10V
VIN
VEE
R VCC
2
VOUT LOAD
0.4
0.2
0
01056-017
VCC = 2.7V
100 1k 10k RLOAD (Ω)
100
1k RLOAD (Ω)
10k
01056-014
Figure 14. +Output Saturation Voltage vs. RLOAD @ +85°C Figure 17. −Output Saturation Voltage vs. RLOAD @ +85°C
0
DIFFERENCE FROM VCC (V)
–0.5
–1.0
VCC
= 2.7V
VCC = 5V
1.2
DIFFERENCE FROM VEE (V)
1.0
0.8
VCC = 10V
VIN
VCC
VEE
VOUT RLOAD
V
–1.5
–2.0
–2.5
VCC = 10V
VIN
VCC
VEE
R VCC
01056-015
2
VOUT LOAD
0.6
0.4
0.2
0
VCC = 2.7V
CC
2
VCC = 5V
100 1k 10k RLOAD (Ω)
100
1k RLOAD (Ω)
10k
01056-018
Figure 15. +Output Saturation Voltage vs. RLOAD @ +25°C Figure 18. −Output Saturation Voltage vs. RLOAD @ +25°C
0
DIFFERENCE FROM VCC (V)
–0.5
–1.0
VCC = 2.7V
VCC = 5V
1.2
DIFFERENCE FROM VEE (V)
1.0
0.8
VCC = 10V
VIN
VCC
VEE
VOUT RLOAD
V
–1.5
–2.0
–2.5
VCC
= 10V
VIN
VCC
VEE
VOUT RLOAD
01056-016
VCC 2
0.6
0.4
0.2
0
CC
2
VCC = 5V
01056-019
VCC = 2.7V
100 1k 10k RLOAD (Ω)
100
1k RLOAD (Ω)
10k
Figure 16. +Output Saturation Voltage vs. RLOAD @ −40°C Figure 19. −Output Saturation Voltage vs. RLOAD @ −40°C
VS = 5V
110
1V
500mV
105
100
90
–AOL
INPUT BIAS CURRENT (mA)
100
10
95
+AOL
GAIN (dB)
90
85 0
80
75
70
65
60
0 2k 4k 6k 8k 10k
RLOAD (Ω)
–10
VS = 5V
10
0%
500mV
01056-023
–1.5 0.5 2.5 4.5 6.5
INPUT VOLTAGE (V)
01056-020
Figure 20. Open-Loop Gain (AOL) vs. RLOAD Figure 23. Differential Input Overvoltage I-V Characteristics
86
84
–AOL
GAIN (dB)
82
+AOL
80
78
VS = 5V RL = 1kΩ
0.05
DIFF GAIN (%)
0
–0.05
–0.10
–0.15
DIFF PHASE (Degrees)
0.10
0.05
0
–0.05
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
76
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
–0.10
01056-024
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
01056-021
Figure 21. Open Loop Gain vs. (AOL) Temperature Figure 24. Differential Gain and Phase @ VS = ±5 V; RL = 1 kΩ
110
100
AOL (dB)
90
80
100
INPUT VOLTAGE NOISE (nV/ Hz)
30
10
VOLTAGE NOISE
VS = 5V
INPUT CURRENT NOISE (pA/ Hz)
100
10
VS = 5V | |||||||||
RLOAD = 10kΩ | |||||||||
RLOAD = 1kΩ | |||||||||
3
70
CURRENT NOISE
1
01056-022
60
1
0.1
50
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VOUT (V)
Figure 22. Open-Loop Gain (AOL) vs. VOUT
0.3
01056-025
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 25. Input Voltage Noise vs. Frequency
5
4 VS = 5V
G = +1
NORMALIZED GAIN (dB)
3 RL = 1kΩ
2
1
0
–1
–2
–3
–4
–5 0.1 1 10 100
FREQUENCY (MHz)
–90
PHASE (Degrees)
–135
–180
–225
0.3
1 10
FREQUENCY (MHz)
100
40
OPEN-LOOPGAIN (dB)
GAIN | |||||||||||||||||||||||||
PHASE | |||||||||||||||||||||||||
30
20
10
0
–10
–20
01056-026
01056-029
Figure 26. Unity Gain, −3 dB Bandwidth Figure 29. Open-Loop Frequency Response
3
2 VS = 5V
VIN = –16dBm
NORMALIZED GAIN (dB)
1
+85°C
–20
TOTAL HARMONIC DISTORTION (dBc)
–30
G = +1, R = 2kΩ TOVCC
0
–1
–2
–3
VIN
–4
VS
2kΩ
VOUT
50Ω
–40°C
+25°C
–40
–50
–60
–70
L 2
2.5V p-p VS = 2.7V
1.3V p-p VS = 2.7V
2V p-p VS = 2.7V
–5 0.1 1 10 100
FREQUENCY (MHz)
–80
4.8V p-p VS = 5V
1k 10k 100k 1M
FUNDAMENTAL FREQUENCY (Hz)
10M
01056-027
01056-030
Figure 27. Closed-Loop Gain vs. Temperature Figure 30. Total Harmonic Distortion vs. Frequency; G = +1
2
VS = +2.7V
1 RL + CL TO 1.35V
CLOSED-LOOP GAIN (dB)
0
–1
–2
–3
G = +1
–4 CL = 5pF
RL = 1kΩ
–5
–6
–7
VS = ±5V
VS = +5V RL + CL TO 2.5V
–20
TOTAL HARMONIC DISTORTION (dBc)
G = +2 VS = 5V V CC RL = 1kΩ TO 2 | ||||||||||||||||||||||||||||||
4.8V p-p | ||||||||||||||||||||||||||||||
1V p-p | ||||||||||||||||||||||||||||||
4.6V p-p | ||||||||||||||||||||||||||||||
4V p-p | ||||||||||||||||||||||||||||||
–30
–40
–50
–60
–70
–80
–90
–8
100k
1M 10M 100M FREQUENCY (Hz)
–100
01056-031
1k 10k 100k 1M 10M
FUNDAMENTAL FREQUENCY (Hz)
01056-028
Figure 28. Closed-Loop Gain vs. Supply Voltage
Figure 31. Total Harmonic Distortion vs. Frequency; G +2
10
VS = ±5V
8
OUTPUT (V p-p)
6
VS = +5V
4
VS = +2.7V
01056-032
2
0
POWER SUPPLY REJECTION RATIO (dB)
–20
–40
–60
–80
–100
VS = 5V
0
1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 32. Large Signal Response
–120
01056-035
100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz)
Figure 35. PSRR vs. Frequency
100
50
ROUT (Ω)
10
1
RBT = 50Ω
VS = 5V
RL = 10kΩ TO 2.5V VIN = 6V p-p
G = +1
5.5
4.5
1V/DIV
3.5
2.5
1.5
0.1
RBT = 0Ω
RBT
V
OUT
0.5
–0.5
01056-033
0.1 1 10 100 200
FREQUENCY (MHz)
Figure 33. ROUT vs. Frequency
10µs/DIV
01056-036
Figure 36. Output Voltage
COMMON-MODE REJECTION RATIO (dB)
0
–20
–40
–60
01056-034
–80
5.5
4.5
1V/DIV
3.5
2.5
1.5
0.5
–0.5
INPUT
VS = 5V G = +1
INPUT = 650mV BEYOND RAILS
VS = 5V | |||||||||||||||||||||||||
–100
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 34. CMRR vs. Frequency
10µs/DIV
01056-037
Figure 37. Output Voltage Phase Reversal Behavior
RL TO
+2.5V
G = +1 RF = 0Ω
RL = 2kΩ TO 2.5V
CL = 5pF TO 2.5V VS = 5V
2.56
2.54
20mV/DIV
2.52
500mV/DIV
2.50
2.48
RL TO GND
0
10µs/DIV
VS = +5V RL = 1kΩ
G = –1
2.46
2.44
01056-041
50ns/DIV
01056-038
Figure 38. Output Swing Figure 41. 100 mV Step Response
G = +2
RF = RG = 2.5kΩ RL = 2kΩ
CL = 5pF
VS = 5V
3.1
2.9
200mV/DIV
2.7
2.5
2.3
2.1
1.9
–50
CROSSTALK(dB)
–60
–70
–80
–90
–100
2.5kΩ
VIN
2.5kΩ
01056-039
50Ω
1kΩ
VS = ±2.5V VIN = +10dBm
2.5kΩ 2.5kΩ
VOUT 50Ω
50ns/DIV
Figure 39. 1 V Step Response
0.1
TRANSMITTER RECEIVER
01056-042
1 10 100 200
FREQUENCY (MHz)
Figure 42. Crosstalk vs. Frequency
2.85
2.35
500mV/DIV
1.85
VS = 2.7V RL = 1kΩ G = –1
1.35
0.85
0.35
RL TO 1.35V
RL TO GND
01056-040
10µs/DIV
Figure 40. Output Swing
The AD8031/AD8032 are single and dual versions of high speed, low power, voltage feedback amplifiers featuring an innovative architecture that maximizes the dynamic range capability on the inputs and outputs. The linear input common- mode range exceeds either supply voltage by 200 mV, and the amplifiers show no phase reversal up to 500 mV beyond supply. The output swings to within 20 mV of either supply when driving a light load; 300 mV when driving up to 5 mA.
Fabricated on Analog Devices, Inc. eXtra Fast Complementary Bipolar (XFCB) process, the amplifier provides an impressive 80 MHz bandwidth when used as a follower and a 30 V/µs slew rate at only 800 µA supply current. Careful design allows the amplifier to operate with a supply voltage as low as 2.7 V.
A simplified schematic of the input stage appears in Figure 43. For common-mode voltages up to 1.1 V within the positive supply (0 V to 3.9 V on a single 5 V supply), tail current I2 flows through the PNP differential pair, Q13 and Q17. Q5 is cut off; no bias current is routed to the parallel NPN differential pair, Q2 and Q3. As the common-mode voltage is driven within
1.1 V of the positive supply, Q5 turns on and routes the tail current away from the PNP pair and to the NPN pair. During this transition region, the input current of the amplifier changes magnitude and direction. Reusing the same tail current ensures that the input stage has the same transconductance, which determines the gain and bandwidth of the amplifier, in both regions of operation.
Switching to the NPN pair as the common-mode voltage is driven beyond 1 V within the positive supply allows the amplifier to provide useful operation for signals at either end of the supply voltage range and eliminates the possibility of phase reversal for input signals up to 500 mV beyond either power supply. Offset voltage also changes to reflect the offset of the input pair in control. The transition region is small, approximately 180 mV. These sudden changes in the dc parameters of the input stage can produce glitches that adversely affect distortion.
Sustained input differential voltages greater than 3.4 V should be avoided as the input transistors can be damaged. Input clamp diodes are recommended if the possibility of this condition exists.
The voltages at the collectors of the input pairs are set to
200 mV from the power supply rails. This allows the amplifier to remain in linear operation for input voltages up to 500 mV beyond the supply voltages. Driving the input common-mode voltage beyond that point will forward bias the collector junction of the input transistor, resulting in phase reversal. Sustaining this condition for any length of time should be avoided because it is easy to exceed the maximum allowed input differential voltage when the amplifier is in phase reversal.
Q9
1.1V
R5
VIN
I2 90µA
VCC
Q3 Q2
R1
2kΩ
I3 25µA
Q6 Q10
R2
2kΩ
50kΩ R6 R7 1 1
Q5 850Ω
850Ω R8
850Ω
R9 4 Q8 Q7 4 850Ω
VIP
Q13 Q17
Q14
4
1
Q15
I4 25µA
Q16
Q11
4
1
OUTPUT STAGE, COMMON-MODE FEEDBACK
I1
5µA
VEE
Q18 Q4
R3
2kΩ
R4
01056-043
2kΩ
Figure 43. Simplified Schematic of AD8031 Input Stage
The AD8031 features a rail-to-rail output stage. The output transistors operate as common-emitter amplifiers, providing the output drive current as well as a large portion of the amplifier’s open-loop gain.
The open-loop gain of the AD8031 decreases approximately linearly with load resistance and depends on the output voltage. Open-loop gain stays constant to within 250 mV of the positive power supply, 150 mV of the negative power supply, and then decreases as the output transistors are driven further into saturation.
The distortion performance of the AD8031/AD8032 amplifiers differs from conventional amplifiers. Typically, the distortion
DIFFERENTIAL
DRIVE FROM
INPUT STAGE
I1
25µA
Q42 Q51
Q37 Q38 R29
Q68
I2
25µA
C9
+
5pF
Q47
performance of the amplifier degrades as the output voltage amplitude increases.
Used as a unity gain follower, the output of the AD8031/ AD8032 exhibits more distortion in the peak output voltage
Q20
Q21
300Ω
Q27
region around VCC − 0.7 V. This unusual distortion characteristic is
I4 25µA
+
Q43 Q48
I5 25µA
C5 1.5pF
Q49
VOUT
caused by the input stage architecture and is discussed in detail in the Input Stage Operation section,
Q50
Q44
Output overdrive of an amplifier occurs when the amplifier
01056-044
attempts to drive the output voltage to a level outside its normal
Figure 44. Output Stage Simplified Schematic
RL
50Ω
The output voltage limit depends on how much current the output transistors are required to source or sink. For applications with low drive requirements (for instance, a unity gain follower driving another amplifier input), the AD8031 typically swings within 20 mV of either voltage supply. As the required current load increases, the saturation output voltage increases linearly as
range. After the overdrive condition is removed, the amplifier must recover to normal operation in a reasonable amount of time. As shown in Figure 45, the AD8031/AD8032 recover within 100 ns from negative overdrive and within 80 ns from positive overdrive.
RF = RG = 2kΩ
RG
RF
VOUT
ILOAD
where:
× RC
VIN
ILOAD is the required load current.
RC is the output transistor collector resistance.
For the AD8031, the collector resistances for both output transistors are typically 25 Ω. As the current load exceeds the rated output current of 15 mA, the amount of base drive current required to drive the output transistor into saturation reaches its limit, and the amplifier’s output swing rapidly decreases.
1V
VS = ±2.5V VIN = ±2.5V
RL = 1kΩ TO GND
100ns
01056-045
1000
VS = 5V
RS = 5Ω
Capacitive loads interact with an op amp’s output impedance to create an extra delay in the feedback path. This reduces circuit stability and can cause unwanted ringing and oscillation. A given value of capacitance causes much less ringing when the amplifier is used with a higher noise gain.
The capacitive load drive of the AD8031/AD8032 can be increased by adding a low valued resistor in series with the capacitive load. Introducing a series resistor tends to isolate the capacitive load from the feedback loop, thereby diminishing its
100
CAPACITIVE LOAD (pF)
10
200mV STEP
WITH 30% OVERSHOOT
RS = 20Ω
RS = 0Ω, 5Ω
RS = 20Ω
RG RF
RS
RS = 0Ω
VOUT CL
influence. Figure 46 shows the effects of a series resistor on the capacitive drive for varying voltage gains. As the closed-loop gain is increased, the larger phase margin allows for larger capacitive loads with less overshoot. Adding a series resistor at lower closed-loop gains accomplishes the same effect. For large capacitive loads, the frequency response of the amplifier is dominated by the roll-off of the series resistor and capacitive load.
1
01056-046
0 1 2 3 4 5
CLOSED-LOOP GAIN (V/V)
Figure 46. Capacitive Load Drive vs. Closed-Loop Gain
Figure 47 shows a circuit for a single-supply, biquad band-pass filter with a center frequency of 2 MHz. A 2.5 V bias level is easily created by connecting the noninverting inputs of all three op amps to a resistor divider consisting of two 1 kΩ resistors connected between 5 V and ground. This bias point is also decoupled to ground with a 0.1 µF capacitor. The frequency response of the filter is shown in Figure 48.
To maintain an accurate center frequency, it is essential that the op amp have sufficient loop gain at 2 MHz. This requires the choice of an op amp with a significantly higher unity gain, crossover frequency. The unity gain, crossover frequency of the AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by the feedback factors of the individual op amp circuits yields the loop gain for each gain stage. From the feedback networks of the individual op amp circuits, it can be seen that each op amp has a loop gain of at least 21 dB. This level is high enough to ensure that the center frequency of the filter is not affected by the op amp’s bandwidth. If, for example, an op amp with a gain bandwidth product of 10 MHz was chosen in this application, the resulting center frequency would shift by 20% to 1.6 MHz.
R6
1kΩ
0
–10
GAIN (dB)
–20
–30
–40
01056-048
–50
10k 100k 1M 10M 100M FREQUENCY (Hz)
Figure 48. Frequency Response of 2 MHz Band-Pass Filter
Even though the AD8031/AD8032 swing close to both rails, the AD8031 has optimum distortion performance when the signal has a common-mode level half way between the supplies and when there is about 500 mV of headroom to each rail. If low distortion is required in single-supply applications for signals that swing close to ground, an emitter-follower circuit can be used at the op amp output.
R2
2kΩ
C1 50pF
R4
2kΩ
5V
10µF
VIN
R1
3kΩ
1kΩ
5V
0.1µF
AD8031
R3
2kΩ
5V
0.1µF
1/2
R5
2kΩ
C2 50pF
VIN
49.9Ω
0.1µF
3 7
6
2
4 AD8031
2N3904
0.1µF
1kΩ
VOUT
AD8032
1/2
01056-049
AD8032
2.49kΩ
2.49kΩ 49.9Ω
01056-047
200Ω
49.9Ω
VOUT
Figure 47. A 2 MHz, Biquad Band-Pass Filter Using AD8031/AD8032
Figure 49. Low Distortion Line Driver for Single-Supply, Ground Referenced Signals
Figure 49 shows the AD8031 configured as a single-supply, gain- of-2 line driver. With the output driving a back-terminated
50 Ω line, the overall gain from VIN to VOUT is unity. In addition to minimizing reflections, the 50 Ω back termination resistor protects the transistor from damage if the cable is short circuited. The emitter follower, which is inside the feedback loop, ensures that the output voltage from the AD8031 stays about 700 mV above ground. Using this circuit, low distortion is attainable even when the output signal swings to within 50 mV of ground. The circuit was tested at 500 kHz and 2 MHz.
Figure 50 and Figure 51 show the output signal swing and frequency spectrum at 500 kHz. At this frequency, the output signal (at VOUT), which has a peak-to-peak swing of 1.95 V (50 mV to 2 V), has a THD of −68 dB (SFDR = −77 dB).
100
90
2V
10
0%
01056-050
50mV
This circuit could also be used to drive the analog input of a single-supply, high speed ADC whose input voltage range is referenced to ground (for example, 0 V to 2 V or 0 V to 4 V). In this case, a back termination resistor is not necessary (assuming a short physical distance from transistor to ADC); therefore, the emitter of the external transistor would be connected directly to the ADC input. The available output voltage swing of the circuit would therefore be doubled.
1.5V
100
90
0.5V
1µs
Figure 50. Output Signal Swing of Low Distortion Line Driver at 500 kHz
VERTICAL SCALE (10dB/DIV)
+9dBm
10
0%
0.2V
200ns
01056-052
50mV
Figure 52. Output Signal Swing of Low Distortion Line Driver at 2 MHz
+7dBm
01056-051
VERTICAL SCALE (10dB/DIV)
START 0Hz STOP 5MHz
Figure 51. THD of Low Distortion Line Driver at 500 kHz
Figure 52 and Figure 53 show the output signal swing and frequency spectrum at 2 MHz. As expected, there is some degradation in signal quality at the higher frequency. When the output signal has a peak-to-peak swing of 1.45 V (swinging from 50 mV to 1.5 V), the THD is −55 dB (SFDR = −60 dB).
01056-053
START 0Hz STOP 20MHz
Figure 53. THD of Low Distortion Line Driver at 2 MHz
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.210 (5.33)
MAX
0.150 (3.81)
8
5
1
4
0.100 (2.54) BSC
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.015
(0.38)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.015 (0.38)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.130 (3.30) MIN
0.115 (2.92) SEATING
GAUGE
PLANE 0.014 (0.36)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
PLANE
0.005 (0.13) MIN
0.430 (10.92) MAX
0.010 (0.25)
0.008 (0.20)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
070606-A
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 54. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
8 5
4.00 (0.1574)
6.20 (0.2441)
3.80 (0.1497) 1 4 5.80 (0.2284)
1.27 (0.0500) 0.50 (0.0196)
45°
0.25 (0.0098)
0.10 (0.0040)
BSC
1.75 (0.0688)
1.35 (0.0532) 8°
0°
0.25 (0.0099)
COPLANARITY
0.51 (0.0201)
1.27 (0.0500)
0.10
SEATING PLANE
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 55. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
3.00
2.90
2.80
1.70
1.60
1.50
5 4 3.00
2.80
2.60
1 2 3
1.30
1.15
0.90
1.90 BSC
0.95 BSC
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.55
0.15 MAX
0.05 MIN
0.50 MAX
0.35 MIN
SEATING PLANE
10°
5°
0°
0.60
BSC
0.45
0.35
11-01-2010-A
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 56. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5)
Dimensions shown in millimeters
3.20
3.00
2.80
3.20
3.00
2.80
8 5 5.15
4.90
4.65
1 4
PIN 1 IDENTIFIER
0.65 BSC
0.95
0.85
0.75
0.15
0.05
COPLANARITY 0.10
0.40
0.25
1.10 MAX
6°
0°
15° MAX
0.23
0.09
0.80
0.55
10-07-2009-B
0.40
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 57. 8-Lead Mini Small Outline Package [MSOP] (RM-8)
Dimensions shown in millimeters
Temperature Range | Package Description | Package Option | Branding | |
AD8031ANZ | –40°C to +85°C | 8-Lead PDIP | N-8 | |
AD8031AR | –40°C to +85°C | 8-Lead SOIC_N | R-8 | |
AD8031ARZ | –40°C to +85°C | 8-Lead SOIC_N | R-8 | |
AD8031ARZ-REEL | –40°C to +85°C | 8-Lead SOIC_N, 13" Tape and Reel | R-8 | |
AD8031ARZ-REEL7 | –40°C to +85°C | 8-Lead SOIC_N, 7" Tape and Reel | R-8 | |
AD8031ART-R2 | –40°C to +85°C | 5-Lead SOT-23 | RJ-5 | H0A |
AD8031ART-REEL7 | –40°C to +85°C | 5-Lead SOT-23, 7" Tape and Reel | RJ-5 | H0A |
AD8031ARTZ-R2 | –40°C to +85°C | 5-Lead SOT-23 | RJ-5 | H04 |
AD8031ARTZ-REEL | –40°C to +85°C | 5-Lead SOT-23, 13" Tape and Reel | RJ-5 | H04 |
AD8031ARTZ-REEL7 | –40°C to +85°C | 5-Lead SOT-23, 7" Tape and Reel | RJ-5 | H04 |
AD8031BNZ | –40°C to +85°C | 8-Lead PDIP | N-8 | |
AD8031BR | –40°C to +85°C | 8-Lead SOIC_N | R-8 | |
AD8031BRZ | –40°C to +85°C | 8-Lead SOIC_N | R-8 | |
AD8031BRZ-REEL | –40°C to +85°C | 8-Lead SOIC_N, 13" Tape and Reel | R-8 | |
AD8031BRZ-REEL7 | –40°C to +85°C | 8-Lead SOIC_N, 7" Tape and Reel | R-8 | |
AD8031AR-EBZ | 8-Lead SOIC Evaluation Board | |||
AD8031ART-EBZ | 5-Lead SOT-23 Evaluation Board | |||
AD8032ANZ | –40°C to +85°C | 8-Lead PDIP | N-8 | |
AD8032AR AD8032AR-REEL7 AD8032ARZ AD8032ARZ-REEL AD8032ARZ-REEL7 AD8032ARM AD8032ARM-REEL AD8032ARM-REEL7 AD8032ARMZ AD8032ARMZ-REEL AD8032ARMZ-REEL7 AD8032BNZ AD8032BR AD8032BR-REEL7 AD8032BRZ AD8032BRZ-REEL AD8032BRZ-REEL7 AD8032ACHIPS AD8032AR-EBZ AD8032ARM-EBZ | –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C | 8-Lead SOIC_N 8-Lead SOIC_N, 7" Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N, 7" Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel Die 8-Lead SOIC Evaluation Board 8-Lead MSOP Evaluation Board | R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 N-8 R-8 R-8 R-8 R-8 R-8 | H9A H9A H9A H9A# H9A# H9A# |
1 Z = RoHS Compliant Part, # denotes lead-free product may be top or bottom marked.
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