A general purpose operational amplifier that allows the user to choose the compensation capacitor best suited to his needs. With proper compensation, summing amplifier slew rates to 10 V/µs can be obtained.
Low Input Offset Current: 20 nA Maximum Over Temperature Range
External Frequency Compensation for Flexibility
Class AB Output Provides Excellent Linearity
Output Short Circuit Protection
Guaranteed Drift Characteristics 8
Pb−Free Packages are Available 1
8
LMx01AN AWL YYWWG
1
Inverting
Input
Non- Inverting
Input Balance 10 MQ
VEE
VCC
+
Freq Compen
30 pF
Output Balance
5.1 MQ
8
1 CASE 751
8
LMx01 ALYWA
■
1
201AV ALYW ■ | |||
LM201AVDR2G 8
20 k
VEE 1
VCC
x = 2 or 3
A = Assembly Location WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
■ = Pb−Free Package
VUT
+
VI VEE
VCC
VO
MZ4622 or Equiv.
3.9 V
VLT VO
Balance 1
2
Inputs
3
Compensation
7
8
VCC
5
6
Output
VEE
VO = 4.8 V for VLT VI VUT VO = -0.4 V
VI < VLT or VI > VUT
VEE 4
(Top View)
Balance
(Pins Not Shown Are Not Connected)
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
Semiconductor Components Industries, LLC, 2011
VCC
Inputs
+
500
Output
25
50
5 k 20 k
250
450
10 k
Balance
40 k
40 k
80 k
1.0 k
VEE
Device | Package | Shipping† |
LM301ADG | SOIC−8 (Pb−Free) | 98 Units/Rail |
LM301ADR2G | SOIC−8 (Pb−Free) | 2500 Tape & Reel |
LM301AN | PDIP−8 | 50 Units/Rail |
LM301ANG | PDIP−8 (Pb−Free) | 50 Units/Rail |
LM201ADG | SOIC−8 (Pb−Free) | 98 Units/Rail |
LM201ADR2G | SOIC−8 (Pb−Free) | 2500 Tape & Reel |
LM201AN | PDIP−8 | 50 Units/Rail |
LM201ANG | PDIP−8 (Pb−Free) | 50 Units/Rail |
LM201AVDR2G | SOIC−8 (Pb−Free) | 2500 Tape & Reel |
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Power Supply Voltage VCC, VEE 22 22 18 Vdc
Input Differential Voltage VID 30 V
Input Common Mode Range (Note 1) VICR 15 V
Output Short Circuit Duration tSC Continuous
Power Dissipation (Package Limitation) PD
Plastic Dual−In−Line Package 625 625 625 mW
Derate above TA = +25C 5.0 5.0 5.0 mW/C
Operating Ambient Temperature Range TA −25 to +85 −40 to +105 0 to +70 C
Storage Temperature Range Tstg − 65 to +150 C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
ELECTRICAL CHARACTERISTICS (TA = +25C, unless otherwise noted.) Unless otherwise specified, these specifications apply for supply voltages from 5.0 V to 20 V for the LM201A and LM201AV, and from 5.0 V to 15 V for the LM301A.
Characteristic | Symbol | LM201A / LM201AV | LM301A | Unit | ||||
Min | Typ | Max | Min | Typ | Max | |||
Input Offset Voltage (RS 50 kQ) | VIO | − | 0.7 | 2.0 | − | 2.0 | 7.5 | mV |
Input Offset Current | IIO | − | 1.5 | 10 | − | 3.0 | 50 | nA |
Input Bias Current | IIB | − | 30 | 75 | − | 70 | 250 | nA |
Input Resistance | ri | 1.5 | 4.0 | − | 0.5 | 2.0 | − | MQ |
Supply Current VCC/VEE = 20 V VCC/VEE = 15 V | ICC,IEE | − − | 1.8 − | 3.0 − | − − | − 1.8 | − 3.0 | mA |
Large Signal Voltage Gain (VCC/VEE = 15 V, VO = 10 V, RL > 2.0 kQ) | AV | 50 | 160 | − | 25 | 160 | − | V/mV |
Input Offset Voltage (RS 50 kQ) | VIO | − | − | 3.0 | − | − | 10 | mV |
Input Offset Current | IIO | − | − | 20 | − | − | 70 | nA |
Avg Temperature Coefficient of Input Offset Voltage (Note 2) TA(min) TA TA (max) | �VIO/�T | − | 3.0 | 15 | − | 6.0 | 30 | µV/C |
Avg Temperature Coefficient of Input Offset Current (Note 2) +25C TA TA (max) TA(min) TA 25C | �IIO/�T | − − | 0.01 0.02 | 0.1 0.2 | − − | 0.01 0.02 | 0.3 0.6 | nA/C |
Input Bias Current | IIB | − | − | 100 | − | − | 300 | nA |
Large Signal Voltage Gain (VCC/VEE = 15 V, VO = 10V, RL > 2.0 kQ) | AVOL | 25 | − | − | 15 | − | − | V/mV |
Input Voltage Range VCC/VEE = 20 V VCC/VEE = 15 V | VICR | −15 − | − − | +15 − | − −12 | − − | − +12 | V |
Common Mode Rejection (RS 50 kQ) | CMR | 80 | 96 | − | 70 | 90 | − | dB |
Supply Voltage Rejection (RS 50 kQ) | PSR | 80 | 96 | − | 70 | 96 | − | dB |
Output Voltage Swing (VCC/VEE = 15 V, RL = 10 kQ RL > 2.0 kQ | VO | 12 10 | 14 13 | − − | 12 10 | 14 13 | − − | V |
Supply Currents (TA = TA(max), VCC/VEE = 20 V) | ICC,IEE | − | 1.2 | 2.5 | − | − | − | mA |
For supply voltages less than 15 V, the absolute maximum input voltage is equal to the supply voltage.
Guaranteed by design.
20
VIR, INPUT VOLTAGE RANGE (V)
Applicable to the Specified
Operating Temperature
16 Ranges
20
VOR, OUTPUT VOLTAGE RANGE ( V)
Applicable to the Specified Operating Temperature
LM201A
only
16 Ranges
12
8.0
4.0
Positive
12
8.0
4.0
Negative
Minimum RL = 10 k
Minimum RL = 2.0 k
LM201A
only
0
0 5.0 10 15 20
0
0 5.0 10 15 20
VCC, ( -VEE), SUPPLY VOLTAGE (V) VCC, ( -VEE), SUPPLY VOLTAGE (V)
100
AV, VOLTAGE GAIN (dB)
94
88
82
76
Applicable to the Specified Operating Temperature Ranges
LM201A
only
2.5
ICC , I EE, SUPPLY CURRENTS (mA)
LM201A only | ||||||||
TA = +25C | ||||||||
2.0
1.5
1.0
0.5
70
0 5.0 10 15 20
0
0 5.0 10 15 20
VCC, ( -VEE), SUPPLY VOLTAGE (V) VCC, ( -VEE), SUPPLY VOLTAGE (V)
180
160
AV, VOLTAGE GAIN (dB)
140
120
100
80
60
40
20
0
-20
Single-Pole Compensation
C1 = 3.0 pF
Phase
C1 = 30 pF
Gain
315
270
225
180
135
90
45
0
15
VOR, OUTPUT VOLTAGE RANGE ( V)
10
5.0
0
C1 = 30 pF
Single-Pole Compensation
C1 = 3.0 pF
1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M 1.0 k 10 k 100 k 1.0 M 10 M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
10
VIR, VOR, VOLTAGE RANGE ( V)
8.0
6.0
4.0
2.0
0
-2.0
-4.0
-6.0
Single-Pole Compensation
Input
Output
140
120
AV, VOLTAGE GAIN (dB)
100
80
60
40
20
Feedforward Compensation
Phase
Gain
225
PHASE LAG (DEGREES)
180
135
90
45
-8.0
-10
0 10 20 30 40 50 60 70 80 90
t, TIME (µs)
0 0 0
-20
10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M
f, FREQUENCY (Hz)
, OUTPUT VOLTAGE RANGE ( V) VOR
18
16
12
8.0
4.0
0
Feedforward Compensation
10
, OUTPUT VOLTAGE RANGE ( V) VOR
8.0
6.0
4.0
2.0
0
-2.0
-4.0
-6.0
-8.0
-10
Feedforward Compensation
Input
Output
100 k
1.0 M 10 M
f, FREQUENCY (Hz)
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
t, TIME (µs)
C2
R2
-VI
+V
R1 2
R3 3
7 VCC
6
VO
+
R1 2
VI
R2
7 VCC
3
6
VO
I
1
Balance
4 8
VEE
Frequency Compensation
+
1
R3 C1
4
VEE
Balance
R1 Cs
C1 C1 R1 +R2
Cs = 30 pF
150 pF
1
C2 =
2 foR2
fo = 3.0 MHz
CASE 626−05 ISSUE M
NOTES:
DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
CONTROLLING DIMENSION: INCHES.
DIMENSION E IS MEASURED WITH THE LEADS RE- STRAINED PARALLEL AT WIDTH E2.
DIMENSION E1 DOES NOT INCLUDE MOLD FLASH.
ROUNDED CORNERS OPTIONAL.
DIM | INCHES | MILLIMETERS | ||||
MIN | NOM | MAX | MIN | NOM | MAX | |
A | −−−− | −−−− | 0.210 | −−−− | −−−− | 5.33 |
A1 | 0.015 | −−−− | −−−− | 0.38 | −−−− | −−−− |
b | 0.014 | 0.018 | 0.022 | 0.35 | 0.46 | 0.56 |
C | 0.008 | 0.010 | 0.014 | 0.20 | 0.25 | 0.36 |
D | 0.355 | 0.365 | 0.400 | 9.02 | 9.27 | 10.02 |
D1 | 0.005 | −−−− | −−−− | 0.13 | −−−− | −−−− |
E | 0.300 | 0.310 | 0.325 | 7.62 | 7.87 | 8.26 |
E1 | 0.240 | 0.250 | 0.280 | 6.10 | 6.35 | 7.11 |
E2 | 0.300 BSC | 7.62 BSC | ||||
E3 | −−−− | −−−− | 0.430 | −−−− | −−−− | 10.92 |
e | 0.100 BSC | 2.54 BSC | ||||
L | 0.115 | 0.130 | 0.150 | 2.92 | 3.30 | 3.81 |
0.010 M | C | A |
−X−
0.25 (0.010) M | Y M |
NOTES:
DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION: MILLIMETER.
DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.
MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
DIMENSION D DOES NOT INCLUDE DAMBAR
−Y−
DIM | MILLIMETERS | INCHES | ||
MIN | MAX | MIN | MAX | |
A | 4.80 | 5.00 | 0.189 | 0.197 |
B | 3.80 | 4.00 | 0.150 | 0.157 |
C | 1.35 | 1.75 | 0.053 | 0.069 |
D | 0.33 | 0.51 | 0.013 | 0.020 |
G | 1.27 BSC | 0.050 BSC | ||
H | 0.10 | 0.25 | 0.004 | 0.010 |
J | 0.19 | 0.25 | 0.007 | 0.010 |
K | 0.40° | 1.27° | 0.016° | 0.050° |
M | 0 | 8 | 0 | 8 |
N | 0.25 | 0.50 | 0.010 | 0.020 |
S | 5.80 | 6.20 | 0.228 | 0.244 |
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.
−Z−
0.10 (0.004)
0.25 (0.010) | M | Z | Y | S | X | S |
1.52 0.060
7.0
0.275
4.0
0.155
0.6 0.024
1.270
( )
0.050
SCALE 6:1
mm inches
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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