NCS20081/2/4, NCV20081/2/4


1.2 MHz, 42 µA Low Power Operational Amplifier

The NCS20081/2/4 is a family of single, dual and quad Operational Amplifiers (Op Amps) with 1.2 MHz of Gain−Bandwidth Product (GBWP) and draws only 42 µA of Quiescent current. The NCS2008x has Input Offset Voltage of 4 mV and operates from 1.8 V to 5.5 V supply voltage over a wide temperature range (−40C to +125C). The Rail−to−Rail In/Out operation allows the designers to use the entire supply voltage range while taking advantage of the 1.2 MHz GBWP.


www.onsemi.com


5

1

Thus, this family offers superior performance over many industry standard parts. These devices are AEC−Q100 qualified which is denoted by the NCV suffix.

NCS2008x’s low current consumption and low voltage performance in space saving packages, makes them ideal for sensor signal conditioning and low voltage current sensing applications in

SC70−5 CASE 419A


M

TSOP−5/SOT23−5 CASE 483


8

1

Automotive, Consumer and Industrial markets.

Micro8

/MSOP8

SOIC−8

Features


This document contains information on some products that are still under development. ON Semiconductor reserves the right to change or discontinue these products without notice.


DEVICE MARKING INFORMATION

See general marking information in the device marking section on page 2 of this data sheet.


ORDERING INFORMATION

See detailed ordering and shipping information on page 3 of this data sheet.


Semiconductor Components Industries, LLC, 2017

1 Publication Order Number:


MARKING DIAGRAMS


Single Channel Configuration NCS20081, NCV20081


XXM■

XX M■




XXXAYW■






5 1



SC70−5 CASE 419A

1

TSOP−5/SOT23−5 CASE 483


UDFN6 CASE 517AP


Dual Channel Configuration NCS20082, NCV20082

XXXX







XXXXXX ALYW








8 8


AYW■


XXX YWW

A■

1 1


M

Micro8

/MSOP8

SOIC−8

TSSOP−8

CASE 846A

CASE 751

CASE 948S



Quad Channel Configuration NCS20084, NCV20084










XXXXX

AWLYWWG










14 14

XXXX XXXX


ALYW■

1

TSSOP−14 CASE 948G

1


SOIC−14 CASE 751A


XXXXX = Specific Device Code A = Assembly Location WL, L = Wafer Lot

Y = Year

WW, W = Work Week

G or ■ = Pb−Free Package

(Note: Microdot may be in either location)


Single Channel Configuration

NCS20081, NCV20081


OUT 1


+

VSS 2


IN+ 3

5 VDD


4 IN−

IN+

2

1

+

VSS

3


IN−

VDD


4


5

OUT

VSS 1


NC 2


IN− 3

6 OUT


+

5 VDD


4 IN+


SOT23−5 (TSOP−5)

SN2 Pinout


Dual Channel Configuration

SC70−5, SOT23−5 (TSOP−5)

SQ3, SN3 Pinout

UDFN6 1.6 x 1.6


Quadruple Channel Configuration

NCS20084, NCV20084


OUT 1 1


IN− 1 2


IN+ 1 3

NCS20082, NCV20082


8


− 7


+ 6


VDD OUT 2

IN− 2

OUT 1 1


IN− 1 2

IN+ 1 3 +

VDD 4

14


13

+ 12

11

OUT 4


IN− 4


IN+ 4 VSS

IN+ 2 5

+ + 10

IN+ 3

VSS 4

+ 5 IN+ 2

IN− 2 6

OUT 2 7

9 IN− 3

8 OUT 3


Figure 1. Pin Connections


ORDERING INFORMATION

Device

Configuration

Automotive

Marking

Package

Shipping

NCS20081SQ3T2G


Single


No

AAP

SC70


Contact local sales office for more information

NCS20081SN2T1G

AER

SOT23−5/TSOP−5

NCS20081SN3T1G

AEU

SOT23−5/TSOP−5

NCS20081MUTAG

AP

UDFN6

NCV20081SQ3T2G*


Yes

AAP

SC70

NCV20081SN2T1G*

AER

SOT23−5/TSOP−5

NCS20082DMR2G


Dual


No

2K82

Micro8/MSOP8

NCS20082DR2G

NCS20082

SOIC−8

NCS20082DTBR2G

K82

TSSOP−8

NCV20082DMR2G*


Yes

2K82

Micro8/MSOP8

NCV20082DR2G*

NCS20082

SOIC−8

NCV20082DTBR2G*

K82

TSSOP−8

NCS20084_


Quad**


No

TBD

SOIC−14

NCS20084_

TBD

SOP−14

NCS20084_

TBD

TSSOP−14

NCV20084_


Yes

TBD

SOIC−14

NCV20084_

TBD

SOP−14

NCV20084_

TBD

TSSOP−14

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D

*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.

**In Development. Not yet released.


ABSOLUTE MAXIMUM RATINGS (Note 1)

Rating

Symbol

Limit

Unit

Supply Voltage (VDD – VSS) (Note 2)

VS

7

V

Input Voltage

VI

VSS − 0.5 to VDD + 0.5

V

Differential Input Voltage

VID

Vs

V

Maximum Input Current

II

10

mA

Maximum Output Current

IO

100

mA

Continuous Total Power Dissipation (Note 2)

PD

200

mW

Maximum Junction Temperature

TJ

150

C

Storage Temperature Range

TSTG

−65 to 150

C

Mounting Temperature (Infrared or Convection – 20 sec)

Tmount

260

C

ESD Capability (Note 3)

Human Body Model

ESDHBM ESDMM ESDCDM

2000

V


Machine Model

100



Charge Device Model

2000


Latch−Up Current (Note 4)

ILU

100

mA

Moisture Sensitivity Level (Note 5)

MSL

Level 1


Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

  1. Refer to ELECTRICAL CHARACTERISTICS for Safe Operating Area.

  2. Continuous short circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of the maximum output current rating over the long term may adversely affect reliability. Shorting output to either VDD or VSS will adversely affect reliability.

  3. This device series incorporates ESD protection and is tested by the following methods:

    ESD Human Body Model tested per AEC−Q100−002 (JED-EC sta-ndard: JESD22−A114)

    ESD Machine Model tested per AEC−Q100−003 (JEDEC standard: JESD22−A115)

  4. Latch−up Current tested per JEDEC standard: JESD78

  5. Moisture Sensitivity Level tested per IPC/JEDEC standard: J

    THERMAL INFORMATION

    STD

    020A


    Parameter


    Symbol


    Channels


    Package

    Single Layer Board (Note 6)

    Multi−Layer Board (Note 7)


    Unit


    Junction to Ambient Thermal Resistance


    8JA


    Single

    SC−70

    491

    444


    SOT23−5/TSOP−5

    310

    247

    UDFN6

    278

    239


    Dual

    Micro8/MSOP8

    236

    167

    SOIC−8

    190

    131

    TSSOP−8

    253

    194


    Quad

    SOIC−14



    SOP−14



    TSSOP−14



  6. Value based on 1S standard PCB according to JEDEC51−3 with 1.0 oz copper and a 300 mm2 copper area

  7. Value based on 1S2P standard PCB according to JEDEC51−7 with 1.0 oz copper and a 100 mm2 copper area


    OPERATING RANGES

    Parameter

    Symbol

    Min

    Max

    Unit

    Operating Supply Voltage

    VS

    1.8

    5.5

    V

    Differential Input Voltage

    VID


    VS

    V

    Input Common Mode Range

    VICM

    VSS – 0.2

    VDD + 0.2

    V

    Ambient Temperature

    TA

    −40

    125

    C

    Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

    Boldface limits apply over the specified temperature range, TA = −40C to 125C. (Note 8)

    Parameter

    Symbol

    Conditions

    Min

    Typ

    Max

    Unit

    INPUT CHARACTERISTICS

    Input Offset Voltage

    VOS



    0.5

    3.5

    mV



    4

    mV

    Offset Voltage Drift

    VOS/T



    1


    µV/C

    Input Bias Current (Note 8)

    IIB



    1


    pA



    1500

    pA

    Input Offset Current (Note 8)

    IOS



    1


    pA



    1100

    pA

    Channel Separation

    XTLK

    DC


    125


    dB

    Differential Input Resistance

    RID



    10


    GQ

    Common Mode Input Resistance

    RIN



    10


    GQ

    Differential Input Capacitance

    CID



    1


    pF

    Common Mode Input Capacitance

    CCM



    5


    pF

    Common Mode Rejection Ratio

    CMRR

    VCM = VSS – 0.2 to VDD + 0.2

    48

    73


    dB

    VCM = VSS + 0.2 to VDD − 0.2

    45



    OUTPUT CHARACTERISTICS

    Open Loop Voltage Gain

    AVOL


    86

    120


    dB

    80



    Short Circuit Current

    ISC

    Output to positive rail, sinking current


    15


    mA

    Output to negative rail, sourcing current


    11


    Output Voltage High

    VOH

    Voltage output swing from positive rail


    3

    19

    mV



    20

    Output Voltage Low

    VOL

    Voltage output swing from negative rail


    3

    19

    mV



    20

    AC CHARACTERISTICS

    Unity Gain Bandwidth

    UGBW



    1.2


    MHz

    Slew Rate at Unity Gain

    SR

    VID = 1.2 Vpp, Gain = 1


    0.4


    V/µs

    Phase Margin

    m



    60


    Gain Margin

    Am



    19


    dB

    Settling Time

    tS

    VIN = 1.2 Vpp,

    Gain = 1

    Settling time to 0.1%


    5


    µs

    Settling time to 0.01%


    6


    Open Loop Output Impedance

    ZOL

    f = 100 Hz


    0.8


    Q

    NOISE CHARACTERISTICS

    Total Harmonic Distortion plus Noise

    THD+N

    VIN = 1.2 Vpp, f = 1 kHz, Av = 1


    0.005


    %

    Input Referred Voltage Noise

    en

    f = 1 kHz


    30


    nV/Hz

    f = 10 kHz


    24


    Input Referred Current Noise

    in

    f = 1 kHz


    300


    fA/Hz

    SUPPLY CHARACTERISTICS

    Power Supply Rejection Ratio

    PSRR

    No Load

    67

    90


    dB

    64



    Power Supply Quiescent Current

    IDD

    Per channel, no load


    42

    60

    µA

  8. Performance guaranteed over the indicated operating temperature range by design and/or characterization.

    Boldface limits apply over the specified temperature range, TA = −40C to 125C. (Note 9)

    Parameter

    Symbol

    Conditions

    Min

    Typ

    Max

    Unit

    INPUT CHARACTERISTICS

    Input Offset Voltage

    VOS



    0.5

    3.5

    mV



    4

    mV

    Offset Voltage Drift

    VOS/T



    1


    µV/C

    Input Bias Current (Note 9)

    IIB



    1


    pA



    1500

    pA

    Input Offset Current (Note 9)

    IOS



    1


    pA



    1100

    pA

    Channel Separation

    XTLK

    DC


    125


    dB

    Differential Input Resistance

    RID



    10


    GQ

    Common Mode Input Resistance

    RIN



    10


    GQ

    Differential Input Capacitance

    CID



    1


    pF

    Common Mode Input Capacitance

    CCM



    5


    pF

    Common Mode Rejection Ratio

    CMRR

    VCM = VSS – 0.2 to VDD + 0.2

    53

    76


    dB

    VCM = VSS + 0.2 to VDD − 0.2

    48



    OUTPUT CHARACTERISTICS

    Open Loop Voltage Gain

    AVOL


    90

    120


    dB

    86



    Short Circuit Current

    ISC

    Output to positive rail, sinking current


    15


    mA

    Output to negative rail, sourcing current


    11


    Output Voltage High

    VOH

    Voltage output swing from positive rail


    3

    24

    mV



    25

    Output Voltage Low

    VOL

    Voltage output swing from negative rail


    3

    24

    mV



    25

    AC CHARACTERISTICS

    Unity Gain Bandwidth

    UGBW



    1.2


    MHz

    Slew Rate at Unity Gain

    SR

    VIN = 2.5 Vpp, Gain = 1


    0.4


    V/µs

    Phase Margin

    m



    60


    Gain Margin

    Am



    18


    dB

    Settling Time

    tS

    VIN = 2.5 Vpp,

    Gain = 1

    Settling time to 0.1%


    5


    µs

    Settling time to 0.01%


    6


    Open Loop Output Impedance

    ZOL

    f = 100 Hz


    0.8


    Q

    NOISE CHARACTERISTICS

    Total Harmonic Distortion plus Noise

    THD+N

    VIN = 2.5 Vpp, f = 1 kHz, Av = 1


    0.005


    %

    Input Referred Voltage Noise

    en

    f = 1 kHz


    30


    nV/Hz

    f = 10 kHz


    24


    Input Referred Current Noise

    in

    f = 1 kHz


    300


    fA/Hz

    SUPPLY CHARACTERISTICS

    Power Supply Rejection Ratio

    PSRR

    No Load

    67

    90


    dB

    64



    Power Supply Quiescent Current

    IDD

    Per channel, no load


    42

    60

    µA

  9. Performance guaranteed over the indicated operating temperature range by design and/or characterization.


    ELECTRICAL CHARACTERISTICS AT VS = 5.5 V

    TA = 25C; RL 10 kQ; VCM = VOUT = mid−supply unless otherwise noted.

    Boldface limits apply over the specified temperature range, TA = −40C to 125C. (Note 10)

    Parameter

    Symbol

    Conditions

    Min

    Typ

    Max

    Unit

    INPUT CHARACTERISTICS

    Input Offset Voltage

    VOS



    0.5

    3.5

    mV



    4

    mV

    Offset Voltage Drift

    VOS/T



    1


    µV/C

    Input Bias Current (Note 10)

    IIB



    1


    pA



    1500

    pA

    Input Offset Current (Note 10)

    IOS



    1


    pA



    1100

    pA

    Channel Separation

    XTLK

    DC


    125


    dB

    Differential Input Resistance

    RID



    10


    GQ

    Common Mode Input Resistance

    RIN



    10


    GQ

    Differential Input Capacitance

    CID



    1


    pF

    Common Mode Input Capacitance

    CCM



    5


    pF

    Common Mode Rejection Ratio

    CMRR

    VCM = VSS – 0.2 to VDD + 0.2

    55

    79


    dB

    VCM = VSS + 0.2 to VDD − 0.2

    51



    OUTPUT CHARACTERISTICS

    Open Loop Voltage Gain

    AVOL


    90

    120


    dB

    86



    Short Circuit Current

    ISC

    Output to positive rail, sinking current


    15


    mA

    Output to negative rail, sourcing current


    11


    Output Voltage High

    VOH

    Voltage output swing from positive rail


    3

    24

    mV



    25

    Output Voltage Low

    VOL

    Voltage output swing from negative rail


    3

    24

    mV



    25

    AC CHARACTERISTICS

    Unity Gain Bandwidth

    UGBW



    1.2


    MHz

    Slew Rate at Unity Gain

    SR

    VID = 5 Vpp, Gain = 1


    0.4


    V/µs

    Phase Margin

    m



    60


    Gain Margin

    Am



    17


    dB

    Settling Time

    tS

    VIN = 5 Vpp,

    Gain = 1

    Settling time to 0.1%


    5


    µs

    Settling time to 0.01%


    6


    Open Loop Output Impedance

    ZOL

    f = 100 Hz


    0.8


    Q

    NOISE CHARACTERISTICS

    Total Harmonic Distortion plus Noise

    THD+N

    VIN = 5 Vpp, f = 1 kHz, Av = 1


    0.005


    %

    Input Referred Voltage Noise

    en

    f = 1 kHz


    30


    nV/Hz

    f = 10 kHz


    24


    Input Referred Current Noise

    in

    f = 1 kHz


    300


    fA/Hz

    SUPPLY CHARACTERISTICS

    Power Supply Rejection Ratio

    PSRR

    No Load

    67

    90


    dB

    64



    Power Supply Quiescent Current

    IDD

    Per channel, no load


    48

    70

    µA

  10. Performance guaranteed over the indicated operating temperature range by design and/or characterization.

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.


60


SUPPLY CURRENT (µA)

50

T = 25C


T = 125C


60


SUPPLY CURRENT (µA)

50 VS = 5.5 V


VS = 3.3 V

40 40

30 T = −40C 30 VS = 1.8 V


20 20


10 10


0

1.5


2.0


2.5


3.0


3.5


4.0


4.5


5.0


5.5

0

−40


−20 0


20 40 60


80 100


120


140

SUPPLY VOLTAGE (V) TEMPERATURE (C)

Figure 2. Quiescent Current per Channel vs.

Supply Voltage

Figure 3. Quiescent Current vs. Temperature


0.8


OFFSET VOLTAGE (mV)

0.7


0.6


0.5


0.4


0.3


0.2


0.1

0


T = −40C T = 25C


T = 125C


0.8

OFFSET VOLTAGE (mV)

VS = 1.8 V
















VS = 3.3 V

VS = 5.5 V





















































0.7


0.6


0.5

0.4


0.3


0.2


0.1

0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

−40

−20 0

20 40 60

80 100

120

140

SUPPLY VOLTAGE (V) TEMPERATURE (C)

Figure 4. Offset Voltage vs. Supply Voltage Figure 5. Offset Voltage vs. Temperature


4

3 VS = 5.5 V

OFFSET VOLTAGE (mV)

10 units

2


1


0


−1


−2


−3

−4

140


120


100


GAIN (dB)

80


60


40


20


0

−20


Gain


RL = 10 kQ CL = 15 pF T = 25C


Phase Margin

180


PHASE MARGIN ()

135


90


45


0

−2.75 −2.00

−1.25

−0.50 0

0.50

1.25

2.00

2.75

1 10

100

1k 10k

100k 1M

10M

100M

COMMON MODE VOLTAGE (V) FREQUENCY (Hz)

Figure 6. Offset Voltage vs. Common Mode Voltage

Figure 7. Open−loop Gain and Phase Margin vs. Frequency


60

VS = 5.5 V

50 RL = 10 kQ

PHASE MARGIN ()

T = 25C

40


100


10


THD+N (%)

1


VS = 5.5 V

fIN = 1 kHz AV = 1


30 0.1


20 0.01


10 0.001


0

0 100


200


300


400


500

0.0001


0.01


0.1 1

CAPACITIVE LOAD (pF) OUTPUT VOLTAGE (Vpp)

Figure 8. Phase Margin vs. Capacitive Load Figure 9. THD + N vs. Output Voltage


1


THD+N (%)

0.1


0.01


AV = 1


VS = 1.8 V

VS = 3.3 V VS = 5.5 V

600


VOLTAGE NOISE (nV/Hz)

500


400


300


200


VS = 5.5 V


100


0.001

10


100 1k


10k


100k

0

1 10


100 1k


10k


100k

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 10. THD + N vs. Frequency Figure 11. Input Voltage Noise vs. Frequency


900

CURRENT NOISE (fA/Hz)

800

700

600

500

400

300

200

100

0


VS = 5.5 V

120


100


PSRR (dB)

80


60


40


20


0


VS = 5.5 V, PSRR+

VS = 5.5 V, PSRR−


VS = 1.8 V, PSRR+ VS = 1.8 V, PSRR−

1 10

100 1k

10k

100k

10 100 1k

10k

100k 1M

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 12. Input Current Noise vs. Frequency Figure 13. PSRR vs. Frequency


120


100


CMRR (dB)

80


60


VS = 5.5 V


VS = 1.8 V


VS = 3.3 V


500

OUTPUT VOLTAGE TO POSITIVE RAIL (mV)

AV = 1 VS = 1.8 V

400


300

200

40


20 100

VS = 3.3 V VS = 5.5 V

0

10 100


1k 10k


100k 1M

0

0 2 4


6 8 10 12

FREQUENCY (Hz) OUTPUT CURRENT (mA)

Figure 14. CMRR vs. Frequency Figure 15. Output Voltage High to Rail


OUTPUT VOLTAGE TO NEGATIVE RAIL (mV)

500


400


300


200


100


0


VS = 1.8 V


VS = 3.3 V


VS = 5.5 V

0.10

0.08

0.06

VOLTAGE (V)

0.04

0.02

0

−0.02

−0.04

−0.06

−0.08

−0.10


Input

CL = 10 pF CL = 100 pF

0 2.5

5.0

7.5

10.0

12.5

15.0

−2 −1 0

1 2 3

4 5 6

OUTPUT CURRENT (mA) TIME (µs)

Figure 16. Output Voltage Low to Rail Figure 17. Non−Inverting Small Signal Transient Response


0.10

Input

0.08 CL = 10 pF


1.0

0.8


Input

Output

0.06

VOLTAGE (V)

0.04

0.02

0

−0.02

−0.04

−0.06

−0.08

−0.10

CL = 100 pF

0.6

VOLTAGE (V)

0.4

0.2

0

−0.2

−0.4

−0.6

−0.8

−1.0

−2 −1 0

1 2 3

4 5 6

−5.0

−2.5 0

2.5

5.0

7.5

10.0

12.5 15.0

17.5

TIME (µs) TIME (µs)

Figure 18. Inverting Small Signal Transient Response

Figure 19. Non−Inverting Large Signal Transient Response


2.0


1.5


1.0


VOLTAGE (V)

0.5


0


−0.5


−1.0


−1.5

−2.0


Input

Output


600


















IIB+









IIB−



















IOS


















500


CURRENT (pA)

400


300


200


100


0


−100

−2.5 0

2.5

5.0

7.5

10.0

12.5

15.0

17.5

20.0

−40

−20 0

20 40 60

80 100

120

140

TIME (µs) TEMPERATURE (C)

Figure 20. Inverting Large Signal Transient Response

Figure 21. Input Bias and Offset Current vs.

Temperature






























































6 6


4 4


CURRENT (pA)

2 IIB+


0


−2


−4

2

VOLTAGE (µV)

IIB−

0


IOS −2


−4


−6

0 0.5


1.0


1.5


2.0


2.5


3.0


3.5


4.0


4.5


5.0


5.5

−6

0 1 2 3


4 5 6 7


8 9 10

COMMON MODE VOLTAGE (V) TIME (s)

Figure 22. Input Bias Current vs. Common Mode Voltage

Figure 23. 0.1 Hz to 10 Hz Noise


CHANNEL SEPARATION (dB)

−60


−80


−100


−120


10k 1k 100

OUTPUT IMPEDANCE (Q)

10


1


0.1


AV = 1


VS = 1.8 V


VS = 5.5 V


−140


100 1k


10k


100k


1M 10M

0.01

10


100 1k


10k


100k 1M

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 24. Channel Separation vs. Frequency Figure 25. Output Impedance vs. Frequency


0.6


0.5


SLEW RATE (V/µs)

0.4


0.3


SR+


SR−


0.2


0.1


0

−40


−20 0


20 40 60


80 100


120


140

TEMPERATURE (C)

Figure 26. Slew Rate vs. Temperature


SC−88A (SC−70−5/SOT−353)

CASE 419A−02 ISSUE L


A

G


5

4

−B−

S


1

2

3



0.2 (0.008) M

B M

D 5 PL


N


J

C


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

  2. CONTROLLING DIMENSION: INCH.

  3. 419A−01 OBSOLETE. NEW STANDARD 419A−02.

  4. S A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.



    DIM

    INCHES

    MILLIMETERS

    MIN

    MAX

    MIN

    MAX

    A

    0.071

    0.087

    1.80

    2.20

    B

    0.045

    0.053

    1.15

    1.35

    C

    0.031

    0.043

    0.80

    1.10

    D

    0.004

    0.012

    0.10

    0.30

    G

    0.026 BSC

    0.65 BSC

    H

    ---

    0.004

    ---

    0.10

    J

    0.004

    0.010

    0.10

    0.25

    K

    0.004

    0.012

    0.10

    0.30

    N

    0.008 REF

    0.20 REF

    S

    0.079

    0.087

    2.00

    2.20



    H K

    SOLDER FOOTPRINT

    0.50 0.0197


    0.65 0.025



    ( )

    0.40 0.0157

    0.65 0.025


    1.9

    0.0748


    SCALE 20:1


    mm inches



    NOTE 5


    T

    0.10

    2X


    D 5X

    TSOP−5

    CASE 483

    ISSUE L NOTES:

    1. G AND TOLERANCING PER ASME Y14.5M, 1994.


      0.20

      C

      A

      B

    2. G DIMENSION: MILLIMETERS.

    3. LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.


      T

      0.20

      5 4

      1 2 3

      2X B S


      B G

      A A

      M


      K

      DETAIL Z

    4. S A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A.

    5. CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY.


DIM

MILLIMETERS

MIN

MAX

A

3.00 BSC

B

1.50 BSC

C

0.90

1.10

D

0.25

0.50

G

0.95 BSC

H

0.01

0.10

J

0.10

0.26

K

0.20

0.60

M

0 °

10 °

S

2.50

3.00

TOP VIEW


DETAIL Z

J

C

C


0.05

H

SIDE VIEW


SEATING PLANE


END VIEW


SOLDERING FOOTPRINT*

1.9 0.074

0.95

0.037



1.0

0.039

2.4

0.094






0.7

0.028


SCALE 10:1


mm inches

( )

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.


UDFN6 1.6x1.6, 0.5P

CASE 517AP ISSUE O


D

A

C

2X B

0.10


PIN ONE E


L1 L


DETAIL A


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

  2. CONTROLLING DIMENSION: MILLIMETERS.

  3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND

    0.30 mm FROM TERMINAL.

  4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.

0.10

REFERENCE 2X


0.05 C


C

TOP VIEW


C

DETAIL B


(A3) A

OPTIONAL CONSTRUCTION


EXPOSED Cu


A1

DETAIL B


MOLD CMPD



DIM

MILLIMETERS

MIN

MAX

A

0.45

0.55

A1

0.00

0.05

A3

0.13 REF

b

0.20

0.30

D

1.60 BSC

E

1.60 BSC

e

0.50 BSC

D2

1.10

1.30

E2

0.45

0.65

K

0.20

−−−

L

0.20

0.40

L1

0.00

0.15

A3

6X 0.05 C


DETAIL A 6X L


SIDE VIEW

A1


D2

1 3


SEATING PLANE

OPTIONAL CONSTRUCTION


SOLDERMASK DEFINED MOUNTING FOOTPRINT*

1.26


6X K 6

e

E2


0.10

C

A

B

0.05

C


5 6X b

6X

0.52

0.61

1.90

BOTTOM VIEW

NOTE 3

1

0.50 PITCH


6X

0.32

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.



D


HE


PIN 1 ID e


E


b 8 PL

Micro8M CASE 846A−02 ISSUE J


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

  2. CONTROLLING DIMENSION: MILLIMETER.

  3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED

    0.15 (0.006) PER SIDE.

  4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

  5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.


0.08 (0.003)

M

T

B

S

A

S



−T−



0.038 (0.0015)


SEATING PLANE



DIM

MILLIMETERS

INCHES

MIN

NOM

MAX

MIN

NOM

MAX

A

−−

−−

1.10

−−

−−

0.043

A1

0.05

0.08

0.15

0.002

0.003

0.006

b

0.25

0.33

0.40

0.010

0.013

0.016

c

0.13

0.18

0.23

0.005

0.007

0.009

D

2.90

3.00

3.10

0.114

0.118

0.122

E

2.90

3.00

3.10

0.114

0.118

0.122

e

0.65 BSC

0.026 BSC

L

0.40

0.55

0.70

0.016

0.021

0.028

HE

4.75

4.90

5.05

0.187

0.193

0.199

A


A1 c L



RECOMMENDED SOLDERING FOOTPRINT*

8X

8X 0.48 0.80

5.25


0.65

PITCH

DIMENSION: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.


SOIC−8 NB CASE 751−07 ISSUE AK

−X−

A



0.25 (0.010) M

Y M

8 5


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

  2. CONTROLLING DIMENSION: MILLIMETER.

  3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

  4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

  5. DIMENSION D DOES NOT INCLUDE DAMBAR

    B S

    1

    4

    −Y−


    G


    C


    DIM

    MILLIMETERS

    INCHES

    MIN

    MAX

    MIN

    MAX

    A

    4.80

    5.00

    0.189

    0.197

    B

    3.80

    4.00

    0.150

    0.157

    C

    1.35

    1.75

    0.053

    0.069

    D

    0.33

    0.51

    0.013

    0.020

    G

    1.27 BSC

    0.050 BSC

    H

    0.10

    0.25

    0.004

    0.010

    J

    0.19

    0.25

    0.007

    0.010

    K

    0.40°

    1.27°

    0.016°

    0.050°

    M

    0

    8

    0

    8

    N

    0.25

    0.50

    0.010

    0.020

    S

    5.80

    6.20

    0.228

    0.244

    SEATING


    K


    N X 45°

    PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

  6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.

    −Z−


    H D

    PLANE


    0.10 (0.004)

    M J



    0.25 (0.010)

    M

    Z

    Y

    S

    X

    S


    SOLDERING FOOTPRINT*


    1.52 0.060

    STYLE 11:

    PIN 1. SOURCE 1

    1. GATE 1

    2. SOURCE 2

    3. GATE 2

    4. DRAIN 2

    5. DRAIN 2

    6. DRAIN 1

    7. DRAIN 1


7.0

0.275

4.0

0.155


0.6 0.024

1.270

( )

0.050


SCALE 6:1


mm inches

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.



0.20 (0.008)


U S

T

U S

T

L



0.20 (0.008)


−T−

0.076 (0.003)

SEATING PLANE


2X L/2


PIN 1 IDENT


C


D


8x K REF



1

5

8

B


4


A

−V−


G

TSSOP−8 CASE 948S ISSUE C


−U−


0.10 (0.004)

M

T

U

S

V

S

J J1


K1 K

SECTION N−N


DETAIL E


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

  2. CONTROLLING DIMENSION: MILLIMETER.

  3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

  4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

  5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

  6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-.


−W−


0.25 (0.010)


DIM

MILLIMETERS

INCHES

MIN

MAX

MIN

MAX

A

2.90

3.10

0.114

0.122

B

4.30

4.50

0.169

0.177

C

---

1.10

---

0.043

D

0.05

0.15

0.002

0.006

F

0.50

0.70

0.020

0.028

G

0.65 BSC

0.026 BSC

J

0.09

0.20

0.004

0.008

J1

0.09

0.16

0.004

0.006

K

0.19

0.30

0.007

0.012

K1

0.19

0.25

0.007

0.010

L

6.40 BSC

0.252 BSC

M

°

0

°

8

°

0

°

8

N

M

N


F


DETAIL E



D A

B

14 8


H E

SOIC−14 NB CASE 751A−03 ISSUE K


A3


L


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

  2. CONTROLLING DIMENSION: MILLIMETERS.

  3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION.

  4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS.


    DIM

    MILLIMETERS

    INCHES

    MIN

    MAX

    MIN

    MAX

    A

    1.35

    1.75

    0.054

    0.068

    A1

    0.10

    0.25

    0.004

    0.010

    A3

    0.19

    0.25

    0.008

    0.010

    b

    0.35

    0.49

    0.014

    0.019

    D

    8.55

    8.75

    0.337

    0.344

    E

    3.80

    4.00

    0.150

    0.157

    e

    1.27 BSC

    0.050 BSC

    H

    5.80

    6.20

    0.228

    0.244

    h

    0.25

    0.50

    0.010

    0.019

    L

    0.40

    1.25

    0.016

    0.049

    M

    0 °

    7 °

    0 °

    7 °

  5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

1 7


0.25 M

B M

13X b


0.25 M

C

A S

B S


A

DETAIL A


h

X 45 °


DETAIL A



e A1


M

C

SEATING PLANE


SOLDERING FOOTPRINT*

6.50


1


14X

1.18


1.27

PITCH


14X

0.58


DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.



0.15 (0.006)

U S


T

L

PIN 1 IDENT.


0.15 (0.006)

U S


14X K REF


14



1


2X L/2

A

−V−


TSSOP−14 CASE 948G ISSUE B


U S


0.25 (0.010)

V S

T

0.10 (0.004) M

N

8

M

B

−U−

N

7

F DETAIL E

K K1


NOTES:

  1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

  2. CONTROLLING DIMENSION: MILLIMETER.

  3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

  4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

  5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.

  6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.


    DIM

    MILLIMETERS

    INCHES

    MIN

    MAX

    MIN

    MAX

    A

    4.90

    5.10

    0.193

    0.200

    B

    4.30

    4.50

    0.169

    0.177

    C

    −−−

    1.20

    −−−

    0.047

    D

    0.05

    0.15

    0.002

    0.006

    F

    0.50

    0.75

    0.020

    0.030

    G

    0.65 BSC

    0.026 BSC

    H

    0.50

    0.60

    0.020

    0.024

    J

    0.09

    0.20

    0.004

    0.008

    J1

    0.09

    0.16

    0.004

    0.006

    K

    0.19

    0.30

    0.007

    0.012

    K1

    0.19

    0.25

    0.007

    0.010

    L

    6.40 BSC

    0.252 BSC

    M

    0 °

    8 °

    0 °

    8 °

  7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.


T

J J1


C


SECTION N−N



−W−


0.10 (0.004)

−T−

D

G

SEATING PLANE

H DETAIL E

SOLDERING FOOTPRINT


7.06


1


0.65

PITCH


14X

0.36


14X

1.26


DIMENSIONS: MILLIMETERS


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