2µA Supply Current, Low IB, Zero-Drift Operational Amplifiers
FEATURES DESCRIPTION
n Low Supply Current: 2μA Maximum (per Amplifier)
n Offset Voltage: 5μV Maximum
n Offset Voltage Drift: 0.02μV/°C Maximum
n Input Bias Current:
n 3pA Typical
n 30pA Maximum, –40°C to 85°C
n 100pA Maximum, –40°C to 125°C
n 1.7V to 5.25V Operating Supply Range
n AVOL: 140dB Typical
n Low-Charge Power-Up for Duty Cycled Applications
n Specified Temperature Ranges:
n –40°C to 85°C
n –40°C to 125°C
n SC70, TSOT-23, MS8 and DFN Packages
APPLICATIONS
n Signal Conditioning in Wireless Mesh Networks
n Portable Instrumentation Systems n Low-Power Sensor Conditioning n Gas Detection
n Temperature Measurement
n Medical Instrumentation
n Energy Harvesting Applications
The LTC®2063/LTC2064 are single and dual low power, zero-drift, 20kHz amplifiers. The LTC2063/LTC2064 enable high resolution measurement at extremely low power levels.
Typical supply current is 1.4µA per amplifier with a maxi- mum of 2µA. The available shutdown mode has been optimized to minimize power consumption in duty-cycled applications and features low charge loss during power- up, reducing total system power.
The LTC2063/LTC2064’s self-calibrating circuitry results in very low input offset (5µV max) and offset drift (0.02µV/°C). The maximum input bias current is only 20pA and does not exceed 100pA over the full specified temperature range. The extremely low input bias current of the LTC2063/LTC2064 allows the use of high value power-saving resistors in the feedback network.
With its ultralow quiescent current and outstanding precision, the LTC2063/LTC2064 can serve as a signal chain building block in portable, energy harvesting and wireless sensor applications.
The LTC2063 is available in 6-lead SC70 and 5-lead TSOT-23 packages. The LTC2064 is available in 8-lead MSOP and 10-lead DFN packages. These devices are fully specified over the –40°C to 85°C and –40°C to 125°C temperature ranges.
n Low Power Current Sensing All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
10M
0.1%
OXYGEN SENSOR CITY TECHNOLOGY
40XV
100k
0.1%
100k
0.1%
100n
1.8V
LTC2063
VOUT = 1V IN AIR
ISUPPLY = 1.4µA (ENABLED)
CHARGE 20nC/DIV
VOUT 1V/DIV
VSHDN
0.1%
VSHDN
90nA (SHUTDOWN)
2V/DIV
2063 TA01
For more information www.analog.com
40ms/DIV
2063 TA01b
Rev A
1
Total Supply Voltage (V+ to V–) ................................5.5V
Differential Input Current (+IN to –IN) (Note 2).... ±10mA Differential Input Voltage (+IN to –IN)......................5.5V Input Voltage
+IN, –IN, SHDN...................(V–) – 0.3V to (V+) + 0.3V
Input Current
+IN, –IN, SHDN (Note 2) .................................. ±10mA
Output Short-Circuit Duration
(Note 3) ..........................................Thermally Limited
Operating and Specified Temperature Range (Note 4) LTC2063I/LTC2064I............................. –40°C to 85°C
LTC2063H/LTC2064H........................ –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. –65°C to 150°C
–
LTC2063 TOP VIEW +IN 1 6 V+ V– 2 + 5 SHDN – –IN 3 4 OUT SC6 PACKAGE 6-LEAD PLASTIC SC70 θJA = 265°C/W (Note 5) | LTC2063 TOP VIEW OUT 1 5 V+ V– 2 + +IN 3 4 –IN S5 PACKAGE 5-LEAD PLASTIC TSOT-23 θJA = 215°C/W (Note 5) |
LTC2064 TOP VIEW OUTA 1 10 V+ –INA 2 A 9 OUTB +INA 3 B 8 –INB V– 4 7 +INB NC 5 11 6 SHDN DD PACKAGE 10-LEAD (3mm 3mm) PLASTIC DFN JA = 43°C/W, JC = 5.5°C/W (Note 5) EXPOSED PAD (PIN 11) IS CONNECTED TO V– (PIN 4) (PCB CONNECTION OPTIONAL) | LTC2064 TOP VIEW OUTA 1 8 V+ –INA 2 A 7 OUTB +INA 3 B 6 –INB V– 4 5 +INB MS8 PACKAGE 8-LEAD PLASTIC MSOP JA = 163°C/W, JC = 40°C/W (Note 5) |
TAPE AND REEL (MINI) | TAPE AND REEL | PART MARKING* | PACKAGE DESCRIPTION | TEMPERATURE RANGE |
LTC2063ISC6#TRMPBF | LTC2063ISC6#TRPBF | LGTX | 6-Lead Plastic SC70 | –40°C to 85°C |
LTC2063HSC6#TRMPBF | LTC2063HSC6#TRPBF | LGTX | 6-Lead Plastic SC70 | –40°C to 125°C |
LTC2063IS5#TRMPBF | LTC2063IS5#TRPBF | LTGTW | 5-Lead Plastic TSOT-23 | –40°C to 85°C |
LTC2063HS5#TRMPBF | LTC2063HS5#TRPBF | LTGTW | 5-Lead Plastic TSOT-23 | –40°C to 125°C |
TAPE AND REEL (MINI) | TAPE AND REEL | PART MARKING* | PACKAGE DESCRIPTION | TEMPERATURE RANGE |
LTC2064IMS8#TRMPBF | LTC2064IMS8#TRPBF | LTHCX | 8-Lead Plastic MSOP | –40°C to 85°C |
LTC2064HMS8#TRMPBF | LTC2064HMS8#TRPBF | LTHCX | 8-Lead Plastic MSOP | –40°C to 125°C |
LTC2064IDD#TRMPBF | LTC2064IDD#TRPBF | LHCW | 10-Lead (3mm × 3mm)Plastic DFN | –40°C to 85°C |
LTC2064HDD#TRMPBF | LTC2064HDD#TRPBF | LHCW | 10-Lead (3mm × 3mm)Plastic DFN | –40°C to 125°C |
Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Parts ending with PBF are RoHS and WEEE compliant.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
SYMBOL | PARAMETER | CONDITIONS | MIN TYP MAX | UNITS | |
VOS | Input Offset Voltage (Note 6) | VS = 1.7V | l | 1 ±5 ±10 | μV μV |
ΔVOS/ΔT | Input Offset Voltage Drift (Note 6) | –40°C to 85°C –40°C to 125°C | l l | ±0.03 ±0.06 | μV/°C µV/°C |
IB | Input Bias Current (Note 7) | 0.5 | pA | ||
IOS | Input Offset Current (Note 7) | 1 | pA | ||
in | Input Noise Current Spectral Density | f ≤ 100Hz | 12 | fA/√Hz | |
en | Input Noise Voltage Spectral Density | f ≤ 100Hz | 230 | nV/√Hz | |
en P-P | Input Noise Voltage | DC to 10Hz | 4.8 | μVP–P | |
CIN | Input Capacitance | Differential Common Mode | 3.3 3.5 | pF pF | |
VCMR | Input Voltage Range | Guaranteed by CMRR | l | (V–) – 0.1 (V+) + 0.1 | V |
CMRR | Common Mode Rejection Ratio (Note 8) | VCM = (V–) – 0.1V to (V+) + 0.1V RL = 499k | l | 103 130 100 | dB dB |
PSRR | Power Supply Rejection Ratio | VS = 1.7V to 5.25V RL = 499k | l | 108 126 106 | dB dB |
AVOL | Open Loop Gain | VOUT = (V–) + 0.1V to (V+) – 0.1V, RL = 499k | 135 | dB | |
VOL | Output Voltage Swing Low (VOUT – V–) | RL = 499k | 0.05 | mV | |
RL = 10k | l | 3 10 20 | mV mV | ||
VOH | Output Voltage Swing High (V+ – VOUT) | RL = 499k | 0.1 | mV | |
RL = 10k | l | 4.5 10 50 | mV mV | ||
ISC | Output Short Circuit Current | Sourcing | l | 5.8 7.5 5.6 | mA mA |
Sinking | l | 10.4 13 5 | mA mA |
SYMBOL | PARAMETER | CONDITIONS | MIN TYP MAX | UNITS | |
SR | Slew Rate | AV = +1 | 3.5 | V/ms | |
GBW | Gain Bandwidth Product | RL = 499k | 20 | kHz | |
tON | Power-Up Time | 2 | ms | ||
fC | Internal Chopping Frequency | 5 | kHz | ||
VS | Supply Voltage Range | Guaranteed by PSRR | l | 1.7 5.25 | V |
IS | Supply Current per Amplifier | No Load –40°C to 85°C –40°C to 125°C | l l | 1.3 2 2.5 4 | μA μA µA |
In Shutdown (SHDN = V–) –40°C to 85°C –40°C to 125°C | l l | 90 170 250 500 | nA nA nA | ||
VH | SHDN Pin Threshold, Logic High (Referred to V–) | l | 1.0 | V | |
VL | SHDN Pin Threshold, Logic Low (Referred to V–) | l | 0.65 | V | |
ISHDN | SHDN Pin Current | VSHDN = 0V | l | –150 –20 | nA |
SYMBOL | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNITS | |
VOS | Input Offset Voltage (Note 6) | VS = 5.25V | l | 1 | ±5 ±10 | μV μV | |
ΔVOS/ΔT | Input Offset Voltage Drift (Note 6) | –40°C to 85°C –40°C to 125°C | l l | ±0.02 ±0.05 | μV/°C µV/°C | ||
IB | Input Bias Current | –40°C to 85°C –40°C to 125°C | l l | –3 | ±20 ±30 ±100 | pA pA pA | |
IOS | Input Offset Current | –40°C to 85°C –40°C to 125°C | l l | 1.5 | ±20 ±30 ±100 | pA pA pA | |
in | Input Noise Current Spectral Density | f ≤ 100Hz | 12 | fA/√Hz | |||
en | Input Noise Voltage Spectral Density | f ≤ 100Hz | 220 | nV/√Hz | |||
en P–P | Input Noise Voltage | DC to 10Hz | 4.6 | μVP–P | |||
CIN | Input Capacitance | Differential Common Mode | 3.3 3.5 | pF pF | |||
VCMR | Input Voltage Range | Guaranteed by CMRR | l | (V–) – 0.1 | (V+) + 0.1 | V | |
CMRR | Common Mode Rejection Ratio | VCM = (V–) – 0.1V to (V+) + 0.1V RL = 499k | l | 111 108 | 130 | dB dB | |
PSRR | Power Supply Rejection Ratio | VS = 1.7V to 5.25V RL = 499k | l | 108 106 | 126 | dB dB | |
EMIRR | EMI Rejection Ratio VRF = 100mVPK EMIRR = 20 • log(VRF/ΔVOS) | f = 400MHz f = 900MHz f = 1800MHz f = 2400MHz | 81 102 114 100 | dB dB dB dB | |||
AVOL | Open Loop Gain | VOUT = (V–) + 0.1V to (V+) – 0.1V, RL = 499k | l | 112 110 | 140 | dB dB |
SYMBOL | PARAMETER | CONDITIONS | MIN | TYP MAX | UNITS | |
VOL | Output Voltage Swing Low (VOUT – V–) | RL = 499k | 0.1 | mV | ||
RL = 10k | l | 5.5 15 20 | mV mV | |||
VOH | Output Voltage Swing High (V+ – VOUT) | RL = 499k | 0.15 | mV | ||
RL = 10k | l | 7 15 20 | mV mV | |||
ISC | Output Short Circuit Current | Sourcing | l | 30 16 | 51 | mA mA |
Sinking | l | 20 5 | 48 | mA mA | ||
SR | Slew Rate | AV = +1 | 3.5 | V/ms | ||
GBW | Gain Bandwidth Product | RL = 499k | 20 | kHz | ||
tON | Power-Up Time | 2 | ms | |||
fC | Internal Chopping Frequency | 5 | kHz | |||
VS | Supply Voltage Range | Guaranteed by PSRR | l | 1.7 | 5.25 | V |
IS | Supply Current per Amplifier | No Load –40°C to 85°C –40°C to 125°C | l l | 1.4 2 2.5 4 | μA μA µA | |
In Shutdown (SHDN = V–) –40°C to 85°C –40°C to 125°C | l l | 90 170 250 500 | nA nA nA | |||
VH | SHDN Pin Threshold, Logic High (Referred to V–) | l | 1.8 | V | ||
VL | SHDN Pin Threshold, Logic Low (Referred to V–) | l | 0.8 | V | ||
ISHDN | SHDN Pin Current | VSHDN = 0V | l | –150 | –20 | nA |
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The inputs are protected by two series connected ESD protection diodes to each power supply. The input current should be limited to less than 10mA. The input voltage should not exceed 300mV beyond the power supply.
Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely.
Note 4: The LTC2063I/LTC2064I are guaranteed to meet specified performance from –40°C to 85°C. The LTC2063H/LTC2064H are guaranteed to meet specified performance from –40°C to 125°C.
Note 5: Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads.
Note 6: These parameters are guaranteed by design. Thermocouple effects preclude measurements of these voltage levels during automated testing. VOS is measured to a limit determined by test equipment capability.
Note 7: Input bias current is only production tested at 5V. Input bias current at 1.8V is expected to meet or exceed 5V specifications.
Note 8: Minimum specifications for these parameters are limited by noise and the capabilities of the automated test system.
60 60
233 TYPICAL UNITS VS = 5V
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
50 50
40 40
30 30
20 20
60
233 TYPICAL UNITS
VS = 5V
NUMBER OF AMPLIFIERS
50 TA = –40°C to 125°C
40
30
20
10
0
–5 –4 –3 –2 –1 0 1 2 3 4 5
VOS (µV)
2063 G01
10
233 TYPICAL UNITS | ||||||||||||
VS = 1.8V | ||||||||||||
0
–5 –4 –3 –2 –1 0 1 2 3 4 5
VOS (µV)
2063 G02
10
0
0 5 10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
2063 G03
50
233 TYPICAL UNITS
VS = 1.8V
NUMBER OF AMPLIFIERS
40 TA = –40°C to 125°C
30
20
10
0
0 5 10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
2063 G04
120
110
100
NUMBER OF AMPLIFIERS
90
80
70
60
50
40
30
20
10
0
233 TYPICAL UNITS
VS = 5V TA = –40°C to 85°C
0 5 10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
2063 G05
100
90
NUMBER OF AMPLIFIERS
80
70
60
50
40
30
20
10
0
233 TYPICAL UNITS
VS = 1.8V TA = –40°C to 85°C
0 5 10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
2063 G06
5 TYPICAL UNITS VS = 5V TA = 25°C | |||||||||||
5
4
3
2
VOS (µV)
1
0
–1
–2
–3
–4
–5
5 TYPICAL UNITS | ||||||
VS = 1.8V TA = 25°C | ||||||
5
4
3
2
VOS (µV)
1
0
–1
–2
–3
–4
–5
10
8
6
4
VOS (µV)
2
0
–2
–4
–6
–8
–10
5 TYPICAL UNITS VCM = VS/2 TA = 25°C | |||||||||
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCM (V)
2063 G07
–0.5 0 0.5 1 1.5 2 2.5
VCM (V)
2063 G08
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VS (V)
2063 G09
1000
2000
10
NUMBER OF AMPLIFIERS
800
600
400
200
0
4050 TYPICAL UNITS VS = 5V
TA = 25°C
NUMBER OF AMPLIFIERS
1600
1200
800
400
0
4050 TYPICAL UNITS VS = 1.8V
TA = 25°C
8
6
4
IB (pA)
2
0
–2
–4
–6
–8
–10
VS = 5V
IB (+IN)
IB (–IN)
–8 –7 –6 –5 –4 –3 –2 –1 0 1 2
INPUT BIAS CURRENT (pA)
2063 G10
–5 –4 –3 –2 –1 0 1 2 3 4 5
INPUT BIAS CURRENT (pA)
2063 G11
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
2063 G12
10
8 VS
= 5V
5
VS = 1.8V
10
VCM
= VS/2
6
4
IB (pA)
2
0
–2
–4
–6
–8
–10
TA = 25°C
IB (+IN)
4 TA = 25°C
3
2
IB (pA)
1
0
–1
–2
–3
–4
–5
IB (+IN)
IB (–IN)
IB (–IN)
8
6
4
IB (pA)
2
0
–2
–4
–6
–8
–10
TA = 25°C
IB (+IN)
IB (–IN)
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCM (V)
2063 G13
–0.5 0 0.5 1 1.5 2 2.5
VCM (V)
2063 G14
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VS (V)
2063 G15
10
V = 5V
5
INPUT REFERRED VOLTAGE NOISE (1µV/DIV)
VS = 1.8V
8
6
4
IB (pA)
2
0
–2
–4
–6
–8
–10
S
TA = 25°C
IOS
IAVG
4 TA 3
2
IB (pA)
1
0
–1
–2
–3
–4
–5
= 25°C
IOS
IAVG
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCM (V)
2063 G16
–0.5 0 0.5 1 1.5 2 2.5
VCM (V)
2063 G17
TIME (1s/DIV)
2063 G18
VOLTAGE NOISE DENSITY (nV/√Hz)
10k
1k
1k
CURRENT NOISE DENSITY (fA/√Hz)
VS = 5V VCM = 2.5V
120
100
EMIRR (dB)
100 80
100
10
VS = 1.8V
VS = 5V
10
60
VIN = 100mVPK EMIRR = 20log(100mV/∆VOS)
40
0.1 1 10 100 1k 10k 100k
FREQUENCY (Hz)
2063 G19
0.1 1 10 100 1k 10k 50k
FREQUENCY (Hz)
2063 G20
0.05 0.1 1 4
RF FREQUENCY (GHz)
2063 G21
140
120
VS = 5V
RL = 499kΩ
VS = 5V
RL = 499kΩ
70
120
100
CMRR (dB)
80
60
40
20
VS = 5V
RL = 499kΩ
100
PSRR (dB)
80
60
40
20
–PSRR
+PSRR
60
AV = +100
CLOSED LOOP GAIN (dB)
50
40
30
20
10
0
–10
–20
AV = +1000
AV = +10
AV = +1
AV = –1
0
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
2063 G22
0
1 10 100 1k 10k 100k
FREQUENCY (Hz)
2063 G23
–30
1 10 100 1k 10k 100k
FREQUENCY (Hz)
2063 G24
140
120
100
GAIN (dB)
80
60
40
20
VS = 5V
RL = 499kΩ
PHASE
GAIN
0
–30
–60
–90
–120
–150
–180
140
120
100
GAIN (dB)
80
PHASE (°)
60
40
20
VS = 1.8V RL = 499kΩ
PHASE
GAIN
0
–30
–60
PHASE (°)
–90
–120
–150
–180
0 CL = 0pF
–210
0 CL = 0pF
–210
–20
–40
CL = 47pF
CL = 100pF
–240
–270
–20 CL = 47pF
CL = 100pF
–40
–240
–270
100µ 1m 10m 100m 1 10 100 1k 10k 100k 1M FREQUENCY (Hz)
2063 G25
100µ 1m 10m100m 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
2063 G26
Rev A
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
VS = 5V AV = +1 | ||||||||||
VSHDN | ||||||||||
IS | ||||||||||
VIN VOUT | ||||||||||
6
5
4
3
2
1
0
–1 0 1 2 3 4 5 6 7 8 9
TIME (ms)
0.4
0.3
0.2
0.1
0
–0.1
–0.2
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
VS = 1.8V AV = +1 | ||||||||||
IS | ||||||||||
VSHDN VIN | ||||||||||
VOUT | ||||||||||
5
4
3
2
1
INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
0
–1 0 1 2 3 4 5 6 7 8 9
TIME (ms)
0.4
INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
0.3
0.2
0.1
0
–0.1
–0.2
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
VS = 5V, AV = +1 | VSHDN | ||||||||
IS | |||||||||
VOUT | |||||||||
VIN |
6
5
4
3
2
1
0
0.4
0.3
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
5
4
3
2 VSHDN
1 IS
INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
0
VS = 1.8V AV = +1
INPUT VOLTAGE (V) OUTPUT VOLTAGE (V)
0.4
0.3
0.2
0.1
0
–0.1
–0.2
VIN
VOUT
0.2
0.1
0
–0.1
–0.2
–1 0 1 2 3 4 5 6 7 8 9
TIME (ms)
–1 0 1 2 3 4 5 6 7 8 9
TIME (ms)
2063 G30
1M
10G
0
100k
VS = 5V AV = +1
VS = 5V
1G AV = +1
CROSSTALK (dB)
–20
RL = 10k
10k
100M
–40
ZOUT (Ω)
ZOUT (Ω)
1k 10M 60
100 1M 80
10
1
0.1
100k
10k 1k
–100
–120
–140
B to A A to B
1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
2063 G31
1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
2063 G32
100 1k 10k 100k 1M
FREQUENCY (Hz)
2063 G65
Rev A
–20
MAXIMUM UNDISTORTED OUTPUT VOLTAGE (VP-P)
125°C | ||||||||||
85°C 25°C –40°C | ||||||||||
6 2.5
RL=10kΩ
5 RL=100kΩ
AV = +1
VS = ±2.5V VOUT = ±2V
TOTAL HARMONIC DISTORTION (dB)
–40
–60
–80 RL=499kΩ
RL=100kΩ
RL=10kΩ
4
3
2
1 AV = +1
VS = ±2.5V
THD < –40dB
0
RL=499kΩ
2.0
IS PER AMPLIFIER (µA)
1.5
1.0
0.5
0
–100
20 100 500
FREQUENCY (Hz)
2063 G33
VS = 5V | ||||||
VS = 1.8V | ||||||
20 100 1k 2k
FREQUENCY (Hz)
2063 G34
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VS (V)
2063 G35
2.2
2.0
IS PER AMPLIFIER (µA)
1.8
1.6
1.4
1.2
1.0
0.8
10
9 VS = 5V
IS PER AMPLIFIER (µA)
8
7
6
5
4
3
2
1
0
25°C
–40°C
85°C
125°C
3.0
IS PER AMPLIFIER (µA)
2.5
2.0
1.5
1.0
0.5
0
VS = 1.8V
125°C
85°C
25°C
–40°C
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
2063 G36
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
SHDN PIN VOLTAGE (V)
2063 G37
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
SHDN PIN VOLTAGE (V)
2063 G38
20
10
0
–10
–20
VS = 5V
20
10
0
–10
–20
VSHDN = 0V | ||||||
–30
VS = 1.8V
–40
ISHDN (nA)
–30
–40
–50
–60
–70
–80
–90
–100
–40°C
25°C
85°C
125°C
–1 0 1 2 3 4 5 6
VSHDN (V)
2063 G39
–30
ISHDN (nA)
–40
–50
–60
–70
–80
–90
–100
–40°C 25°C
85°C
125°C
–1 –0.5 0 0.5 1 1.5 2
VSHDN (V)
2063 G40
–50
ISHDN (nA)
–60
–70
–80
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
2063 G41
400
IS PER AMPLIFIER (nA)
300
200
100
0
125°C
85°C
25°C
–40°C
300
IS PER AMPLIFIER (nA)
250
200
150
100
50
VS = 5V
VS = 1.8V
10
1
V+ – VOH (V)
100m
10m 1m 100µ
10µ
VS = 5V
125°C
85°C
25°C
–40°C
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VS (V)
2063 G42
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
2063 G43
0.001 0.01 0.1 1 10 100
ISOURCE (mA)
2063 G44
10
VS = 1.8V
1
10
VS = 5V
1
10
VS = 1.8V
1
V+ – VOH (V)
100m
100m
100m
10m
10m
10m
1m 100µ
10µ
VOL – V– (V)
125°C
85°C
25°C
–40°C
1m 100µ
10µ
125°C
85°C
25°C
–40°C
1m 100µ
10µ
VOL – V– (V)
125°C
85°C
25°C
–40°C
0.001 0.01 0.1 1 10 100
ISOURCE (mA)
2063 G45
0.001 0.01 0.1 1 10 100
ISINK (mA)
2063 G46
0.001 0.01 0.1 1 10 100
ISINK (mA)
2063 G47
6
AV = +1
5 VS = +5V
VIN = 5.6VP-P
VOLTAGE (V)
4
3
2
1
VS = 5V | ||||||
SOURCING | ||||||
SINKING | ||||||
90
80
70
60
ISC (mA)
50
40
30
20
20
VS = 1.8V
15
ISC (mA)
SINKING
10
5 SOURCING
0 VOUT
VIN
–1
1ms/DIV
2063 G48
10
0
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
2063 G49
0
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
2063 G50
VS = ±2.5V | ||||||||||
AV = +1 | ||||||||||
VS = ±0.9V | ||||||||||
AV = +1 | ||||||||||
40
L
C = 100pF
VOUT 1V/DIV
1ms/DIV
2063 G51
VOUT 0.5V/DIV
1ms/DIV
30
20
VOUT (mV)
10
0
–10
–20
2063 G52
CL = 3.9pF
VS = 5V
–30
–40
VIN = ±25mV AV = +1
TIME (100µs/DIV)
2063 G53
40
CL = 100pF
VS = 5V VIN = 50mV AV = +1 | |||||||||||||||||
+OS | |||||||||||||||||
–OS | |||||||||||||||||
40
VS = 1.8V VIN = 50mV AV = +1
40
30
20
VOUT (mV)
10
0
–10
–20
–30
–40
VS = 1.8V VIN = ±25mV AV = +1
TIME (100µs/DIV)
CL = 3.9pF
2063 G54
35
OVERSHOOT (%)
30
25
20
15
10
5
0
1 10 100 1000
CL (pF)
2063 G55
35
OVERSHOOT (%)
30
25
20 +OS
–OS
15
10
5
0
1 10 100 1000
CL (pF)
2063 G56
VS = ±2.5V AV = –100 | |||||||||
VOUT 1V/DIV
VIN 50mV/DIV
VOUT 0.5V/DIV
VIN 50mV/DIV
VS = ±2.5V AV = –100 | |||||||||
VS = ±0.9V AV = –100
VOUT 1V/DIV
VIN 50mV/DIV
VOUT 0.5V/DIV
VIN 50mV/DIV
VS = ±0.9V AV = –100
VIN 1V/DIV
VOUT 1V/DIV
VS = ±2.5V AV = +1 | |||||||||
VS = ±0.9V AV = +1 | |||||||||
VIN 0.5V/DIV
VOUT 0.5V/DIV
2ms/DIV
2063 G60
200µs/DIV
2063 G61
200µs/DIV
2063 G62
VIN 1V/DIV
VIN 0.5V/DIV
VOUT 1V/DIV
200µs/DIV
VS = ±2.5V AV = +1 | |||||||||
2063 G63
VOUT 0.5V/DIV
200µs/DIV
VS = ±0.9V AV = +1 | |||||||||
2063 G64
SHDN: Shutdown Control Pin. The SHDN pin threshold is referenced to V–. If tied to V+, the part is enabled. If tied to V–, the part is disabled and draws less than 170nA of supply current per amplifier. It is recommended to not float this pin.
+IN
–IN
V+
V+ V+
V–
7k
V– EMI +
V+ FIL7TkER –
V– V–
V–
OUT
2063 BDa
SHDN
V+
10k
V–
V+
50nA
SHDN
2063 BDb
The LTC2063/LTC2064 are single and dual zero-drift operational amplifiers with the open-loop voltage gain and bandwidth characteristics of a conventional opera- tional amplifier. Advanced circuit techniques allow the LTC2063/LTC2064 to operate continuously through its entire bandwidth while self-calibrating unwanted errors.
Zero-drift amplifiers like the LTC2063/LTC2064 achieve low input offset voltage and 1/f noise by heterodyning DC and flicker noise to higher frequencies. In early zero-drift amplifiers, this process resulted in idle tones at the self- calibration frequency, often referred to as the chopping frequency. These artifacts made early zero-drift amplifiers difficult to use. The advanced circuit techniques used by the LTC2063/LTC2064 suppress these spurious artifacts, allowing for trouble-free use.
For applications with high source and feedback imped- ances, input current noise can be a significant contributor to total output noise. For this reason, it is important to consider noise current interaction with circuit elements placed at the amplifier’s inputs.
1k
CURRENT NOISE DENSITY (fA/√Hz)
VS = 5V VCM = 2.5V
100
10
0.1 1 10 100 1k 10k 50k
The current noise spectrum of the LTC2063/LTC2064 is shown in Figure 1. Low input current noise is achieved through the use of MOSFET input devices and self-calibra- tion techniques to eliminate 1/f current noise. As with all zero-drift amplifiers, there is an increase in current noise at the offset-nulling frequency. This phenomenon is dis- cussed in the Input Bias Current and Clock Feedthrough section.
Input current noise also rises with frequency due to capacitive coupling of MOSFET channel thermal noise.
The input bias current of zero-drift amplifiers has differ- ent characteristics than that of a traditional operational amplifier. The specified input bias current is the DC aver- age of transient currents which conduct due to the input stage’s switching circuitry. In addition to this, junction leakages can contribute additional input bias current at elevated temperatures. Through careful design and the use of an innovative boot-strap circuit the input bias cur- rent of the LTC2063/LTC2064 does not exceed 20pA at room and 100pA over the full temperature range. This minimizes bias current induced errors even in high imped- ance circuits.
Transient switching currents at the input interact with source and feedback impedances producing error volt- ages which are indistinguishable from a valid input signal. The resulting error voltages are amplified by the ampli- fier’s closed-loop gain, which acts as a filter, attenuating frequency components above the circuit bandwidth. This phenomenon is known as clock feedthrough and is pres- ent in all zero-drift amplifiers. Understanding the cause and effect of clock feedthrough is important when using zero-drift amplifiers.
For zero-drift amplifiers, clock feedthrough is propor- tional to source and feedback impedances, as well as the
FREQUENCY (Hz)
2063 F01
magnitude of the transient currents. These transient cur-
rents have been minimized in the LTC2063/LTC2064 to allow use with high source and feedback impedances. Many circuit designs require high feedback impedances
to minimize power consumption and/or require a sensor which is intrinsically high impedance. In these cases, a capacitor can be used, either at the input or across the feedback resistor, to limit the bandwidth of the closed- loop system. Doing so will effectively filter out the clock feedthrough signal.
In order to achieve accuracy on the microvolt level, ther- mocouple effects must be considered. Any connection of dissimilar metals forms a thermoelectric junction and generates a small temperature-dependent voltage. Also
3.0
2.8
MICROVOLTS REFERRED TO 25°C
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
25
30 35
TEMPERATURE (°C)
40 45
2063 F02
known as the Seebeck Effect, these thermal EMFs can be the dominant error source in low-drift circuits.
Connectors, switches, relay contacts, sockets, resistors, and solder are all candidates for significant thermal EMF generation. Even junctions of copper wire from different
THERMALLY PRODUCED VOLTAGE IN MICROVOLTS
100
SLOPE ≈ 1.5µV/°C BELOW 25°C
manufacturers can generate thermal EMFs of 200nV/°C,
which significantly exceeds the maximum drift specifica- tion of the LTC2063/LTC2064. Figures 2 and 3 illustrate
the potential magnitude of these voltages and their sen-
50
64% SN/36% Pb
0
60% Cd/40% SN
sitivity to temperature.
In order to minimize thermocouple-induced errors, atten- tion must be given to circuit board layout and component selection. It is good practice to minimize the number of
–50
–100
0
SLOPE ≈ 160nV/°C BELOW 25°C
10 20 30 40 50
junctions in the amplifier’s input signal path and avoid con- nectors, sockets, switches, and relays whenever possible. If such components are required, they should be selected for low thermal EMF characteristics. Furthermore, the num- ber, type, and layout of junctions should be matched for both inputs with respect to thermal gradients on the cir- cuit board. Doing so may involve deliberately introducing dummy junctions to offset unavoidable junctions.
SOLDER-COPPER JUNCTION DIFFERENTIAL TEMPERATURE SOURCE: NEW ELECTRONICS 02-06-77
2063 F03
Leakage currents into high impedance signal nodes can easily degrade measurement accuracy of sub-nanoamp signals. High voltage and high temperature applications are especially susceptible to these issues. Quality insula- tion materials should be used, and insulating surfaces should be cleaned to remove fluxes and other residues. For humid environments, surface coating may be neces- sary to provide a moisture barrier.
HEAT SOURCE/ POWER DISSIPATOR
THERMAL GRADIENT
VIN
**
MATCHING RELAY
VTHERMAL
VTHERMAL
+–
+–
†
RELAY
RF #
RG** ‡ NC
LTC2063
OUT
+IN
R
§ L
–IN
RG
R
§ F
* #
2063 F04
* CUT SLOTS IN PCB FOR THERMAL ISOLATION.
** INTRODUCE DUMMY JUNCTIONS AND COMPONENTS TO OFFSET UNAVOIDABLE JUNCTIONS OR CANCEL THERMAL EMFs.
† ALIGN INPUTS SYMMETRICALLY WITH RESPECT TO THERMAL GRADIENTS.
‡ INTRODUCE DUMMY TRACES AND COMPONENTS FOR SYMMETRICAL THERMAL HEAT SINKING.
§ LOADS AND FEEDBACK CAN DISSIPATE POWER AND GENERATE THERMAL GRADIENTS. BE AWARE OF THEIR THERMAL EFFECTS.
# COVER CIRCUIT TO PREVENT AIR CURRENTS FROM CREATING THERMAL GRADIENTS.
LEAKAGE CURRENT
NO SOLDER MASK OVER GUARD RING
GUARD RING
VBIAS
HIGH-Z SENSOR
‡
RF§
–IN
+IN
V– V–
V+
OUT
VOUT
V+
‡ NO LEAKAGE CURRENT, V–IN = V+IN
§ AVOID DISSIPATING SIGNIFICANT AMOUNTS OF POWER IN THIS RESISTOR.
IT WILL GENERATE THERMAL GRADIENTS WITH RESPECT TO THE INPUT PINS AND LEAD TO THERMOCOUPLE-INDUCED ERROR. THERMALLY ISOLATE OR ALIGN WITH INPUTS IF RESISTOR WILL CAUSE HEATING.
VBIAS
GUARD RING RF
HIGH-Z SENSOR
V
+
VIN RIN
– + –
LEAKAGE CURRENT
LTC2063
+
V–
VOUT
LEAKAGE CURRENT IS ABSORBED BY GROUND INSTEAD OF CAUSING A MEASUREMENT ERROR.
2063 F05
The LTC2063 in the SC70 package and the LTC2064 in the DFN package feature a shutdown mode for low-power applications. In the OFF state, each amplifier draws less than 170nA of supply current and the outputs present a high impedance to external circuitry.
Shutdown operation is accomplished by tying SHDN below VL. If the shutdown feature is not required, it is recommended that SHDN be tied to V+. A current source pulls the SHDN pin high to automatically keep the ampli- fier in the ON state when the pin is floated, however this may not be reliable at elevated temperatures due to board leakage (see SHDN Circuit Block Diagram). For operation
available to take the system up to nominal voltages. In other cases, this transient power-up current will lead to added power loss in duty-cycled applications.
A way to quantify the transient current loss is to inte- grate the supply current during power-up to examine the total charge loss. If there were no additional transient current, the integrated supply current would appear as a smooth, straight line with a slope equal to the DC sup- ply current of the part. Any deviation from a straight line indicates additional transient current that is drawn from the supply. The LTC2063/LTC2064 have been designed to minimize this charge loss during power-up so that power can be conserved in duty-cycled applications. Figure 6 shows the integrated supply current (i.e. charge) of the LTC2063 during power-up. Likewise, Figure 7 shows the charge loss due to enabling and disabling the part via the SHDN pin.
1V/µs V– EDGE RATE V+ = 5V | |||||||||
V– 5V/DIV
VOUT 2V/DIV
QV+ 2nC/DIV
in noisy environments, a capacitor between SHDN and V+
500µs/DIV
2063 F06
is recommended to prevent noise from changing the shut- down state. When there is a danger of SHDN being pulled beyond the supply rails, resistance in series with the SHDN pin is recommended to limit the resulting current.
Micropower op amps are often not micropower during start-up, which can cause problems when used on low current supplies. Large transient currents can conduct during power-up until the internal bias nodes settle to their final values. A large amount of current can be drawn from the supplies during this transient, which can sustain for several milliseconds in the case of a micropower part. In the worst case, there may not be enough supply current
VSHDN 5V/DIV
VOUT 2V/DIV
QV+ 2nC/DIV
2063 F07
500µs/DIV
There are benefits when the SHDN pin is used to disable and enable the part in duty-cycled applications, rather than powering down the external supply voltage (V+). Powering up and powering down the external supply will tend to waste charge due to charging and discharging the external decoupling capacitors. For these power-cycled applications, a relay or MOS device can be located after the decoupling capacitors to alleviate this, however there are drawbacks to this approach. The LTC2063 draws an initial charge of approximately 2nC when powered up. This recurring charge loss is unavoidable in power-cycled applications. Additionally, if the supply ramp rate exceeds 0.4V/µs, an internal transient ESD clamp will trigger, con- ducting additional current from V+ to V–. This will waste charge and can make insignificant any gain that may have been expected by power-cycling the supply. Figure 8 shows the charge loss at power-up.
The shutdown pin can be used to overcome these limita- tions in duty-cycled applications. The typical charge loss transitioning into and out of shutdown is only 1nC. Since the supply is not transitioned, the external decoupling capacitors do not draw charge from the supply.
CHARGE CONSUMED TO 0.1% SETTLED POINT (nC)
100
10
This low power precision gas sensor circuit operates in an oxygen level range of 0% to 30%, with a nominal out- put of 1V in normal atmospheric oxygen concentrations (20.9%) when the gas sensor has been fully initialized. Total active power consumption is less than 2.1μA on a single rail supply.
Since this gas sensor produces 100μA in a normal oxy- gen environment and requires a 100Ω load resistor, the resulting input signal is typically around 10mV. The LTC2063’s rail-to-rail input means no additional DC level shifting is necessary, all the way down to very low oxygen concentrations.
Due to the extremely low input offset voltage of the LTC2063, which is 1μV typically and 5μV maximum, it is possible to gain up the mV-scale input signal substantially without introducing significant error. In the configuration shown in Figure 9, with a noninverting gain of 101V/V, the worst-case input offset results in a maximum of 0.5mV offset on the 1V output, or 0.05% error.
Although the 100kΩ resistor in series with the gas sen- sor does not strictly have the same precision requirement as the 10MΩ and 100kΩ resistors that set the gain, it is important to use a similar resistor at both input terminals. This helps to minimize additional offset voltage at the inputs due to thermocouple effects, hence the similar 0.1% preci- sion requirement.
1
0.1 1 2
SUPPLY EDGE RATE (V/µs)
2063 F08
OXYGEN SENSOR CITY TECHNOLOGY
40XV
100k
0.1%
100k
0.1%
100Q
10M
0.1%
1.8V
LTC2063
VOUT = 1V IN AIR
ISUPPLY = 1.4µA (ENABLED)
0.1%
2063 F09
VSHDN
90nA (SHUTDOWN)
This low power platinum resistance temperature detector (RTD) sensor circuit draws only 35μA total supply cur- rent on a minimum 2.6V rail, and is accurate to within
±1°C at room temperature, including all error intrinsic to the Vishay PTS Class F0.3 Variant RTD. It covers the temperature range from –40°C to 85°C in 10mV/°C incre- ments and produces an output of 1V at nominal room temperature of 25°C.
The LTC2063’s extremely low typical offset of 1μV and typical input bias current of 3pA allows for the use of a very low excitation current in the RTD. Thus, self-heating is negligible, improving accuracy.
The LT5400-3, B-grade, is used to provide a ±0.025% matched resistor network that is effectively a precision 131:1 voltage divider. This precision divider forms one half of a bridge circuit, with the 0.1% 110kΩ and RTD in the other branch. Note that the 110kΩ’s precision require- ment is to ensure matching with the RTD. The 11kΩ R2 serves to provide a DC offset for the entire bridge so
that the output is 1V at room temperature. Since bridge imbalances can lead to error, it is recommended to mini- mize the length of the leads connecting the RTD to reduce additional lead resistance.
The LT6656-2.048 reference helps create a known excita- tion current in the RTD at each temperature of operation, and also acts as a supply for the LTC2063, all while using less than 1μA itself. The LT6656 can accept input voltages anywhere between 2.6V and 18V, allowing for flexibility in selection of supply voltage while maintaining a fixed output range. The LT6656 reference can easily source the 35μA required to run the entire circuit, thanks to the LTC2063’s 2μA maximum supply current and ability to handle microvolt signals produced by the RTD under low excitation current.
Care should be taken to minimize thermocouple effects by preventing significant thermal gradients between the two op amp inputs. It is also important to choose feedback and series resistors that are low-tempco to minimize error due to drift over the entire temperature range.
2.6V ≤ VSUPPLY ≤ 18V +–
IN
C1 0.1µF
LT6656-2.048 GND
OUT
C2 10µF
110k
0.1%
±2ppm/°C
VOUT SCALE 10mV/°C 1V AT 25°C ROOM TEMP ISUPPLY = 35µA
+
VISHAY PTS SERIES 1kQ PtRTD, CLASS F0.3 PTS12061B1K00P100
RTD
1k
R2
11k
100k
10k 10k 100k
LTC2063
–
RFB 1.58M
OUT
2063 F10
LT5400-3
131:1 VOLTAGE DIVIDER
VIN 4.5V TO 90V
ISENSE
RSENSE C1
REF
RIN 49.9Q
0.1%
R1 49.9Q
LTC2063
R2 100k
BSP322P
100µA TO 250mA
0.1Q
3.3µF
LT1389-4.096
0.1%
D1
M1
RLOAD
VOUT = 10 ISEN 1mV TO 2.5V
LOAD
1N4148
R3
BSP322P M2
C3 100nF
C4
C2 22µF
5k 0.1%
499k
2063 F11
10µF
C4 MUST WITHSTAND VOLTAGES UP TO VIN
This micropower precision LTC2063 high side current sense circuit measures currents from 100μA to 250mA over a 4.5V to 90V input voltage range.
The output of this circuit is:
is mainly set by the accuracy of the resistors RSENSE, RIN, and RLOAD.
The LT1389-4.096V reference, along with the bootstrap circuit composed of M2, R3, and D1, establishes a very low power isolated 3V rail that protects the LTC2063 from reaching its absolute maximum voltage of 5.5V while
VOUT RLOAD • RSENSE
RIN
ISENSE 10 •ISENSE
allowing for much higher input voltages.
Since the LTC2063’s gain-bandwidth product is 20kHz,
The LTC2063’s low typical input offset voltage of 1μV and low input bias current of 3pA contribute output errors that are much smaller than the error due to precision limitations of the resistors used. Thus, output accuracy
it is recommended to use this circuit to measure sig- nals that are 2kHz or slower. Note that the output filter as drawn will limit the frequency to 1.5Hz, which optimizes for lowest noise.
ILOAD
12V
LOAD
3.3V
+
GAIN = 2.5V/10mV VOUT = 2.5V/1A ILOAD
10mQ
10k
LTC2063
–
2.49M
2063 TA02
3V
INPUT +
1µF
REF
VCC
10k
LTC2063
–
2.49M
10k
10µF
IN+
IN–
LTC1864L
GND
2063 TA04
3
SPI
BAT
>3.1V
IN OUT
LT6656-3
10µF
10µF
12V
2M 2M
2M 2M
VREF
ILOAD CURRENT TO BE MEASURED (BI-DIRECTIONAL)
RSENSE
10mn
14k
14k
+
LTC2063
–
2M
VOUT = VREF/2 ±ILOAD RSENSE GAIN GAIN = 2M/14k
0.1% RESISTORS TO MAINTAIN OFFSET ACCURACY
2063 TA03
R1 100k
1.5V
R2 909k
IN
R5 100k
1/2 LTC2064
–1.5V 1.5V
+
1/2 LTC2064
–
R3 100n
R4 100n
OUT
–1.5V R6 909k
2063 TA05
1.25V
+3.3V RAIL FOR WHOLE SYSTEM
R1
11k
C2 100nF
R2 100k
R3 100Q
+2.7V OK IF ADC INTERFACE PERMITS DIFFERENTIAL ANALOG OUTPUT SIGNAL
TOTAL ISUPPLY: 193.6µA CONVERSION
< 38.6µA SLEEP MODE
R5
11k
+3.3V
1/2 LTC2064
R4 100Q
1.25V OFFSET
FULL SCALE ±1.25V
OUT-NONINV +3.3V +3.3V C4
SINGLE-ENDED INPUT SIGNAL 1.25V OFFSET REQUIRED
C1
1µF
10nF
V+ REF
+
MAX 250mVPP
IN
R6 15.8k
GAIN = +10V/V, FILTER BW = 10Hz
R7 158k
LTC2480
–
GND
16-BIT OUTPUT
C3 100nF
R8 100Q
+3.3V
C6
LT1790-1.25
IN
GND
OUT
1.25V
C7
+3.3V
1/2 LTC2064
R9 100Q
OUT-INV
0.1µF
1µF
1.25V
C5 10nF
GAIN = –10V/V, FILTER BW = 10Hz
2063 TA06
(Reference LTC DWG # 05-08-1638 Rev B)
0.47
MAX
0.65
REF
1.80 – 2.20 (NOTE 4)
1.00 REF
2.8 BSC
1.8 REF
1.80 – 2.40 1.15 – 1.35
(NOTE 4)
INDEX AREA (NOTE 6)
PIN 1
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.65 BSC
0.15 – 0.30
6 PLCS (NOTE 3)
0.10 – 0.40
GAUGE PLANE
0.15 BSC
NOTE:
0.26 – 0.46
0.10 – 0.18
(NOTE 3)
0.80 – 1.00
MAX
0.00 – 0.10
REF
SC6 SC70 1205 REV B
DIMENSIONS ARE IN MILLIMETERS
DRAWING NOT TO SCALE
DIMENSIONS ARE INCLUSIVE OF PLATING
DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
MOLD FLASH SHALL NOT EXCEED 0.254mm
DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE INDEX AREA
EIAJ PACKAGE REFERENCE IS EIAJ SC-70
JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
2.90 BSC (NOTE 4)
1.22 REF
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.95 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.20 BSC
DATUM ‘A’
0.80 – 0.90
MAX
0.01 – 0.10
0.30 – 0.50 REF
0.09 – 0.20
1.90 BSC
NOTE:
DIMENSIONS ARE IN MILLIMETERS
DRAWING NOT TO SCALE
DIMENSIONS ARE INCLUSIVE OF PLATING
(NOTE 3) S5 TSOT-23 0302
DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
MOLD FLASH SHALL NOT EXCEED 0.254mm
JEDEC PACKAGE REFERENCE IS MO-193
(Reference LTC DWG # 05-08-1660 Rev G)
0.889 ±0.127
(.035 ±.005)
5.10
(.201) MIN
3.20 – 3.45
(.126 – .136)
0.42 ± 0.038
(.0165 ±.0015) TYP
0.65
(.0256) BSC
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.52
8 7 6 5
(.0205) REF
RECOMMENDED SOLDER PAD LAYOUT
4.90 ±0.152
3.00 ±0.102
0.254
DETAIL “A”
(.193 ±.006)
(.118 ±.004)
(.010) GAUGE PLANE
0° – 6° TYP
0.53 ±0.152
(.021 ±.006)
1.10
1 2 3 4
(NOTE 4)
0.86
0.18
DETAIL “A”
(.043) MAX
(.034) REF
(.007)
SEATING PLANE
0.22 – 0.38
0.1016 ±0.0508
NOTE:
DIMENSIONS IN MILLIMETER/(INCH)
DRAWING NOT TO SCALE
(.009 – .015) TYP
0.65
(.0256) BSC
(.004 ±.002)
MSOP (MS8) 0213 REV G
DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 0.05
3.55 0.05
1.65 0.05
2.15 0.05 (2 SIDES)
PACKAGE OUTLINE
0.25 0.05
0.50
BSC
2.38 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
TYP
6
0.40 0.10
10
PIN 1 TOP MARK (SEE NOTE 6)
0.200 REF
3.00 0.10
(4 SIDES)
0.75 0.05
1.65 0.10
(2 SIDES)
5
2.38 0.10
PIN 1 NOTCH R = 0.20 OR 0.35 45 CHAMFER
(DD) DFN REV C 0310
1
0.25 0.05
BSC
NOTE:
0.00 – 0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
DRAWING NOT TO SCALE
ALL DIMENSIONS ARE IN MILLIMETERS
DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
EXPOSED PAD SHALL BE SOLDER PLATED
SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
REV | DATE | DESCRIPTION | PAGE NUMBER |
A | 7/18 | Added LTC2064, fixed typos. | All |
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No licenseFoisrgmranotreed binyfiomrpmlicaattiioonn owr wothwe.rawnisaelougnd.ceor amny patent or patent rights of Analog Devices.
Rev A
29
2.5V
R1 402k
C2 100nF
2.5V
1/2 LTC2064
R3 35.7k
CE RE
4CM CARBON MONOXIDE SENSOR CITY TECHNOLOGY
70nA/ppm CO TYPICAL
2.5V
R4 1M
C4 100nF
R2 100k
C1 100nF
4CM
WE
J1 MMBFJ270
RBURDEN 5Q
2.5V
R5 35.7k
INPUT RANGE: 0ppm TO 500ppm CO TYPICAL GAIN: 2.5mV/ppm CO
OUTPUT: 1.7V (TYP), 2.0V (MAX) AT 500ppm CO
R8
4CM COUNTER ELECTRODE (CE) SELF-BIASES BELOW WE POTENTIAL VWE – VCE = –0.3V TO –0.4V TYPICAL
2.5V
R6 402k
R7 100k
C3 100nF
1/2 LTC2064
100k OUT
C5 10µF
2063 TA07
PART NUMBER | DESCRIPTION | COMMENTS |
1.5μA Max, Over-The-Top Precision Rail-to-Rail Input and Output Op Amps | 375µV VOS, 1.5µA IS, 2.2V to 36V VS, 2.7kHz, RRIO | |
1.6V, 1μA Precision Rail-to-Rail Input and Output Op Amps | 500µV VOS, 1μA IS, 1.6V to 16V VS, 2kHz, RRIO | |
Micropower, Single/Dual, Zero-Drift Operational Amplifier | 15µV VOS, 17µA IS, 1.8V to 5.5V VS, 115kHz, RRIO | |
Micropower, Single/Dual, Zero-Drift Operational Amplifiers | 5µV VOS, 10µA IS, 1.7V to 5.25V VS, 100kHz, RRIO | |
Micropower, Enhanced Slew Op Amp | 20μV VOS, 20μA IS, 3V to 30V VS, 40kHz | |
Micropower, Single/Dual, Zero-Drift Operational Amplifier | 5µV VOS, 130μA IS, 2.7V to 11V VS, 500kHz, RR Output | |
High Voltage-Low Noise Zero-Drift Operational Amplifier | 4µV VOS, 1.2mA IS, 4.75V to 60V VS, 1.5MHz, RR Output | |
Zero-Drift Operational Amplifier | 3µV VOS, 1.5mA IS, 2.7V to 12V VS, 3MHz, RR Output | |
Dual/Quad, Zero-Drift Operational Amplifier | 3µV VOS, 1.5mA IS, 2.7V to 12V VS, 3MHz, RR Output | |
Precision, Rail-to-Rail, Zero-Drift, Resistor- Programmable Instrumentation Amplifier | 10µV VOS, 1.3mA IS, 2.7V to 12V VS, 200kHz, RRIO | |
Quad Matched Resistor Network | 0.01% Matching, 8ppm/°C Temp Drift , 0.2ppm/°C Temp Matching | |
16-Bit Δ ADC with Easy Drive Inputs | 2.7V to 5.5V, 160μA in Conversion Mode, 1μA in Sleep Mode | |
16-Bit 250ksps ADC in MSOP | 850μA in Conversion Mode, 2μA in Shutdown at 1ksps | |
12-Bit Low Power ∑-Δ ADC | 130µA in Conversion Mode, 5µA in Shutdown | |
SmartMesh® Wireless Sensor Network IC | Wireless Mesh Networks | |
Micropower Low-Dropout Reference | 35µA Typ, 60µA Max, 10ppm/°C Temp Drift, 0.05% accuracy, SOT-23 Package |
Rev A
30
D16876-0-7/18(A)
For more information www.analog.com ANALOG DEVICES, INC. 2017-2018
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Analog Devices Inc.:
LTC2063HS5#TRMPBF LTC2063IS5#PBF LTC2063HS5#PBF LTC2063ISC6#TRPBF LTC2063HSC6#PBF LTC2063IS5#TRMPBF LTC2063ISC6#TRMPBF LTC2063ISC6#PBF LTC2063IS5#TRPBF LTC2063HS5#TRPBF LTC2063HSC6#TRMPBF LTC2063HSC6#TRPBF LTC2064HDD#PBF LTC2064HDD#TRPBF LTC2064HMS8#PBF LTC2064HMS8#TRPBF LTC2064IDD#PBF LTC2064IDD#TRPBF LTC2064IMS8#PBF LTC2064IMS8#TRPBF DC2837A-A