The MAX4245/MAX4246/MAX4247 family of low-cost op amps offer rail-to-rail inputs and outputs, draw only 320µA of quiescent current, and operate from a single +2.5V to +5.5V supply. For additional power conservation, the MAX4245/MAX4247 offer a low-power shutdown mode that reduces supply current to 50nA, and puts the ampli- fiers outputs in a high-impedance state. These devices are unity-gain stable with a 1MHz gain-bandwidth prod uct driving capacitive loads up to 470pF.
The MAX4245/MAX4246/MAX4247 family is specified from -40°C to +125°C, making them suitable for use in a variety of harsh environments. The MAX4245 single amplifier is available in ultra-small 6-pin SC70 and space- saving 6-pin SOT23 packages. The MAX4246 dual amplifier is available in 8-pin SOT23, SO, and µMAX® packages. The MAX4247 dual amplifier comes in a tiny 10-pin µMAX package.
Portable Communications
Single-Supply Zero-Crossing Detectors
Instruments and Terminals
Electronic Ignition Modules
Infrared Receivers
Sensor-Signal Detection
PART | AMPLIFIERS PER PACKAGE | SHUTDOWN MODE |
MAX4245AXT | 1 | Yes |
MAX4245AUT | 1 | Yes |
MAX4246AKA | 2 | No |
MAX4246ASA | 2 | No |
MAX4246AUA | 2 | No |
MAX4247AUB | 2 | Yes |
μMAX is a registered trademark of Maxim Integrated Products, Inc.
19-2016; Rev 3; 5/14
Rail-to-Rail Input and Output Voltage Swing
50nA (max) Shutdown Mode (MAX4245/MAX4247)
320µA (typ) Quiescent Current Per Amplifier
Single +2.5V to +5.5V Supply Voltage Range
110dB Open-Loop Gain with 2kΩ Load
0.01% THD with 100kΩ Load
Unity-Gain Stable up to CLOAD = 470pF
No Phase Inversion for Overdriven Inputs
Available in Space-Saving Packages
6-Pin SC70 or 6-Pin SOT23 (MAX4245)
8-Pin SOT23/SO or 8-Pin µMAX (MAX4246)
10-Pin µMAX (MAX4247)
PART | TEMP RANGE | PIN- PACKAGE | TOP MARK |
MAX4245AXT+T | -40°C to +125°C | 6 SC70 | AAZ |
MAX4245AUT+T | -40°C to +125°C | 6 SOT23 | AAUB |
MAX4246AKA+T | -40°C to +125°C | 8 SOT23 | AAIN |
MAX4246ASA+T | -40°C to +125°C | 8 SO | — |
MAX4246AUA+T | -40°C to +125°C | 8 µMAX | — |
MAX4247AUB+T | -40°C to +125°C | 10 µMAX | — |
+Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel.
TOP VIEW + + IN+ 1 MAX4245 6 VDD OUTA 1 MAX4246 8 VDD VSS 2 5 SHDN INA- 2 7 OUTB IN- 3 4 OUT INA+ 3 6 INB- SC70-6/SOT23-6 VSS 4 5 INB+ SOT23-8/µMAX-8 Pin Configurations continued at end of datat sheet. |
Power-Supply Voltage (VDD to VSS).......................-0.3V to +6V
All Other Pins ................................ (VSS - 0.3V) to (VDD + 0.3V)
Output Short-Circuit Duration
(OUT shorted to VSS or VDD) .............................. Continuous Continuous Power Dissipation (TA = +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C).............245mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C) ..........695mW
8-Pin SO (derate 5.9mW/°C above +70°C).................471mW
8-Pin SOT23 (derate 9.1mW/°C above +70°C) ..........727mW
8-Pin µMAX (derate 4.5mW/°C above +70°C) ............362mW
10-Pin µMAX (derate 5.6mW/°C above +70°C) ..........444mW Operating Temperature Range......................... -40°C to +125°C Junction Temperature ...................................................... +150°C
Storage Temperature Range ............................ -65°C to +160°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) ....................................... +260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(VDD = +2.7V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL connected from OUT to VDD / 2, SHDN_ = VDD (MAX4245/MAX4247 only),
TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER | SYMBOL | CONDITIONS | MIN TYP MAX | UNITS | |
Supply Voltage Range | VDD | Inferred from PSRR test | 2.5 5.5 | V | |
Supply Current (Per Amplifier) | IDD | VDD = +2.7V | 320 650 | µA | |
VDD = +5.5V | 375 700 | ||||
Supply Current in Shutdown | ISHDN_ | SHDN_ = VSS (Note 2) | 0.05 0.5 | µA | |
Input Offset Voltage | VOS | VSS - 0.1V ≤ VCM ≤ VDD + 0.1V | ±0.4 ±1.5 | mV | |
Input Bias Current | IB | VSS - 0.1V ≤ VCM ≤ VDD + 0.1V | ±10 ±50 | nA | |
Input Offset Current | IOS | VSS - 0.1V ≤ VCM ≤ VDD + 0.1V | ±1 ±6 | nA | |
Input Resistance | RIN | |VIN+ - VIN-| ≤ 10mV | 4000 | kΩ | |
Input Common-Mode Voltage Range | VCM | Inferred from CMRR test | VSS - 0.1 VDD + 0.1 | V | |
Common-Mode Rejection Ratio | CMRR | VSS - 0.1V ≤ VCM ≤ VDD + 0.1V | 65 80 | dB | |
Power-Supply Rejection Ratio | PSRR | 2.5V ≤ VDD ≤ 5.5V | 75 90 | dB | |
Large-Signal Voltage Gain | AV | VSS + 0.05V ≤ VOUT ≤ VDD - 0.05V, RL = 100kΩ | 120 | dB | |
VSS + 0.2V ≤ VOUT ≤ VDD - 0.2V, RL = 2kΩ | 95 110 | ||||
Output Voltage Swing High | VOH | Specified as VDD - VOUT | RL = 100kΩ | 1 | mV |
RL = 2kΩ | 35 60 | ||||
Output Voltage Swing Low | VOL | Specified as VOUT - VSS | RL = 100kΩ | 1 | mV |
RL = 2kΩ | 30 60 | ||||
Output Short-Circuit Current | IOUT(SC) | VDD = +5.0V | Sourcing | 11 | mA |
Sinking | 30 | ||||
Output Leakage Current in Shutdown | IOUT(SH) | Device in Shutdown Mode (SHDN_ = VSS), VSS ≤ VOUT ≤ VDD (Note 2) | ±0.01 ±0.5 | µA | |
SHDN_ Logic Low | VIL | (Note 2) | 0.3 x VDD | V | |
SHDN_ Logic High | VIH | (Note 2) | 0.7 x VDD | V | |
SHDN_ Input Current | IL/IH | VSS ≤ SHDN_ ≤ VDD (Note 2) | 0.5 50 | nA |
(VDD = +2.7V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL connected from OUT to VDD / 2, SHDN_ = VDD (MAX4245/MAX4247 only),
TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER | SYMBOL | CONDITIONS | MIN TYP MAX | UNITS |
Gain-Bandwidth Product | GBW | 1.0 | MHz | |
Phase Margin | ΦM | 70 | degrees | |
Gain Margin | GM | 20 | dB | |
Slew Rate | SR | 0.4 | V/µs | |
Input Voltage-Noise Density | en | f = 10kHz | 52 | nV/√Hz |
Input Current-Noise Density | in | f = 10kHz | 0.1 | pA/√Hz |
Capacitive-Load Stability | CLOAD | AV = 1 (Note 3) | 470 | pF |
Shutdown Delay Time | t(SH) | (Note 2) | 3 | µs |
Enable Delay Time | t(EN) | (Note 2) | 4 | µs |
Power-On Time | tON | 4 | µs | |
Input Capacitance | CIN | 2.5 | pF | |
Total Harmonic Distortion | THD | f = 10kHz, VOUT = 2VP-P, AV = +1, VDD = +5.0V, Load = 100kΩ to VDD/2 | 0.01 | % |
Settling Time to 0.01% | tS | VOUT = 4V step, VDD = +5.0V, AV = +1 | 10 | µs |
(VDD = +2.7V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL connected from OUT to VDD / 2, SHDN_ = VDD (MAX4245/MAX4247 only),
TA = -40°C to +125°C, unless otherwise noted.) (Note 1)
PARAMETER | SYMBOL | CONDITIONS | MIN TYP MAX | UNITS |
Supply Voltage Range | VDD | Inferred from PSRR test | 2.5 5.5 | V |
Supply Current (Per Amplifier) | IDD | VDD = +2.7V | 800 | µA |
Supply Current in Shutdown | ISHDN_ | SHDN_ = VSS (Note 2) | 1 | µA |
Input Offset Voltage | VOS | VSS ≤ VCM ≤ VDD (Note 4) | ±3.0 | mV |
Input Offset Voltage Drift | TCVOS | VSS ≤ VCM ≤ VDD (Note 4) | ±2 | µV/°C |
Input Bias Current | IB | VSS ≤ VCM ≤ VDD (Note 4) | ±100 | nA |
Input Offset Current | IOS | VSS ≤ VCM ≤ VDD (Note 4) | ±10 | nA |
Input Common-Mode Voltage Range | VCM | Inferred from CMRR test (Note 4) | VSS VDD | V |
Common-Mode Rejection Ratio | CMRR | VSS ≤ VCM ≤ VDD (Note 4) | 60 | dB |
Power-Supply Rejection Ratio | PSRR | 2.5V ≤ VDD ≤ 5.5V | 70 | dB |
Large-Signal Voltage Gain | AV | VSS + 0.2V ≤ VOUT ≤ VDD - 0.2V, RL = 2kΩ | 85 | dB |
Output Voltage Swing High | VOH | Specified as VDD - VOUT, RL = 2kΩ | 90 | mV |
Output Voltage Swing Low | VOL | Specified as VOUT - VSS, RL = 2kΩ | 90 | mV |
Output Leakage Current in Shutdown | IOUT (SH) | Device in Shutdown Mode (SHDN_ = VSS), VSS ≤ VOUT ≤ VDD (Note 3) | ±1.0 | µA |
(VDD = +2.7V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL connected from OUT to VDD / 2, SHDN_ = VDD (MAX4245/MAX4247 only),
TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER | SYMBOL | CONDITIONS | MIN TYP MAX | UNITS |
SHDN_ Logic Low | VIL | (Note 2) | 0.3 x VDD | V |
SHDN_ Logic High | VIH | (Note 2) | 0.7 x VDD | V |
SHDN_ Input Current | IL/IH | VSS ≤ SHDN_ ≤ VDD (Notes 2, 3) | 100 | nA |
Note 1: Specifications are 100% tested at TA = +25°C. All temperature limits are guaranteed by design.
Note 2: Shutdown mode is only available in MAX4245 and MAX4247.
Note 3: Guaranteed by design, not production tested.
Note 4: For -40°C to +85°C, Input Common-Mode Range is VSS - 0.1V ≤ VCM ≤ VDD + 0.1V.
(VDD = 2.7V, VSS = VCM = 0V, VOUT = VDD / 2, no load, TA = +25°C, unless otherwise noted.)
MAX4245/MAX4247
500
450
IDD (µA)
400
350
300
250
SUPPLY CURRENT PER AMPLIFIER vs. SUPPLY VOLTAGE
TA = +125°C
TA = +85°C TA = +25°C
TA = -40°C
200
MAX4245 toc01
160
ISHDN (nA)
120
80
40
SHUTDOWN SUPPLY CURRENT PER AMPLIFIER vs. TEMPERATURE
MAX4245 toc02
600
500
VOS (µV)
400
300
200
100
INPUT OFFSET VOLTAGE vs. COMMON-MODE VOLTAGE
MAX4245 toc03
VDD = 2.5V TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
200
2.0
2.5 3.0
3.5 4.0
4.5 5.0 5.5
0
-40 15
70 125
0
0 0.5
1.0
1.5 2.0 2.5
VDD (V)
TEMPERATURE (°C)
VCM (V)
600
INPUT OFFSET VOLTAGE vs. COMMON-MODE VOLTAGE
MAX4245 toc04
350
INPUT OFFSET VOLTAGE vs. TEMPERATURE
INPUT BIAS CURRENT
vs. COMMON-MODE VOLTAGE
MAX4245 toc05
MAX4245 toc06
20
500
VOS (mV)
400
300
200
100
0
VDD = 5.5V
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
300
250
VOS (µV)
200
150
100
50
0
VDD = 2.5V
15
10
IBIAS (nA)
5
0
VDD = 5.5V
-5
-10
-15
VDD = 5.5V
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0 1 2 3
VCM (V)
4 5 6
-40 15 70 125
TEMPERATURE (°C)
0 1 2 3
VCM (V)
4 5 6
(VDD = 2.7V, VSS = VCM = 0V, VOUT = VDD / 2, no load, TA = +25°C, unless otherwise noted.)
OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE
VDD = 5.5V | |||||||||||
VDD = 2.5V | |||||||||||
14
12
ISOURCE (mA)
10
8
6
4
2
0
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE
MAX4245 toc07
50
45
40
35
ISINK (mA)
30 VDD = 5.5V
25
20 VDD = 2.5V
15
10
5
0
OUTPUT SWING HIGH vs. TEMPERATURE
MAX4245 toc08
MAX4245 toc09
RL = 2kΩ | ||
RL = 100kΩ | ||
40
VDD - VOUT (mV)
30
20
10
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
-40 15
70 125
VOUT (V)
RL = 2kΩ | ||
RL = 100kΩ | ||
OUTPUT SWING LOW vs. TEMPERATURE
40
VOUT (V)
CROSSTALK vs. FREQUENCY
MAX4245 toc10
MAX4245 toc11
-50 0
-10
-20
TEMPERATURE (°C)
MAX4245 toc12
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
VOUT - VSS (mV)
30
20
10
0
-40 15
70 125
-70
CROSSTALK (dB)
-90
-110
-130
0.001
0.01
0.1 1
10 100
1000 10,000
-30
PSRR (dB)
-40
-50
-60
-70
-80
-90
-100
0.1 10 10 100 1000 10,000
1
THD + N (%)
0.1
0.01
0.001
TEMPERATURE (°C)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. INPUT FREQUENCY
MAX4245 toc13
RL = 100kΩ
AV = +1 VOUT = 2VP-P VDD = 5.0V
10
1
THD + N (%)
0.1
0.01
0.001
FREQUENCY (kHz)
TOTAL HARMONIC DISTORTION PLUS NOISE vs. AMPLITUDE
RL = 100kΩ AV = +1
fIN = 1kHz VDD = 5.0V
80
MAX4245 toc14
60
GAIN (dB)
40
20
0
-20
FREQUENCY (kHz)
GAIN AND PHASE vs. FREQUENCY
MAX4245 toc15
NO LOAD
PHASE
GAIN
90
30
PHASE (deg)
-30
-90
-150
-210
0.0001
100 1000
10,000
100,000
0.0001
0 1 2 3 4 5
-40
0.1 1 10 100 1000 10,000
-270
INPUT FREQUENCY (Hz)
OUTPUT VOLTAGE (VP-P)
FREQUENCY (kHz)
(VDD = 2.7V, VSS = VCM = 0V, VOUT = VDD / 2, no load, TA = +25°C, unless otherwise noted.)
80
60
GAIN (dB)
40
20
0
-20
GAIN AND PHASE vs. FREQUENCY
MAX4245 toc16
2kΩ || 470pF
PHASE
GAIN
90
30
PHASE (deg)
-30
-90
-150
-210
IN
OUT
SMALL-SIGNAL TRANSIENT RESPONSE (NONINVERTING)
MAX4245 toc17
20mV/div
20mV/div
-40
0.1 1 10 100 1000 10,000
FREQUENCY (kHz)
-270
4µs/div
SMALL-SIGNAL TRANSIENT RESPONSE (INVERTING)
MAX4245 toc18
IN
LARGE-SIGNAL TRANSIENT RESPONSE (NONINVERTING)
MAX4245 toc19
VDD = 5V
20mV/div 2V/div
IN
OUT
20mV/div
OUT
2V/div
4µs/div 40µs/div
LARGE-SIGNAL TRANSIENT RESPONSE (INVERTING)
MAX4245 toc20
IN
OUT
2V/div
VDD = 5V
2V/div
40µs/div
PIN | NAME | FUNCTION | ||
MAX4245 | MAX4246 | MAX4247 | ||
1 | — | — | IN+ | Noninverting Input |
2 | 4 | 4 | VSS | Ground or Negative Supply |
3 | — | — | IN- | Inverting Input |
4 | — | — | OUT | Amplifier Output |
5 | — | — | SHDN | Shutdown |
6 | 8 | 10 | VDD | Positive Supply |
— | 1 | 1 | OUTA | Amplifier Output Channel A |
— | 2 | 2 | INA- | Inverting Input Channel A |
— | 3 | 3 | INA+ | Noninverting Input Channel A |
— | 5 | 7 | INB+ | Noninverting Input Channel B |
— | 6 | 8 | INB- | Inverting Input Channel B |
— | 7 | 9 | OUTB | Amplifier Output Channel B |
— | — | 5 | SHDNA | Shutdown Channel A |
— | — | 6 | SHDNB | Shutdown Channel B |
VDD R3 IN R3 = R1 ║R2 R1 R2 |
VDD R3 R3 = R1 ║R2 IN R1 R2 |
Figure 1a. Minimizing Offset Error Due to Input Bias Current
(Noninverting)
The MAX4245/MAX4246/MAX4247 have rail-to-rail input and output stages that are specifically designed for low- voltage, single-supply operation. The input stage consists of composite NPN and PNP differential stages, which operate together to provide a common-mode range extending to both supply rails. The crossover region of these two pairs occurs halfway between VDD and VSS. The input offset voltage is typically ±400µV. Low- operating supply voltage, low supply current and rail-to- rail outputs make this family of operational amplifiers an excellent choice for precision or general-purpose, low- voltage, battery-powered systems.
Figure 1b. Minimizing Offset Error Due to Input Bias Current (Inverting)
Since the input stage consists of NPN and PNP pairs, the input bias current changes polarity as the common-mode voltage passes through the crossover region. Match the effective impedance seen by each input to reduce the offset error caused by input bias currents flowing through external source impedance (Figures 1a and 1b).
The combination of high-source impedance plus input capacitance (amplifier input capacitance plus stray capac- itance) creates a parasitic pole that can produce an underdamped signal response. Reducing input capaci- tance or placing a small capacitor across the feedback resistor improves response in this case.
The MAX4245/MAX4246/MAX4247 family’s inputs are protected from large differential input voltages by internal 5.3kΩ series resistors and back-to-back triple-diode stacks across the inputs (Figure 2). For differential-input voltages
5.3kΩ IN- IN+ 5.3kΩ |
Figure 2. Input Protection Circuit
much less than 2.1V (triple-diode drop), input resistance is typically 4MΩ. For differential voltages greater than 2.1V, input resistance is around 10.6kΩ, and the input bias cur- rent can be approximated by the following equation:
IB = (VDIFF - 2.1V)/10.6kΩ
In the region where the differential input voltage approach- es 2.1V, the input resistance decreases exponentially from 4MΩ to 10.6kΩ as the diodes begin to conduct. It fol- lows that the bias current increases with the same curve.
In unity-gain configuration, high slew-rate input signals may capacitively couple to the output through the triple- diode stacks.
The MAX4245/MAX4246/MAX4247 can drive a 2kΩ load and still typically swing within 35mV of the supply rails. Figure 3 shows the output voltage swing of the MAX4245 configured with AV = -1V/V.
The MAX4245/MAX4246/MAX4247 operate from a single
+2.5V to +5.5V supply (or dual ±1.25V to ±2.75V sup- plies) and consume only 320µA of supply current per amplifier. A 90dB power-supply rejection ratio allows the amplifiers to be powered directly off a decaying battery voltage, simplifying design and extending battery life.
The MAX4245/MAX4246/MAX4247 output typically set- tles within 4µs after power-up. Figure 4 shows the output voltage on power-up and power-down.
The MAX4245/MAX4247 feature a low-power shutdown mode. When SHDN_ is pulled low, the supply current drops to 50nA per amplifier, the amplifier is disabled, and
IN 2V/div OUT 2V/div 400µs/div |
Figure 3. Rail-to-Rail Input/Output Voltage Range
2V/div VDD 2V/div OUT 10µs/div |
Figure 4. Power-Up/Power-Down Waveform
the output enters a high-impedance state. Pulling SHDN_ high enables the amplifier. Figure 5 shows the MAX4245/ MAX4247’s shutdown waveform.
Due to the output leakage currents of three-state devices and the small internal pullup current for SHDN_, do not leave SHDN_ open/high-impedance. Leaving SHDN_ open may result in indeterminate logic levels, and could adversely affect op amp operation. The logic threshold for SHDN_ is referred to VSS. When using dual supplies, pull SHDN_ to VSS, not GND, to shut down the op amp.
The MAX4245/MAX4246/MAX4247 are unity-gain stable for loads up to 470pF. Applications that require greater capacitive drive capability should use an isolation resistor
RISO OUT IN RL CL |
2V/div SHDN 2V/div OUT 400µs/div |
Figure 6a. Using a Resistor to Isolate a Capacitive Load from the Op Amp
Figure 5. Shutdown Waveform
between the output and the capacitive load (Figures 6a, 6b, 6c). Note that this alternative results in a loss of gain accu- racy because RISO forms a voltage divider with the RLOAD.
The MAX4245/MAX4246/MAX4247 family operates from either a single +2.5V to +5.5V supply or dual ±1.25V to
±2.75V supplies. For single-supply operation, bypass the power supply with a 100nF capacitor to VSS (in this case GND). For dual-supply operation, both the VDD and the
VSS supplies should be bypassed to ground with separate 100nF capacitors.
Good PC board layout techniques optimize performance by decreasing the amount of stray capacitance at the op amp?s inputs and output. To decrease stray capacitance, minimize trace lengths and widths by placing external components as close to the device as possible. Use surface-mount components when possible.
TOP VIEW + OUTA 1 10 VDD MAX4247 INA- 2 9 OUTB INA+ 3 8 INB- VSS 4 7 INB+ SHDNA 5 6 SHDNB µMAX |
RISO = 0Ω RL = 2kΩ CL = 2200pF 100mV/div IN 100mV/div OUT 10µs/div |
Figure 6b. Pulse Response Without Isolating Resistor
RISO = 100Ω RL = 2kΩ CL = 2200pF 100mV/div IN 100mV/div OUT 10µs/div |
Figure 6c. Pulse Response With Isolating Resistor
PROCESS: BiCMOS
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE | PACKAGE CODE | DOCUMENT NO. | LAND PATTERN NO. |
6 SOT23 | U6+4 | ||
6 SC70 | X6SN+1 | ||
8 SOT23 | K8+5 | ||
8 SO | S8+4 | ||
8 µMAX | U8+1 | ||
10 µMAX | U10+2 |
REVISION NUMBER | REVISION DATE | DESCRIPTION | PAGES CHANGED |
0 | 5/01 | Initial release | — |
2 | 11/11 | Added lead-free data to Ordering Information. | 1 |
3 | 5/14 | Updated the General Description. | 1 |
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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MAX4245AUT+T MAX4245AXT+T MAX4246AKA+T MAX4246ASA+ MAX4246ASA+T MAX4246AUA+ MAX4246AUA+T MAX4247AUB+ MAX4247AUB+T MAX4245AUT-T MAX4245AXT-T MAX4246AKA-T MAX4246AUA MAX4246AUA-T