LM124, LM224x, LM324x


Datasheet


Low-power quad operational amplifiers



QFN16 3x3


TSSOP14


SO14



Product status link

LM124, LM224x, LM324x


Product reference

Part numbers

LM124(1)

LM124

LM224x

LM224, LM224A(2), LM224W(3)

LM324x

LM324, LM324A, LM324W(3)

  1. Prefixes: LM1, LM2, and LM3 refer to temperature range

  2. Suffix A refers to enhanced Vio performance

  3. Suffix W refers to enhanced ESD ratings.

Features


Description

The LM124, LM224x and LM324x consist of four independent, high gain operational amplifiers with frequency compensation implemented internally. They operate from a single power supply over a wide range of voltages.

Operation from split power supplies is also possible and the low-power supply current drain is independent of the magnitude of the power supply voltage.



DS0985 - Rev 8 - September 2019

For further information contact your local STMicroelectronics sales office.


www.st.com


  1. Pin connections and schematic diagram


    Figure 1. Pin connections (top view)


    QFN16 3x3


    Output 1 1 14 Output 4


    Inverting input 1 2 -


    Non-inverting input 1 3 +


    VCC + 4

    - 13


    + 12


    11

    Inverting input 4


    Non-inverting input 4 VCC -

    Non-inverting input 2 5 +


    Inverting input 2 6 -


    Output 2 7

    + 10


    - 9


    8

    Non-inverting input 3


    Inverting input 3


    Output 3


    TSSOP14/SO14


    1. The exposed pads of the QFN16 3x3 can be connected to VCC- or left floating


      Figure 2. Schematic diagram (LM224A, LM324A, LM224W, LM324W, one channel)



      Figure 3. Schematic diagram (LM124, LM224, LM324, one channel)


  2. Absolute maximum ratings and operating conditions


    Table 1. Absolute maximum ratings


    Symbol

    Parameter

    Value

    Unit

    VCC

    Supply voltage

    ±16 or 32


    V


    Vi

    Input voltage

    LM224A, LM324A, LM224W, LM324W


    -0.3 to VCC + 0.3

    Input voltage

    LM124, LM224, LM324


    -0.3 to 32

    Vid

    Differential input voltage (1)

    32

    Ptot

    Power dissipation: D suffix

    400

    mW


    Output short-circuit duration (2)

    Infinite


    Iin

    Input current (3)

    50

    mA

    Tstg

    Storage temperature range

    -65 to 150


    °C

    Tj

    Maximum junction temperature

    150


    Rthja


    Thermal resistance junction to ambient (4)

    QFN16 3x3

    45


    °C/W

    TSSOP14

    100

    SO14

    103


    Rthjc


    Thermal resistance junction to case

    QFN16 3x3

    14

    TSSOP14

    32

    SO14

    31


    ESD


    HBM: human body model (5)

    LM224A, LM324A

    800


    V

    LM224W, LM324W

    700

    LM124, LM224, LM324

    250

    MM: machine model (6)

    100

    CDM: charged device model

    1500

    1. Neither of the input voltages must exceed the magnitude of (VCC +) or (VCC -).

    2. Short-circuits from the output to VCC can cause excessive heating if VCC > 15 V. The maximum output current is approximately 40 mA independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.

    3. This input current only exists when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistor becoming forward biased and thereby acting as an input diode clamp. In addition to this diode action, there is also an NPN parasitic action on the IC chip. This transistor action can cause the output voltages of the op amps to go to the VCC voltage level (or to ground for a large overdrive) for the time during which an input is driven negative. This is not destructive and normal output starts up again for input voltages higher than -0.3 V.

    4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short- circuits on all amplifiers. These are typical values given for a single layer board (except for TSSOP which is a two-layer board).

    5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating.

    6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating.


    Table 2. Operating conditions


    Symbol

    Parameter

    Value

    Unit


    VCC


    Supply voltage

    Single supply

    3 to 30


    V

    Dual supply

    ±1.5 to ±15


    VICM

    Common-mode input voltage range

    Tamb= 25 °C


    0 to VCC - 1.5

    Common-mode input voltage range

    Tmin. ≤ Tamb ≤ Tmax.


    0 to VCC -2


    TOper


    Operating temperature range

    LM124

    -55 to 125


    °C

    LM224

    -40 to 105

    LM324

    0 to 70


  3. Electrical characteristics


    Table 3. VCC + = 5 V, VCC - = ground, Vo = 1.4 V, Tamb = 25 °C (unless otherwise specified)


    Symbol

    Parameter

    Min.

    Typ.

    Max.

    Unit

    Vio LM224A, LM324A, LM224W,

    LM324W


    Input offset voltage (1)

    Tamb = 25 °C



    2

    3


    mV


    Tmin ≤ Tamb ≤ Tmax





    5


    Vio LM124, LM224, LM324


    Tamb = 25 °C

    LM124



    2


    5

    LM224


    LM324


    2

    7


    Tmin ≤ Tamb ≤ Tmax

    LM124




    7

    LM224



    LM324



    9


    Iio


    Input offset current

    Tamb = 25 °C



    2

    20


    nA

    Tmin ≤ Tamb ≤ Tmax




    40


    Iib


    Input bias current (2)

    Tamb = 25 °C



    20

    100

    Tmin ≤ Tamb ≤ Tmax




    200


    Avd

    Large signal voltage gain, VCC += 15 V, RL = 2 kΩ, Vo = 1.4 V to 11.4 V

    Tamb = 25 °C


    50

    100



    V/mV

    Tmin ≤ Tamb ≤ Tmax


    25




    SVR

    Supply voltage rejection ratio,

    Rs ≤ 10 kΩ,

    VCC += 5 V to 30 V

    Tamb = 25 °C


    65

    110



    dB

    Tmin ≤ Tamb ≤ Tmax


    65




    ICC


    Supply current, all amps, no load

    Tamb = 25 °C, VCC = 5V



    0.7

    1.2


    mA

    Tamb = 25 °C, VCC = 30 V



    1.5

    3

    Tmin ≤ Tamb ≤ Tmax, VCC = 5 V



    0.8

    1.2

    Tmin ≤ Tamb ≤ Tmax, VCC = 30 V



    1.5

    3


    Vicm


    Input common mode voltage range (3)

    VCC = 30 V, Tamb = 25 °C


    0


    28.5


    V

    VCC = 30 V, Tmin ≤ Tamb ≤ Tmax


    0


    28


    CMR

    Common mode rejection ratio, Rs ≤ 10 kΩ

    Tamb = 25 °C


    70

    80



    dB

    Tmin ≤ Tamb ≤ Tmax


    60



    Isource

    Output current source, Vid = 1 V

    VCC = 15 V, Vo = 2 V


    20

    40

    70


    mA


    Isink


    Output sink current, Vid = -1 V

    VCC = 15 V, Vo = 2 V


    10

    20


    VCC = 15 V, Vo = 0.2 V


    12

    50


    µA


    Symbol

    Parameter

    Min.

    Typ.

    Max.

    Unit


    VOH

    High level output voltage, VCC = 30 V, RL = 2 kΩ

    Tamb = 25 °C


    26

    27



    V

    Tmin ≤ Tamb ≤ Tmax


    26



    High level output voltage, VCC = 30 V, RL = 10 kΩ

    Tamb = 25 °C


    27

    28


    Tmin ≤ Tamb ≤ Tmax


    27



    High level output voltage, VCC = 5 V, RL = 2 kΩ

    Tamb = 25 °C


    3.5



    Tmin ≤ Tamb ≤ Tmax


    3




    VOL


    Low level output voltage, RL = 10 kΩ

    Tamb = 25 °C



    5

    20


    mV

    Tmin ≤ Tamb ≤ Tmax




    20


    SR


    Slew rate

    VCC = 15 V, Vi = 0.5 to 3 V,

    RL = 2 kΩ, CL = 100 pF, unity gain




    0.4



    V/µs


    GBP


    Gain bandwidth product

    VCC = 30 V, f = 100 kHz, Vin=10 mV, RL = 2 kΩ, CL=100 pF




    1.3



    MHz


    THD


    Total harmonic distortion

    f = 1kHz, Av = 20 dB, RL = 2 kΩ, Vo = 2 Vpp, CL = 100 pF, VCC=30 V




    0.015



    %

    en

    Equivalent input noise voltage

    f = 1 kHz, Rs = 100 Ω, VCC = 30 V



    40


    nV/√Hz

    DVio

    Input offset voltage drift




    7

    30

    µV/°C

    DIio

    Input offset current drift




    10

    200

    pA/°C

    Vo1/Vo2

    Channel separation (4)

    1 kHz ≤ f ≤ 20 kHZ



    120


    kHz

    1. Vo = 1.4 V, Rs = 0 Ω, 5 V < VCC + < 30 V, 0 < Vic < VCC + - 1.5 V

    1. The direction of the input current is out of the IC. This current is essentially constant, independent of the state of the output so there is no load change on the input lines.

    2. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range is (VCC +) - 1.5 V, but either or both inputs can go to 32 V without damage.

    3. Due to the proximity of external components, ensure that there is no coupling originating from stray capacitance between these external parts. Typically, this can be detected at higher frequencies because this type of capacitance increases.


    Figure 4. Input bias current vs. temperature


    24

    21

    18

    15

    12

    9

    6

    3


    0

    -55 -35 -15 5 25 45 65 85 105 125

    TEMPERATURE (°C)

    IB (nA)

    OUTPUT CURRENT (mA)

  4. Electrical characteristic curves



    Figure 5. Output current limitation











































































    Figure 6. Input voltage range

    Figure 7. Supply current vs. supply voltage



    Figure 8. Gain bandwidth product vs. temperature

    Figure 9. Common-mode rejection ratio



    Figure 10. Open loop frequency response

    Figure 11. Large signal frequency response



    Figure 12. Voltage follower pulse response

    Figure 13. Output characteristics (current sinking)


    Figure 14. Voltage follower pulse response (small signal)

    Figure 15. Output characteristics (current sourcing)

    VOLTAGE GAIN (dB)



    Figure 16. Input current vs. supply voltage

    Figure 17. Large signal voltage gain vs. temperature







































    Figure 18. Power supply and common mode rejection ratio vs. temperature

    Figure 19. Voltage gain vs. supply voltage


    16 0


    R L = 20k Ω


    12 0


    80 R L = 2k Ω



    40



    0 1 0 2 0 3 0


    P O S I T I V E S U P P LY V O LTA G E ( V )


    *Polycarbonate or polyethylene

    1/4

    LM124A

    3R

    3 MΩ

    R

    1 MΩ

    Zo

    2IB

    C

    *

    1 µF

    e I

    1/4

    IB

    Figure 25. Low drift peak detector

    e I (mV)

    +5 V

    eO

    R1

    Figure 24. Non-inverting DC gain


    AV = 1 + R2

    e 2 100 kΩ


    e 3 100 kΩ


    100 kΩ


    e 4 100 kΩ


    eo = e1 + e2 - e3 - e4

    where (e1 + e2) ≥ (e3 + e4) to keep eo ≥ 0 V

    Figure 23. DC summing amplifier


    e 1 100 kΩ

    C2 R5

    10 µF 100 kΩ

    VCC

    R4 100 kΩ

    R3 1 MΩ

    e I ~

    RL 10 kΩ

    RB

    6.2 kΩ

    o

    2 VPP

    e 0

    C I

    R1

    AV = 1 + R2

    R1 R2

    100 kΩ 1 MΩ

    Figure 22. AC coupled non inverting amplifier

    eO (V)

  5. Typical single-supply applications



    e

    Figure 20. AC coupled inverting amplifier

    Rf

    100 kΩ R f

    A V= - R1

    R1 (As shown AV =- 10)

    CI 10 kΩ

    Co

    1/4

    LM124A e 0

    o


    RB RL

    6.2 kΩ 10 kΩ

    I ~ R2 R3

    VCC 100 kΩ 100 kΩ


    C1 10µF


    2VPP

    Figure 21. High input Z adjustable gain DC

    instrumentation amplifier

    R1

    100 kΩ




    R3


    R4



    1/4

    100 kΩ

    100 kΩ


    e 1

    LM124A







    1/4

    eO


    R2

    Gain adjust




    2 kΩ

    R5




    100 kΩ




    R6


    R7



    1/4

    100 kΩ

    100 kΩ


    LM124A

    e 2

    If R1 = R5 and R3 = R4 = R6 = R7

    eo = [ 1 + 2R1 ] (e2 - e1)

    R2

    As shown eo = 101 (e2 - e1)


    C1 0.1 µF

    1/4

    LM124A

    (as shown AV = 11)


    Co

    100 kΩ

    1/4

    LM124A

    e O


    10 kΩ

    (as shown AV =101)

    1/4

    LM124A

    1/4

    LM124A

    IB LM124A

    eo


    R1 10 kΩ

    R2 1 MΩ

    ZI

    2N 929 0.001µF


    2IB IB


    0

    IB

    Input current compensation

    Aux. amplifier for

    input current compensation

    Figure 26. Active bandpass filter


    R1 100 kΩ

    C1 330 pF

    1/4

    LM124A

    R5 470 kΩ

    e 1

    R4 10 MΩ

    1/4

    LM124A

    C2 330 pF

    1/4

    LM124A

    R7 100 kΩ

    Figure 27. High input Z, DC differential amplifier


    For R1 = R4 CMRR depends on the following resistor ration match R2 R3

    R2 R4

    100 kΩ 100 kΩ

    R1 100 kΩ

    R3 100 kΩ

    +V1

    +V2

    1/4

    LM124A

    Vo

    Vo = (1 + R4 ) (V2 - V1)


    R3 10 kΩ

    R6 470 kΩ

    e O

    1/4

    LM124A


    VCC


    Fo = 1 kHz Q = 50

    Av = 100 (40 dB)

    R8 100 kΩ

    C3 10µF

    R3

    As shown Vo = 2 * (V2 - V1)



    Figure 28. Using symmetrical amplifiers to reduce input current (general concept)


    1/4

    I I IB LM124A

    eo


    e I

    IB

    2N 929


    IB

    0.001µF


    IB


    1.5 MΩ

    3 MΩ 1/4 LM124A


    IB

    Package information


  6. Package information


In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

    1. QFN16 3x3 package information


      Figure 29. QFN16 3x3 package outline

      QFN16 3x3 package information



      Table 4. QFN16 3x3 mechanical data



      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A

      0.80

      0.90

      1.00

      0.031

      0.035

      0.039

      A1

      0


      0.05

      0


      0.002

      A3


      0.20



      0.008


      b

      0.18


      0.30

      0.007


      0.012

      D

      2.90

      3.00

      3.10

      0.114

      0.118

      0.122

      D2

      1.50


      1.80

      0.059


      0.071

      E

      2.90

      3.00

      3.10

      0.114

      0.118

      0.122

      E2

      1.50


      1.80

      0.059


      0.071

      e


      0.50



      0.020


      L

      0.30


      0.50

      0.012


      0.020


      Figure 30. QFN16 3x3 recommended footprint

      TSSOP14 package information



    2. TSSOP14 package information


      Figure 31. TSSOP14 package outline


      aaa


      Table 5. TSSOP14 package mechanical data



      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A



      1.20



      0.047

      A1

      0.05


      0.15

      0.002

      0.004

      0.006

      A2

      0.80

      1.00

      1.05

      0.031

      0.039

      0.041

      b

      0.19


      0.30

      0.007


      0.012

      c

      0.09


      0.20

      0.004


      0.0089

      D

      4.90

      5.00

      5.10

      0.193

      0.197

      0.201

      E

      6.20

      6.40

      6.60

      0.244

      0.252

      0.260

      E1

      4.30

      4.40

      4.50

      0.169

      0.173

      0.176

      e


      0.65



      0.0256


      L

      0.45

      0.60

      0.75

      0.018

      0.024

      0.030

      L1


      1.00



      0.039


      k



      aaa



      0.10



      0.004

      SO14 package information



    3. SO14 package information


      Figure 32. SO14 package outline



      Table 6. SO14 package mechanical data



      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.




      1.75



      0.069

      A

      1.35


      1.75

      0.05


      0.068

      A1

      0.10


      0.25

      0.004


      0.009

      A2

      1.10


      1.65

      0.04


      0.06

      B

      0.33


      0.51

      0.01


      0.02

      C

      0.19


      0.25

      0.007


      0.009

      D

      8.55


      8.75

      0.33


      0.34

      E

      3.80


      4.0

      0.15


      0.15

      e


      1.27



      0.05


      H

      5.80


      6.20

      0.22


      0.24

      h

      0.25


      0.50

      0.009


      0.02

      L

      0.40


      1.27

      0.015


      0.05

      k

      8° (max.)

      ddd



      0.10



      0.004

      Ordering information


  1. Ordering information


Table 7. Order codes


Order code

Temperature range

ESD (HBM, CDM)

Vio max. @ 25 °C

Package

Marking

LM124DT

-55 °C to 125 °C

250 V, 1.5 kV

5 mV


SO14

124

LM224ADT


-40 °C to 105 °C


800 V, 1.5 kV


3 mV


224A

LM224APT

TSSOP14

LM224DT


250 V, 1.5 kV


5 mV

SO14


224

LM224PT

TSSOP14

LM224QT

QFN16 3x3

K425

LM224WDT

700 V, 1.5 kV


3 mV


SO14

224W

LM324ADT


0 °C to 70 °C


800 V, 1.5 kV


324A

LM324APT

TSSOP14

LM324AWDT


700 V, 1.5 kV

SO14


324AW

LM324AWPT

TSSOP14

LM324WDT

SO14


324W

LM324WPT

TSSOP14

LM324DT


250 V, 1.5 kV


5 mV

SO14


324

LM324PT

TSSOP14

LM324QT

QFN16 3x3

K427


Revision history



Table 8. Document revision history


Date

Revision

Changes

1-Mar-2001

1

First release


1-Feb-2005


2

Added explanation of Vid and Vi limits in Table 2 on page 4.

Updated macromodel.

1-Jun-2005

3

ESD protection inserted in Table 2 on page 4.

25-Sep-2006

4

Editorial update.


22-Aug-2013


5

Removed DIP package and all information pertaining to it

Table 1: Device summary: Removed order codes LM224AN, LM224AD, LM324AN, and LM324AD; updated packaging.

Table 2: Absolute maximum ratings: removed N suffix power dissipation data; updated footnotes 5 and 6.

Renamed Figure 3, Figure 4, Figure 6, Figure 7, Figure 16, Figure 17, Figure 18, and Figure 19.

Updated axes titles of Figure 4, Figure 5, Figure 7, and Figure 17. Removed duplicate figures.

Removed Section 5: Macromodels

06-Dec-2013

6

Table 2: Absolute maximum ratings: updated ESD data for HBM and MM.


10-Jun-2016


7

LM124, LM224, LM324 and LM224W, LM324W datasheets merged with LM224A, LM324A datasheet. The following sections were reworked: Features, Description, Section 1: "Pin connections and schematic diagram", Section 2: "Absolute maximum ratings and operating conditions", and Section 3: "Electrical characteristics". The following sections were added: Related products and Section 7: "Ordering information". Packaged silhouettes, pin connections, and mechanical data were standardized and updated.


09-Sep-2019


8

Updated cover page, Section 2 Absolute maximum ratings and operating conditions and Table 3. VCC + = 5 V, VCC - = ground, Vo = 1.4 V, Tamb = 25 °C (unless otherwise specified).

Updated Figure 2. Schematic diagram (LM224A, LM324A, LM224W, LM324W, one channel) and Figure 3. Schematic diagram (LM124, LM224, LM324, one channel).

Contents


Contents

  1. Pin connections and schematic diagram

    2

  2. Absolute maximum ratings and operating conditions

    4

  3. Electrical characteristics

    6

  4. Electrical characteristic curves

    8

  5. Typical single-supply applications

    11

  6. Package information

    13

    1. QFN16 3x3 package information 13

    2. TSSOP14 package information 14

    3. SO14 package information 15

  7. Ordering information

    17

Revision history

18

List of tables


List of tables

Table 1. Absolute maximum ratings 4

Table 2. Operating conditions 5

Table 3. VCC + = 5 V, VCC - = ground, Vo = 1.4 V, Tamb = 25 °C (unless otherwise specified) 6

Table 4. QFN16 3x3 mechanical data 14

Table 5. TSSOP14 package mechanical data 15

Table 6. SO14 package mechanical data 16

Table 7. Order codes 17

Table 8. Document revision history 18

List of figures


List of figures

Figure 1. Pin connections (top view) 2

Figure 2. Schematic diagram (LM224A, LM324A, LM224W, LM324W, one channel) 3

Figure 3. Schematic diagram (LM124, LM224, LM324, one channel) 3

Figure 4. Input bias current vs. temperature 8

Figure 5. Output current limitation 8

Figure 6. Input voltage range 8

Figure 7. Supply current vs. supply voltage 8

Figure 8. Gain bandwidth product vs. temperature 8

Figure 9. Common-mode rejection ratio 8

Figure 10. Open loop frequency response 9

Figure 11. Large signal frequency response 9

Figure 12. Voltage follower pulse response 9

Figure 13. Output characteristics (current sinking) 9

Figure 14. Voltage follower pulse response (small signal) 9

Figure 15. Output characteristics (current sourcing) 9

Figure 16. Input current vs. supply voltage 10

Figure 17. Large signal voltage gain vs. temperature 10

Figure 18. Power supply and common mode rejection ratio vs. temperature 10

Figure 19. Voltage gain vs. supply voltage 10

Figure 20. AC coupled inverting amplifier 11

Figure 21. High input Z adjustable gain DC instrumentation amplifier 11

Figure 22. AC coupled non inverting amplifier 11

Figure 23. DC summing amplifier 11

Figure 24. Non-inverting DC gain 11

Figure 25. Low drift peak detector 11

Figure 26. Active bandpass filter 12

Figure 27. High input Z, DC differential amplifier 12

Figure 28. Using symmetrical amplifiers to reduce input current (general concept) 12

Figure 29. QFN16 3x3 package outline 13

Figure 30. QFN16 3x3 recommended footprint 14

Figure 31. TSSOP14 package outline 15

Figure 32. SO14 package outline 16


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