DATASHEET
ISL28130, ISL28230, ISL28430
Single, Dual, and Quad Micropower, Low Drift, RRIO Operational Amplifiers
FN7623 Rev 7.00
February 13, 2014
The ISL28130, ISL28230 and ISL28430 are single, dual and quad micropower, low offset drift operational amplifiers that are optimized for single and dual supply operation from 1.8V to 5.5V and ±0.9V to ±2.75V. Their low supply current of 20µA and rail-to-rail input/output enable the ISL28130, ISL28230, and ISL28430 to be an excellent general-purpose op amp for a range of applications. The ISL28130, ISL28230 and ISL28430 are ideal for handheld devices that operate off 2AA or single Li-ion batteries.
The ISL28130 is available in industry standard pinouts for 5 Ld SOT-23, 5 Ld SC70 and 8 Ld SOIC packages. The ISL28230 is available in industry standard pinouts for 8 Ld MSOP, 8 Ld SOIC and 8 Ld DFN packages. The ISL28430 is available in 14 Ld TSSOP and 14 Ld SOIC packages. Commercial devices operate over the temperature range of 0°C to 70°C. Full temperature range devices operate over the temperature range of -40°C to 125°C.
Low input offset voltage . . . . . . . . . . . . . . . . . . . . . 40µV, Max.
Low offset drift . . . . . . . . . . . . . . . . . . . . . . . . .150nV/°C, Max.
Input bias current. . . . . . . . . . . . . . . . . . . . . . . . . . 250pA, Max.
Quiescent current (per amplifier) . . . . . . . . . . . . . . .20µA, Typ.
Single supply range . . . . . . . . . . . . . . . . . . . . . .+1.8V to +5.5V
Dual supply range . . . . . . . . . . . . . . . . . . . . . .±0.9V to ±2.75V
Low noise (0.01Hz to 10Hz) . . . . . . . . . . . . . . . . 1.1µVP-P, Typ.
Rail-to-rail inputs and output
Bi-directional current sense
Temperature measurement
Medical equipment
Electronic weigh scales
Precision/strain gauge sensor
Precision regulation
Low Ohmic current sense
High gain analog front ends
I-SENSE+
V+
+1.8V TO +5.5V
400
0.1
4.99k
4.99k
+ V+
- V-
499k
499k
VREF
VSENSE OUT
300
INPUT BIAS CURRENT (pA)
200
100
VS = ±2.5V VS = ±0.9V
0
I-SENSE-
GND
BI-DIRECTIONAL CURRENT SENSE AMPLIFIER
-100
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
FIGURE 1. TYPICAL APPLICATION DIAGRAM FIGURE 2. IB vs TEMPERATURE
FN7623 Rev 7.00 Page 1 of 19
PART NUMBER | PART MARKING | TEMP RANGE (°C) | TEMPERATURE GRADE | PACKAGE (Pb-Free) | PKG. DWG. # |
0 to +70 | Commercial | 5 Ld SOT-23 | P5.064A | ||
0 to +70 | Commercial | 5 Ld SOT-23 | P5.064A | ||
BEFA (Note 5) | -40 to +125 | Full | 5 Ld SOT-23 | P5.064A | |
-40 to +125 | Full | 5 Ld SOT-23 | P5.064A | ||
0 to +70 | Commercial | 5 Ld SC-70 | P5.049 | ||
0 to +70 | Commercial | 5 Ld SC-70 | P5.049 | ||
-40 to +125 | Full | 5 Ld SC-70 | P5.049 | ||
-40 to +125 | Full | 5 Ld SC-70 | P5.049 | ||
8230Z | 0 to +70 | Commercial | 8 Ld MSOP | M8.118A | |
8230F | -40 to +125 | Full | 8 Ld MSOP | M8.118A | |
28230 CBZ | 0 to +70 | Commercial | 8 Ld SOIC | M8.15E | |
28230 FBZ | -40 to +125 | Full | 8 Ld SOIC | M8.15E | |
230Z | 0 to +70 | Commercial | 8 Ld 3mmx3mm DFN | L8.3x3J | |
230F | -40 to +125 | Full | 8 Ld 3mmx3mm DFN | L8.3x3J | |
28430 CBZ | 0 to +70 | Commercial | 14 Ld SOIC | MDP0027 | |
28430 FBZ | -40 to +125 | Full | 14 Ld SOIC | MDP0027 | |
28430 CVZ | 0 to +70 | Commercial | 14 Ld TSSOP | MDP0044 | |
28430 FVZ | -40 to +125 | Full | 14 Ld TSSOP | MDP0044 |
NOTES:
Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
Please refer to TB347 for details on reel specifications.
For Moisture Sensitivity Level (MSL), please see device information page for ISL28130, ISL28230, ISL28430. For more information on MSL please see Tech Brief TB363.
The part marking is located on the bottom of the part.
ISL28130 (5 LD SOT-23)
TOP VIEW
5
1
OUT V+
ISL28130 (8 LD SOIC) TOP VIEW
7
2
8
1
-
NC NC
V-
IN+
+ -
4
3
2
IN-
IN- IN+
V+ OUT
5
4
6
3
+
V- NC
ISL28130 (5 LD SC-70)
TOP VIEW
ISL28230
(8 LD MSOP, SOIC) TOP VIEW
1
IN+
2
+
V- -
3
IN-
V+
4
5
OUT
OUT_A 1
IN-_A 2 - +
IN+_A 3 + -
8 V+
7 OUT_B
6 IN-_B
V- 4 5 IN+_B
ISL28230 (8 LD DFN) TOP VIEW
ISL28430
(14 LD TSSOP, SOIC) TOP VIEW
1
OUT_A
IN-_A 2
IN+_A 3
PAD
V+
8
7 OUT_B
6 IN-_B
OUT_A 1
IN-_A 2
IN+_A 3
- + + -
14 OUT_D
13 IN-_D
12 IN+_D
V- 4
5 IN+_B
V+ 4
IN+_B 5
IN-_B 6
OUT_B 7
11 V-
10 IN+_C
- +
+ -
9 IN-_C
8 OUT_C
ISL28130 (5 Ld SOT-23) | ISL28130 (8 Ld SOIC) | ISL28130 (5 LD SC-70) | ISL28230 (8 Ld MSOP, SOIC, DFN) | ISL28430 (14 Ld TSSOP, SOIC) | PIN NAME | FUNCTION | EQUIVALENT CIRCUIT | ||||
3 | 3 | 1 | 3 5 - - | 3 5 10 12 | IN+ IN+_A IN+_B IN+_C IN+_D | Non-inverting input | IN- | V+ | - + | ||
IN+ | |||||||||||
V- | |||||||||||
2 | 4 | 2 | 4 | 11 | V- | Negative supply | |||||
4 | 2 | 3 | 2 6 - - | IN- | Inverting input | (See “Circuit 1”) | |||||
2 | IN-_A | ||||||||||
6 | IN-_B | ||||||||||
9 | IN-_C | ||||||||||
13 | IN-_D | ||||||||||
1 | 6 | 4 | 1 7 - - | OUT | Output | Circuit 2 | V+ OUT V- | ||||
1 | OUT_A | ||||||||||
7 | OUT_B | ||||||||||
8 | OUT_C | ||||||||||
14 | OUT_D | ||||||||||
5 | 7 | 5 | 8 | 4 | V+ | Positive supply | |||||
- | 1, 5, 8 | - | - | - | NC | Not Connected – This pin is not electrically connected internally. | |||||
- | - | - | PAD | - | Paddle | Thermal Pad. Connect to most negative supply. DFN packages only. |
Thermal Information | |||
Max Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V | Thermal Resistance (Typical) | JA (°C/W) | JC (°C/W) |
Max Voltage VIN to GND . . . . . . . . . . . . . . . . . . . . (V- - 0.3V) to (V+ + 0.3V)V | 5 Ld SOT-23 (Notes 6, 8) . . . . . . . . . . . . . . . | 225 | 110 |
Max Input Differential Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V | 5 Ld SC70 (Notes 6, 8). . . . . . . . . . . . . . . . . | 206 | 146 |
Max Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA | 8 Ld SOIC (ISL28130) (Notes 6, 8) . . . . . . . | 135 | 95 |
Max Voltage VOUT to GND (10s) . . . . . . . . . . . . . . (V- - 0.5V) to (V+ + 0.5V)V | 8 Ld MSOP (Notes 6, 8) . . . . . . . . . . . . . . . . | 180 | 65 |
ESD Tolerance (ISL28130) | 8 Ld SOIC (ISL28230) (Notes 6, 8) . . . . . . . | 125 | 90 |
Human Body Model (Tested at JESD22-A114F) . . . . . . . . . . . . . . . 3000V | 8 Ld DFN (Notes 7, 9). . . . . . . . . . . . . . . . . . | 53 | 12 |
Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . . 200V | 14 Ld TSSOP (Notes 6, 8) . . . . . . . . . . . . . . | 110 | 40 |
Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . . 1500V | 14 Ld SOIC (Notes 6, 8) . . . . . . . . . . . . . . . . | 75 | 47 |
ESD Tolerance (ISL28230, ISL28430)
Human Body Model (Tested at JESD22-A114F) . . . . . . . . . . . . . . . 4000V
Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . . 400V
Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . . 2000V Latch-Up (Passed Per JESD78B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Temperature Range
Full Grade Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Commercial Grade Devices. . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES:
JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379.
For JC, the “case temp” location is taken at the package top center.
For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, TA = +25°C, RL = 10kΩ, unless otherwise specified. Boldface limits apply over the entire operating temperature range.
PARAMETER | DESCRIPTION | CONDITIONS | MIN (Note 10) | TYP | MAX (Note 10) | UNIT |
DC SPECIFICATIONS | ||||||
VOS | Input Offset Voltage | Vs = 1.8V to 5.5V | -40 | ±5 | 40 | µV |
Vs = 1.8 to 5.5V; T = 0°C to +70°C | -46.8 | 46.8 | µV | |||
Vs = 1.8V to 5.5V; T = -40°C to +125°C | -55 | 55 | µV | |||
TCVOS | Input Offset Voltage Temperature Coefficient | -150 | 20 | 150 | nV/°C | |
IOS | Input Offset Current | -60 | pA | |||
TCIOS | Input Offset Current Temperature Coefficient | 0.11 | pA/°C | |||
IB | Input Bias Current | T = 0°C to +70°C | -250 | 250 | pA | |
T = -40°C to +125°C | -700 | 700 | pA | |||
Common Mode Input Voltage Range | Guaranteed by CMRR | -0.1 | 5.1 | V | ||
CMRR | Common Mode Rejection Ratio | VCM = -0.1V to 5.1V | 110 | 125 | dB | |
105 | dB | |||||
PSRR | Power Supply Rejection Ratio | Vs = 2.0V to 5.5V | 105 | 138 | dB | |
105 | dB | |||||
VOH | Output Voltage Swing, High | 4.950 | 4.981 | V | ||
VOL | Output Voltage Swing, Low | 18 | 50 | mV |
Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, TA = +25°C, RL = 10kΩ, unless otherwise specified. Boldface limits apply over the entire operating temperature range. (Continued)
PARAMETER | DESCRIPTION | CONDITIONS | MIN (Note 10) | TYP | MAX (Note 10) | UNIT |
AOL | Open Loop Gain | RL = 1MΩ | 150 | dB | ||
V+ | Supply Voltage | Guaranteed by VOS | 1.8 | 5.5 | V | |
IS | RL = OPEN | 20 | 25 | µA | ||
35 | µA | |||||
ISC+ | Output Source Short Circuit Current | RL = Short V- | 15 | mA | ||
ISC- | Output Sink Short Circuit Current | RL = Short V+ | -15 | mA | ||
AC SPECIFICATIONS | ||||||
GBWP | Gain Bandwidth Product | AV = 100, RF = 100kΩ RG = 1kΩ, RL = 10kΩ to VCM | 400 | kHz | ||
eN VP-P | Peak-to-Peak Input Noise Voltage | f = 0.01Hz to 10Hz | 1.1 | µVP-P | ||
eN | Input Noise Voltage Density | f = 1kHz | 65 | nV/(Hz) | ||
iN | Input Noise Current Density | f = 1kHz | 72 | fA/(Hz) | ||
f = 10Hz | 80 | fA/(Hz) | ||||
Cin | Differential Input Capacitance | f = 1MHz | 1.6 | pF | ||
Common Mode Input Capacitance | 1.12 | pF | ||||
TRANSIENT RESPONSE | ||||||
SR | Positive Slew Rate | VOUT = 1V to 4V, RL = 10kΩ | 0.2 | V/µs | ||
Negative Slew Rate | 0.1 | V/µs | ||||
tr, tf, Small Signal | Rise Time, tr 10% to 90% | AV = +1, VOUT = 0.1VP-P RF = 0Ω, RL = 10kΩ, CL = 1.2pF | 1.1 | µs | ||
Fall Time, tf 10% to 90% | 1.1 | µs | ||||
tr, tf Large Signal | Rise Time, tr 10% to 90% | AV = +1, VOUT = 2VP-P RF = 0Ω, RL = 10kΩ, CL = 1.2pF | 20 | µs | ||
Fall Time, tf 10% to 90% | 30 | µs | ||||
ts | Settling Time to 0.1%, 2VP-P Step | AV = +1, RF = 0Ω, RL = 10kΩ, CL = 1.2pF | 35 | µs | ||
trecover | Output Overload Recovery Time, Recovery to 90% of Output Saturation | AV = +2, RF = 10kΩ, RL = Open CL = 3.7pF | 10.5 | µs |
NOTE:
ypical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
400 400
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA)
300 300
200
100
VS = ±2.5V VS = ±0.9V
200
100
VS = ±0.9V
VS = ±2.5V
0 0
-100
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
-100
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
FIGURE 3. IB+ vs TEMPERATURE FIGURE 4. IB- vs TEMPERATURE
PER AMPLIFIER | ||||||
40
SUPPLY CURRENT (µA)
35
30
25
20
15
10
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
40
SUPPLY CURRENT (µA)
PER AMPLIFIER | ||||||
35
30
25
20
15
10
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
FIGURE 5. SUPPLY CURRENT vs TEMPERATURE, Vs = ±0.9V FIGURE 6. SUPPLY CURRENT vs TEMPERATURE, Vs = ±2.5V
21 200
SUPPLY CURRENT (µA)
OPEN LOOP GAIN (dB)/PHASE (°)
20 150
PHASE
100
19
50
18
0
VIN = 0V RL = OPEN
17
-50
1.5 | 2.0 2.5 | 3.0 3.5 4.0 4.5 | 5.0 | 5.5 | 6.0 | 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M |
SUPPLY VOLTAGE (V) | FREQUENCY (Hz) |
16 -100
RL = 10M CL = 100pF
SIMULATION
GAIN
FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 8. FREQUENCY RESPONSE vs OPEN LOOP GAIN,
RL = 10MΩ
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
1
0
RL = 100k
NORMALIZED GAIN (dB)
-1
1
0
NORMALIZED GAIN (dB)
-1 RL = 1k
RL = 100k
-2 RL = 1k
-3
RL = 10k
RL = OPEN -2
-3
RL = 10k
RL = OPEN
-4
-5
-6 VS = ±0.9V
-7 CL = 3.7pF AV = +1
RL = 49.9k
-4
-5
-6 VS = ±2.5V
CL = 3.7pF
-7 AV = +1
RL = 49.9k
-8 VOUT = 10mVP-P
-9
-8 VOUT = 10mVP-P
-9
100 1k 10k 100k 1M 10M FREQUENCY (Hz)
100 1k 10k 100k 1M 10M FREQUENCY (Hz)
FIGURE 9. GAIN vs FREQUENCY vs RL, VS = ±0.9V FIGURE 10. GAIN vs FREQUENCY vs RL, VS = ±2.5V
RF = | RG = 1k | ||||||||||||||||||||||||
RF = RG = 10k | |||||||||||||||||||||||||
VS = ±2.5V RL = 100k CL = 3.7pF AV = +2 VOUT = 10mVP-P | RF = RG = 100k | ||||||||||||||||||||||||
10 1
9 0
NORMALIZED GAIN (dB)
8 -1
7 -2
GAIN (dB)
6 -3
5 -4
4 -5
3 -6
VOUT = 1V
VOUT = 500mV
VOUT = 250mV
2 -7
VS = ±2.5V RL = OPEN
VOUT
= 100mV
1 -8
0 -9
CL = 3.7pF
AV = 1
VOUT = 10mV
100 1k 10k 100k 1M 10M FREQUENCY (Hz)
FIGURE 11. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES RF/RG
100 1k 10k 100k 1M 10M FREQUENCY (Hz)
FIGURE 12. GAIN vs FREQUENCY vs VOUT
70
60 AV = 1000
50
GAIN (dB)
40 AV = 100
30
20 AV = 10
1
RG = 100, RF = 100k 0
NORMALIZED GAIN (dB)
-1
RG = 1k, RF = 100k -2
-3
-4
V+ = 5V CL = 3.7pF
RL = 100k -5
VOUT = 10mVP-P
VS= ±1.5V
10
0
-10
AV = 1
RG = 10k, RF = 100k -6
-7
-8
RG = OPEN, RF = 0
10 | 100 | 1k | 10k 100k | 1M | 10M | 100 | 1k | 10k 100k | 1M | 10M |
FREQUENCY (Hz) | FREQUENCY (Hz) |
-9
VS = ±0.9V | ||||||||||||||||||||||||||
VS = ±2.75V | ||||||||||||||||||||||||||
RL = 100k CL = 3.7pF AV = +1 VOUT = 10mVP-P | ||||||||||||||||||||||||||
FIGURE 13. FREQUENCY RESPONSE vs CLOSED LOOP GAIN FIGURE 14. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
8
6
NORMALIZED GAIN (dB)
4
2
0
-2
-4
V = ±2.5V
CL = 824pF CL = 474pF
CL = 224pF
CL = 104pF CL = 51pF
5.0
4.5
4.0
3.5
SIGNAL (V)
3.0
2.5
2.0
1.5
RL = 100k CL = 3.7pF
-6 S
RL = 100k
-8 AV = +1
CL = 3.7pF
1.0
0.5
AV = 1
VOUT = 4VP-P
-10
VOUT = 10mVP-P 0
100 1k 10k 100k 1M 10M FREQUENCY (Hz)
0 50 100 150 200 250 300 350 400
TIME (µs)
FIGURE 15. GAIN vs FREQUENCY vs CL FIGURE 16. LARGE SIGNAL STEP RESPONSE (4V)
1.2
1.0
SIGNAL (V)
0.8
0.6
0.4
0.2
0
RL = 100k CL = 3.7pF AV = 1
VOUT = 1VP-P
0.14
0.12
0.10
SIGNAL (V)
0.08
0.06
0.04
0.02
0
RL = 100k CL = 3.7pF AV = 1
VOUT = 100mVP-P
0 10 20 30 40 50 60 70 80 90 100
TIME (µs)
0 5 10 15 20 25 30 35 40
TIME (µs)
FIGURE 17. LARGE SIGNAL STEP RESPONSE (1V) FIGURE 18. SMALL SIGNAL STEP RESPONSE (100mV)
VS = 5V RL = 10kΩ | ||||||
5.000
4.995
VOH (V)
4.990
4.985
4.980
4.975
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
40
VS = 5V RL = 10kΩ | ||||||
35
VOL (mV)
30
25
20
15
-50 -25 0 25 50 75 100 125
TEMPERATURE (°C)
FIGURE 19. VOH vs TEMPERATURE FIGURE 20. VOL vs TEMPERATURE
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, T = +25°C, unless otherwise specified.
-20
-40
CROSSTALK (dB)
-60
Vs = ±0.9V RL = OPEN CL = 3.7pF AV = 1
VOUT = 1VP-P
-20
-40
CROSSTALK (dB)
-60
Vs = ±2.5V RL = OPEN CL = 3.7pF AV = 1
VOUT = 1VP-P
-80 -80
-100 -100
-120 -120
-140
1k 10k 100k 1M
FREQUENCY (Hz)
-140
1k 10k 100k 1M
FREQUENCY (Hz)
FIGURE 21. CROSSTALK vs FREQUENCY, VS = ±0.9V FIGURE 22. CROSSTALK vs FREQUENCY, VS = ±2.5V
The ISL28130, ISL28230 and ISL28430 are low offset and low drift operational amplifiers with a very high open loop gain (150dB) and rail-to-rail input/output. They are designed to operate on a single supply range of 1.8V to 5.5V or a dual supply range of ±0.9V to ±2.75V while consuming only 20µA of supply current per channel. The ISL28130, ISL28230 and ISL28430 have a 400kHz gain-bandwidth.
The high open loop gain, low offset voltage, high bandwidth and low 1/f noise make the ISL28130, ISL28230 and ISL28430 ideal for precision applications.
The RRIO CMOS amplifier uses parallel input PMOS and NMOS that enable the inputs to swing 100mV beyond either supply rail. The inverting and non-inverting inputs do not have back-to-back input clamp diodes and are capable of maintaining high input impedance at high differential input voltages. This is effective in eliminating output distortion caused by high slew rate input signals.
The output stage uses common source connected PMOS and NMOS devices to achieve rail-to-rail output drive capability with 15mA current limit and the capability to swing to within 50mV of either rail while driving a 10kΩ load.
To achieve maximum performance from the high input impedance and low offset voltage of the ISL28130, ISL28230 and ISL28430 amplifiers, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board reduces surface moisture and provides a humidity barrier, reducing parasitic resistance on the board.
The circuit in Figure 24 implements a single-stage DC-coupled amplifier with an input DC sensitivity of under 100nV that is only possible using a low VOS amplifier with high open loop gain. High gain DC amplifiers operating from low voltage supplies are not practical using typical low offset precision op amps. For example, consider a typical precision amplifier in a gain of 10kV/V. A low
offset op amp with ±100µV VOS and 0.5µV/°C offset drift yields a DC error of >1V, with an additional 5mV/°C of
temperature-dependent error. This amount of error makes it difficult to resolve DC input voltage changes in the mV range.
The ±40µV max VOS and 150nV/°C temperature drift of the ISL28130, ISL28230, and ISL28430 produce a
temperature-stable maximum DC output error of only ±400mV, with a maximum output temperature drift of 1.5mV/°C. The additional benefit of a very low 1/f noise corner frequency and some feedback filtering allows DC voltages and voltage fluctuations well below 10µV to be easily detected with a simple, single-stage amplifier.
CF 0.018µF
1MΩ
+2.5V
-
- VIN
100Ω
+
VOUT
RL
VIN
RIN
+ RL
VOUT
1MΩ
100Ω
-2.5V
FIGURE 23. INPUT CURRENT LIMITING
ACL = 10kV/V
FIGURE 24. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER
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Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision.
DATE | REVISION | CHANGE |
February 13, 2014 | FN7623.7 | Ordering information table on page 2: Added part number ISL28230FRZ - Absolute Maximum Ratings table on page 5: changed Max Voltage VOUT to GND (10s) : from ±3.0V to: (V- - 0.5V) to (V+ + 0.5V)V.. |
November 22, 2013 | FN7623.6 | Removed “Coming Soon” from ISL28430FBZ in “Ordering Information” on page 2. |
November 8, 2012 | FN7623.5 | Removed “Coming Soon” from ISL28130FHZ-T7, ISL28130FEZ-T7, ISL28130CBZ, ISL28130FBZ, ISL28230FUZ, ISL28230FRZ, ISL28430FVZ, ISL28230FRZ, ISL28130CBZ and ISL28130FBZ in “Ordering Information” on page 2. |
February 10, 2012 | FN7623.4 | Removed “Coming Soon” from ISL28230FBZ in “Ordering Information” on page 2. |
June 13, 2011 | FN7623.3 |
|
March 1, 2011 | FN7623.2 | -Ordering Information Table: Removed all 'Coming Soon' under part numbers (except for ISL28130FBZ and ISL28230FRZ), added part markings for all 125°C grade parts. Added new data column called 'TEMPERATURE GRADE' to distinguish between 'Commercial' and 'Full' temp grades.
|
December 7, 2010 | FN7623.1 | Corrected Thermals for DFN package in “Tja from 125 to 53, “Tjc from 90 to 12” |
December 3, 2010 | Removed Part Markings from Full temp grade parts and changed to TBD until availability is validated. | |
December 2, 2010 | -Updated front page text to add DFN packaging and extended temp range -40°C to +125°C -Removed previous Ib vs Temp plot and added new -40°C to +125°C Ib vs Temp plot on front page. -Updated ordering information table by adding a full temp range option to all parts and temp range column. Also added in DFN part to ordering table. All full temp parts are stamped Coming Soon. -Added DFN package to Pin Configurations table. -Added -40°C to +125°C temp range under Operating Conditions page 5. -Added the testing standards performance information to the ESD ratings in Abs Max Table -Added new Input Bias Current Ib spec of 700pA MIN/MAX in Electrical Spec table for -40°C to +125°C temp range -Revised Note 10 for Electrical Spec table as: “Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.” -Updated all curves in the datasheet with 0°C to +70°C temp range to -40°C to +125°C temp range. -Added DFN package L8.3x3J outline drawing to the end of datasheet. | |
October 19, 2010 | On page 6 changed “Supply Current, Per Amplifier” from a typical of 18µA to 20µA to comply with front page. | |
August 17, 2010 | FN7623.0 | Initial Release |
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at http://www.intersil.com/en/support/qualandreliability.html#reliability
Small Outline Transistor Plastic Packages (SC70-5)
D
e1 VIEW C
5 4
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
SYMBOL | INCHES | MILLIMETERS | NOTES | ||
MIN | MAX | MIN | MAX | ||
A | 0.031 | 0.043 | 0.80 | 1.10 | - |
A1 | 0.000 | 0.004 | 0.00 | 0.10 | - |
A2 | 0.031 | 0.039 | 0.80 | 1.00 | - |
b | 0.006 | 0.012 | 0.15 | 0.30 | - |
b1 | 0.006 | 0.010 | 0.15 | 0.25 | |
c | 0.003 | 0.009 | 0.08 | 0.22 | 6 |
c1 | 0.003 | 0.009 | 0.08 | 0.20 | 6 |
D | 0.073 | 0.085 | 1.85 | 2.15 | 3 |
E | 0.071 | 0.094 | 1.80 | 2.40 | - |
E1 | 0.045 | 0.053 | 1.15 | 1.35 | 3 |
e | 0.0256 Ref | 0.65 Ref | - | ||
e1 | 0.0512 Ref | 1.30 Ref | - | ||
L | 0.010 | 0.018 | 0.26 | 0.46 | 4 |
L1 | 0.017 Ref. | 0.420 Ref. | - | ||
L2 | 0.006 BSC | 0.15 BSC | |||
| 0o | 8o | 0o | 8o | - |
N | 5 | 5 | 5 | ||
R | 0.004 | - | 0.10 | - | |
R1 | 0.004 | 0.010 | 0.15 | 0.25 |
E CL
1 2 3 CL E1
e b
CL
0.20 (0.008) M C
C
CL
A A2
A1 SEATING PLANE
-C-
0.10 (0.004) | C |
WITH PLATING
c
b
b1
c1
Rev. 3 7/07
SEATING PLANE
4X q1
C
4X q1
BASE METAL
R1
R
L
a
L1
GAUGE PLANE
L2
NOTES:
Dimensioning and tolerances per ASME Y14.5M-1994.
Package conforms to EIAJ SC70 and JEDEC MO-203AA.
Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs.
Footlength L measured at reference to gauge plane.
“N” is the number of terminal positions.
These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip.
Controlling dimension: MILLIMETER. Converted inch dimen- sions are for reference only.
VIEW C
0.4mm
0.75mm
2.1mm
0.65mm
TYPICAL RECOMMENDED LAND PATTERN
P5.064A
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 0, 2/10
1.90
0-3°
D
A 0.08-0.20
5 4
PIN 1 INDEX AREA
0.15 C D 2x
2
2.80
3
C 2x
1.60
3 5
(0.60)
0.95
0.20 M | C | A-B | D |
B 0.40 ±0.05 3
SEE DETAIL X END VIEW
TOP VIEW
10° TYP
(2 PLCS)
A-B
C
2.90
5 0.15 H
2x
C
| (0.25) | |||
0.10 | C | SEATING PLANE | 0.45±0.1 | |
1.45 MAX
1.14 ±0.15
GAUGE PLANE
SIDE VIEW
4
0.05-0.15
DETAIL "X"
(0.60)
(1.20)
NOTES:
(2.40)
(0.95)
Dimensions are in millimeters. Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
Dimension is exclusive of mold flash, protrusions or gate burrs.
Foot length is measured at reference to guage plane.
This dimension is measured at Datum “H”.
Package conforms to JEDEC MO-178AA.
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
A
3.0±0.1
8 0.25 CA B
3.0±0.1 4.9±0.15
DETAIL "X"
1.10 Max
PIN# 1 ID
1 2
B
0.65 BSC
SIDE VIEW 2
0.18 ± 0.05
TOP VIEW
0.95 BSC
0.86±0.09
H
C
SEATING PLANE
0.25
GAUGE PLANE
0.08 C | A | B |
0.33 +0.07/ -0.08 0.10 ± 0.05
SIDE VIEW 1
C
0.55 ± 0.15
DETAIL "X"
3°±3°
0.65
5.80
4.40
3.00
1.40
0.40
NOTES:
Dimensions are in millimeters.
Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994.
Plastic or metal protrusions of 0.15mm max per side are not included.
Plastic interlead protrusions of 0.25mm max per side are not included.
TYPICAL RECOMMENDED LAND PATTERN
Dimensions “D” and “E1” are measured at Datum Plane “H”.
This replaces existing drawing # MDP0043 MSOP 8L.
Thin Shrink Small Outline Package Family (TSSOP)
0.25 M C A B
D A
N (N/2)+1
THIN SHRINK SMALL OUTLINE PACKAGE FAMILY
E E1
PIN #1 I.D.
1 (N/2)
B TOP VIEW
C e
C B A
2X
N/2 LEAD TIPS
0.05
H
SEATING
PLANE
C
0.10
b
NOTES:
SYMBOL | MILLIMETERS | TOLERANCE | ||||
14 LD | 16 LD | 20 LD | 24 LD | 28 LD | ||
A | 1.20 | 1.20 | 1.20 | 1.20 | 1.20 | Max |
A1 | 0.10 | 0.10 | 0.10 | 0.10 | 0.10 | ±0.05 |
A2 | 0.90 | 0.90 | 0.90 | 0.90 | 0.90 | ±0.05 |
b | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | +0.05/-0.06 |
c | 0.15 | 0.15 | 0.15 | 0.15 | 0.15 | +0.05/-0.06 |
D | 5.00 | 5.00 | 6.50 | 7.80 | 9.70 | ±0.10 |
E | 6.40 | 6.40 | 6.40 | 6.40 | 6.40 | Basic |
E1 | 4.40 | 4.40 | 4.40 | 4.40 | 4.40 | ±0.10 |
e | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | Basic |
L | 0.60 | 0.60 | 0.60 | 0.60 | 0.60 | ±0.15 |
L1 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | Reference |
Rev. F 2/07
0.10 M | C | A | B | ||
N LEADS SIDE VIEW
SEE DETAIL “X”
Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side.
Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm per side.
Dimensions “D” and “E1” are measured at dAtum Plane H.
Dimensioning and tolerancing per ASME Y14.5M-1994.
c END VIEW
L1
A A2
GAUGE PLANE
0.25
A1 L
DETAIL X
0° - 8°
Small Outline Package Family (SO)
A
D
N (N/2)+1
h X 45°
E E1
PIN #1
I.D. MARK
A
c
SEE DETAIL “X”
1 (N/2)
B
L1
0.010 M C A B
e H
C
A2
SEATING PLANE
0.004 C
A1 L
b DETAIL X
B
A
C
0.010 M
0.010
4° ±4°
GAUGE PLANE
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL | INCHES | TOLERANCE | NOTES | ||||||
SO-8 | SO-14 | SO16 (0.150”) | SO16 (0.300”) (SOL-16) | SO20 (SOL-20) | SO24 (SOL-24) | SO28 (SOL-28) | |||
A | 0.068 | 0.068 | 0.068 | 0.104 | 0.104 | 0.104 | 0.104 | MAX | - |
A1 | 0.006 | 0.006 | 0.006 | 0.007 | 0.007 | 0.007 | 0.007 | ±0.003 | - |
A2 | 0.057 | 0.057 | 0.057 | 0.092 | 0.092 | 0.092 | 0.092 | ±0.002 | - |
b | 0.017 | 0.017 | 0.017 | 0.017 | 0.017 | 0.017 | 0.017 | ±0.003 | - |
c | 0.009 | 0.009 | 0.009 | 0.011 | 0.011 | 0.011 | 0.011 | ±0.001 | - |
D | 0.193 | 0.341 | 0.390 | 0.406 | 0.504 | 0.606 | 0.704 | ±0.004 | 1, 3 |
E | 0.236 | 0.236 | 0.236 | 0.406 | 0.406 | 0.406 | 0.406 | ±0.008 | - |
E1 | 0.154 | 0.154 | 0.154 | 0.295 | 0.295 | 0.295 | 0.295 | ±0.004 | 2, 3 |
e | 0.050 | 0.050 | 0.050 | 0.050 | 0.050 | 0.050 | 0.050 | Basic | - |
L | 0.025 | 0.025 | 0.025 | 0.030 | 0.030 | 0.030 | 0.030 | ±0.009 | - |
L1 | 0.041 | 0.041 | 0.041 | 0.056 | 0.056 | 0.056 | 0.056 | Basic | - |
h | 0.013 | 0.013 | 0.013 | 0.020 | 0.020 | 0.020 | 0.020 | Reference | - |
N | 8 | 14 | 16 | 16 | 20 | 24 | 28 | Reference | - |
Rev. M 2/07
NOTES:
Plastic or metal protrusions of 0.006” maximum per side are not included.
Plastic interlead protrusions of 0.010” maximum per side are not included.
Dimensions “D” and “E1” are measured at Datum Plane “H”.
Dimensioning and tolerancing per ASME Y14.5M-1994
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09
4
4.90 ± 0.10 A
DETAIL "A" 0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1 ID MARK
5
0.43 ± 0.076
(0.35) x 45°
1.27
4° ± 4°
0.25 M C | A | B |
SIDE VIEW “B”
TOP VIEW
MAX
0.175 ± 0.075
1.45 ± 0.1
0.25
GAUGE PLANE C SEATING PLANE
0.10 C
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(1.27) (0.60)
NOTES:
(1.50)
(5.40)
Dimensions are in millimeters. Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
Unless otherwise specified, tolerance : Decimal ± 0.05
Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side.
The pin #1 identifier may be either a mold or mark feature.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
L8.3x3J
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 0 9/09
(4X) 0.15
3.00 A
B
2X 1.950
0.65
6X
5 8
3.00
1.64 +0.10/ - 0.15
6
PIN 1 INDEX AREA
PIN #1 INDEX AREA 6
B
A
4 1
TOP VIEW
8X 0.400 ± 0.10
2.38
+0.10/ - 0.15
8X 0.30 4
0.10 M C
BOTTOM VIEW
( 2.38 )
( 1.95)
Max 1.00
SEE DETAIL "X"
0.10 C C
0.08 C
( 2.80 )
(1.64)
( 8X 0.60)
SIDE VIEW
PIN 1
(6x 0.65)
( 8 X 0.30)
C 0 . 2 REF 5
0 . 00 MIN.
TYPICAL RECOMMENDED LAND PATTERN
0 . 05 MAX.
DETAIL "X"
NOTES:
Dimensions are in millimeters. Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
Unless otherwise specified, tolerance : Decimal ± 0.05
Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature.
Authorized Distributor
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Renesas Electronics:
ISL28130CEZ-T7 ISL28130CEZ-T7A ISL28130CHZ-T7 ISL28130CHZ-T7A ISL28230CBZ ISL28230CBZ-T7 ISL28230CBZ-T7A ISL28230CRZ ISL28230CRZ-T13 ISL28230CRZ-T7 ISL28230CRZ-T7A ISL28230CUZ ISL28230CUZ-T7 ISL28230CUZ-T7A ISL28430CBZ ISL28430CBZ-T7 ISL28430CBZ-T7A ISL28430CVZ ISL28430CVZ-T13 ISL28430CVZ-T7A ISL28230FBZ-T7A ISL28230FBZ-T13 ISL28230FBZ-T7 ISL28230FBZ ISL28130FEZ-T7 ISL28130FEZ-T7A ISL28230FUZ ISL28230FUZ-T7 ISL28230FUZ-T7A ISL28430FVZ-T13 ISL28430FVZ-T7 ISL28430FVZ-T7A ISL28130FHZ-T7 ISL28130FHZ-T7A ISL28230FRZ-T7 ISL28430FVZ ISL28230FRZ-T13 ISL28230FRZ-T7A ISL28230FRZ ISL28430FBZ ISL28430FBZ-T13 ISL28430FBZ-T7