TSX631, TSX632, TSX634, TSX631A, TSX632A, TSX634A

Micropower (45 A, 200 kHz) rail-to-rail 16 V CMOS

operational amplifiers

Datasheet - production data



Single



SOT23-5


Dual


DFN8 2x2

MiniSO-8


Quad



QFN16 3x3

TSSOP14


Features


Description

The TSX63x and TSX63xA series of operational amplifiers offer low voltage operation and rail-to- rail input and output. TSX631 is the single version, TSX632 the dual version and TSX634 the quad version, with pinouts compatible with industry standards.

The TSX63x and TSX63xA series offer a 200 kHz gain bandwidth product while consuming 60 µA maximum at 16 V.

The devices are housed in the tiniest industrial packages.

These features make the TSX63x and TSX63xA family ideal for sensor interfaces and industrial signal conditioning. The wide temperature range and high ESD tolerance ease the use in harsh automotive applications.


Table 1. Device summary

Op-amp version

Standard Vio

Enhanced Vio

Single

TSX631

TSX631A

Dual

TSX632

TSX632A

Quad

TSX634

TSX634A


March 2013 DocID024293 Rev 1 1/31

This is information on a product in full production. www.st.com


Contents

  1. Package pin connections 3

  2. Absolute maximum ratings and operating conditions 4

  3. Electrical characteristics 5

  4. Application information 18

    1. Operating voltages 18

    2. Rail-to-rail input 18

    3. Input offset voltage drift over temperature 18

    4. Long term input offset voltage drift 19

    5. High values of input differential voltage 20

    6. PCB layouts 20

    7. Macromodel 21

  5. Package information 22

    1. SOT23-5 package information 23

    2. DFN8 2x2 package information 24

    3. MiniSO-8 package information 25

    4. QFN16 3x3 package information 26

    5. TSSOP14 package information 28

  6. Ordering information 29

  7. Revision history 30

  1. Package pin connections

    Figure 1. Pin connections for each package (top view)


    Single


    SOT23-5 (TSX631)


    Dual


    2871

    1

    8

    9&&+

    2871

    9&&+

    ,11-

    2


    7

    2872

    ,11-

    2872

    ,11+

    3

    6

    ,12-

    ,11+

    ,12-

    9&&-

    4

    5

    ,12+

    9&&-

    ,12+


    DFN8 2x2 (TSX632) Mini-SO8 (TSX632)



    ,11-


    2871

    2874


    ,14-

    Quad



    ,11+ 1


    9&&+ 2


    1& 3


    ,12+ 4

    16 15 14 13


    ,12-


    2872

    2873


    ,13-

    5 6 7 8


    12 ,14+


    11 9&&-


    10 1&


    9 ,13+



    QFN16 3x3 (TSX634) TSSOP14 (TSX634)


    DocID024293 Rev 1 3/31


  2. Absolute maximum ratings and operating conditions


    Table 2. Absolute maximum ratings (AMR)

    Symbol

    Parameter

    Value

    Unit

    VCC

    Supply voltage(1)

    18


    V

    Vid

    Differential input voltage (2)

    ±VCC

    Vin

    Input voltage(3)

    VCC- - 0.2 to VCC++ 0.2

    Iin

    Input current(4)

    10

    mA

    Tstg

    Storage temperature

    -65 to +150

    °C


    Rthja

    Thermal resistance junction to ambient(5)(6) SOT23-5

    DFN8 2x2

    MiniSO-8 QFN16 3x3 TSSOP14


    250

    120

    190

    80

    100


    °C/W

    Rthjc

    Thermal resistance junction to case DFN8 2x2

    QFN16 3x3


    33

    30

    Tj

    Maximum junction temperature

    160

    °C


    ESD

    HBM: human body model(7)

    4

    kV

    MM: machine model(8)

    200

    V

    CDM: charged device model(9)

    1.3

    kV


    Latch-up immunity

    200

    mA

    1. All voltage values, except the differential voltage are with respect to network ground terminal.

    2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. See

      Section 4.5 for precautions of using the TSX631 with high differential input voltage.

    3. VCC-Vin must not exceed 18 V, Vin must not exceed 18 V.

    4. Input current must be limited by a resistor in series with the inputs.

    5. Short-circuits can cause excessive heating and destructive dissipation.

    6. Rth are typical values.

    7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating.

    8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating.

    9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground.


      Table 3. Operating conditions

      Symbol

      Parameter

      Value

      Unit

      VCC

      Supply voltage

      3.3 to 16

      V

      Vicm

      Common mode input voltage range

      VCC- - 0.1 to VCC+ + 0.1

      Toper

      Operating free air temperature range

      -40 to +125

      °C


      4/31 DocID024293 Rev 1


  3. Electrical characteristics

    Table 4. Electrical characteristics at VCC+ = +3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL= 10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    DC performance


    Vio


    Offset voltage

    TSX63xA, T = 25 °C



    700


    V

    TSX63xA, -40°C < T < 125 °C



    1500

    TSX63x, T = 25 °C



    1.6


    mV

    TSX63x, -40°C < T < 125 °C



    2.4

    Vio

    Offset voltage, high common mode (Vicm=VCC, RL > 1 MΩ)

    T = 25 °C



    4

    -40°C < T < 125 °C



    5

    ΔVio/ΔT

    Input offset voltage drift

    -40°C < T < 125 °C(1)


    1

    8

    V/°C

    Iio

    Input offset current (Vout = VCC/2)

    T = 25 °C


    1

    100(2)


    pA

    -40°C < T < 125 °C



    200(2)

    Iib

    Input bias current (Vout = VCC/2)

    T = 25 °C


    1

    100(2)

    -40°C < T < 125 °C



    200(2)

    RIN

    Input resistance



    1


    TΩ

    CIN

    Input capacitance



    5


    pF


    CMR1

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩs)

    T = 25 °C

    65

    79



    dB


    -40°C < T < 125 °C


    62




    CMR2

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    59

    74



    -40°C < T < 125 °C


    55




    Avd

    Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ)

    T = 25 °C

    100

    110


    -40°C < T < 125°C

    90



    VOH

    High level output voltage Vid = +1 V, VOH = VCC-Vout

    RL = 10 kΩ, T = 25 °C



    70


    mV

    RL = 10 kΩ, -40 °C < T < 125 °C



    100

    VOL

    Low level output voltage Vid = -1 V,

    RL = 10 kΩ, T = 25 °C



    70

    RL = 10 kΩ, -40°C < T < 125 °C



    100


    Iout

    Isink (Vout = VCC)

    T = 25 °C

    4.3

    5.3



    mA

    -40°C < T < 125 °C

    2.5



    Isource (Vout = 0 V)

    T = 25 °C

    3.3

    4.3


    -40°C < T < 125 °C

    2.5




    ICC

    Supply current

    (per operator, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C


    45

    60


    µA

    -40°C < T < 125 °C



    60


    DocID024293 Rev 1 5/31


    Table 4. Electrical characteristics at VCC+ = +3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL= 10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    AC performance

    GBP

    Gain bandwidth product


    RL = 100 kΩ, CL = 100 pF

    160

    200



    kHz

    Fu

    Unity gain frequency


    160


    m

    Phase margin


    55


    degrees

    Gm

    Gain margin


    9


    dB

    SR

    Slew rate

    RL = 100 kΩ CL = 100 pF, Vout = 0.5 V to VCC - 0.5V


    0.12


    V/s

    en

    Low-frequency peak-to-peak input noise

    Bandwidth: f = 0.1 to 10 Hz


    5


    µVpp


    en


    Equivalent input noise voltage

    f = 1 kHz



    60



    ---n--V-----

    Hz

    f = 10 kHz




    THD+N


    Total harmonic distortion + noise

    Follower configuration, fin = 1 kHz, RL = 100 kΩ,

    Vicm = 0.9V, BW = 22 kHz,

    Vout = 1 Vpp



    0.005



    %

    1. See Chapter 4.3: Input offset voltage drift over temperature on page 18

    2. Guaranteed by design


    6/31 DocID024293 Rev 1


    Table 5. Electrical characteristics at VCC+ = +5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL= 10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    DC performance


    Vio


    Offset voltage

    TSX63xA, T = 25 °C



    700


    V

    TSX63xA, -40°C < T < 125 °C



    1500

    TSX63x, T = 25 °C



    1.6


    mV

    TSX63x, -40°C < T < 125 °C



    2.4

    Vio

    Offset voltage, high common mode (Vicm=VCC, RL > 1 MΩ)

    T = 25 °C



    4

    -40°C < T < 125 °C



    5

    ΔVio/ΔT

    Input offset voltage drift

    -40°C < T < 125 °C(1)


    1

    8

    V/°C

    ΔVio

    Long term input offset voltage drift

    T = 25 °C(2)


    17


    ---------n V-------------

    month

    Iio

    Input offset current (Vout = VCC/2)

    T = 25 °C


    1

    100(3)


    pA

    -40°C < T < 125 °C



    200(3)

    Iib

    Input bias current (Vout = VCC/2)

    T = 25 °C


    1

    100(3)

    -40°C < T < 125 °C



    200(3)

    RIN

    Input resistance



    1


    TΩ

    CIN

    Input capacitance



    5


    pF


    CMR1

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    65

    79



    dB


    -40°C < T < 125 °C


    62




    CMR2

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    62

    77



    -40°C < T < 125 °C


    58




    Avd

    Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ)

    T = 25 °C

    100

    110


    -40°C < T < 125 °C

    90



    VOH

    High level output voltage Vid = +1 V, VOH = VCC-Vout

    RL = 10 kΩ, T=25 °C



    70


    mV

    RL = 10 kΩ, -40°C < T < 125 °C



    100

    VOL

    Low level output voltage Vid = -1 V,

    RL = 10 kΩ, T = 25 °C



    70

    RL = 10 kΩ, -40°C < T < 125 °C



    100


    Iout

    Isink (Vout = VCC)

    T = 25 °C

    11

    14



    mA

    -40°C < T < 125 °C

    8



    Isource (Vout = 0 V)

    T = 25 °C

    9

    12


    -40°C < T < 125 °C

    7




    ICC

    Supply current

    (per operator, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C


    45

    60


    µA

    -40°C < T < 125 °C



    60


    DocID024293 Rev 1 7/31


    Table 5. Electrical characteristics at VCC+ = +5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL= 10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    AC performance

    GBP

    Gain bandwidth product


    RL = 100 kΩ, CL = 100 pF

    160

    200



    kHz

    Fu

    Unity gain frequency


    160


    m

    Phase margin


    55


    degrees

    Gm

    Gain margin


    9


    dB

    SR

    Slew rate

    RL = 100 kΩ CL = 100 pF, Vout = 0.5 V to VCC - 0.5V


    0.12


    V/s

    en

    Low-frequency peak-to-peak input noise

    Bandwidth: f = 0.1 to 10 Hz


    5


    µVpp


    en


    Equivalent input noise voltage

    f = 1 kHz



    60



    ---n--V-----

    Hz

    f = 10 kHz




    THD+N


    Total harmonic distortion + noise

    Follower configuration, fin = 1 kHz, RL = 100 kΩ,

    Vicm = 2.5V, BW = 22 kHz,

    Vout = 1 Vpp



    0.005



    %

    1. See Chapter 4.3: Input offset voltage drift over temperature on page 18

    2. Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

    3. Guaranteed by design



    8/31 DocID024293 Rev 1


    Table 6. Electrical characteristics at VCC+ = +10 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL=10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    DC performance


    Vio


    Offset voltage

    TSX63xA, T = 25 °C



    500


    V

    TSX63xA, -40°C < T < 125 °C



    1300

    TSX63x, T = 25 °C



    1


    mV

    TSX63x, -40°C < T < 125 °C



    1.8

    Vio

    Offset voltage, high common mode (Vicm=VCC, RL > 1 MΩ)

    T = 25 °C



    4

    -40°C < T < 125 °C



    5

    ΔVio/ΔT

    Input offset voltage drift

    -40°C < T < 125 °C(1)


    1

    8

    V/°C

    ΔVio

    Long term input offset voltage drift

    T = 25 °C(2)


    180


    ---------n V-------------

    month

    Iio

    Input offset current (Vout = VCC/2)

    T = 25 °C


    1

    100(3)


    pA

    -40°C < T < 125 °C



    200(3)

    Iib

    Input bias current (Vout = VCC/2)

    T = 25 °C


    1

    100(3)

    -40°C < T < 125 °C



    200(3)

    RIN

    Input resistance



    1


    TΩ

    CIN

    Input capacitance



    5


    pF


    CMR1

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    71

    84



    dB


    -40°C < T < 125 °C


    68




    CMR2

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    69

    82



    -40°C < T < 125 °C


    66




    Avd

    Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ)

    T = 25 °C

    100

    110


    -40°C < T < 125 °C

    90



    VOH

    High level output voltage Vid = +1 V, VOH = VCC-Vout

    RL = 10 kΩ, T = 25 °C



    70


    mV

    RL = 10 kΩ, -40°C < T < 125 °C



    100

    VOL

    Low level output voltage Vid = -1 V,

    RL = 10 kΩ, T = 25 °C



    70

    RL = 10 kΩ, -40°C < T < 125 °C



    100


    Iout

    Isink (Vout = VCC)

    T = 25 °C

    35

    51



    mA

    -40°C < T < 125 °C

    25



    Isource (Vout = 0 V)

    T = 25 °C

    30

    42


    -40°C < T < 125 °C

    20




    ICC

    Supply current

    (per operator, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C


    45

    60


    µA

    -40°C < T < 125 °C



    60


    DocID024293 Rev 1 9/31


    Table 6. Electrical characteristics at VCC+ = +10 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL=10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    AC performance

    GBP

    Gain bandwidth product


    RL = 100 kΩ, CL = 100 pF

    160

    200



    kHz

    Fu

    Unity gain frequency


    160


    m

    Phase margin


    55


    degrees

    Gm

    Gain margin


    9


    dB

    SR

    Slew rate

    RL = 100 kΩ CL = 100 pF, Vout = 0.5 V to VCC - 0.5V


    0.12


    V/s

    en

    Low-frequency peak-to-peak input noise

    Bandwidth: f = 0.1 to 10 Hz


    5


    µVpp


    en


    Equivalent input noise voltage

    f = 1 kHz



    60



    ---n--V-----

    Hz

    f = 10 kHz




    THD+N


    Total harmonic distortion + noise

    Follower configuration, fin = 1 kHz, RL = 100 kΩ, Vicm = 5 V, BW = 22 kHz,

    Vout = 1 Vpp



    0.004



    %

    1. See Chapter 4.3: Input offset voltage drift over temperature on page 18

    2. Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

    3. Guaranteed by design



    10/31 DocID024293 Rev 1


    Table 7. Electrical characteristics at VCC+ = +16 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL=10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit

    DC performance


    Vio


    Offset voltage

    TSX63xA, T = 25 °C



    700


    V

    TSX63xA, -40°C < T < 125 °C



    1500

    T = 25 °C



    1.6


    mV

    -40°C < T < 125 °C



    2.4


    Vio

    Offset voltage, high common- mode (Vicm=VCC, RL > 1 MΩ)

    T = 25°C



    4

    -40°C < T < 125 °C



    5

    ΔVio/ΔT

    Input offset voltage drift

    -40°C < T < 125 °C(1)


    1

    8

    V/°C

    ΔVio

    Long term input offset voltage drift

    T = 25 °C(2)


    3.4


    --------- V-------------

    month


    Iio

    Input offset current (Vout = VCC/2)

    T = 25 °C


    1

    100(3)


    pA

    -40°C < T < 125 °C



    200(3)

    Iib

    Input bias current (Vout = VCC/2)

    T = 25 °C


    1

    100(3)

    -40°C < T < 125 °C



    200(3)

    RIN

    Input resistance



    1


    TΩ

    CIN

    Input capacitance



    5


    pF


    CMR1

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    71

    85



    dB


    -40°C < T < 125 °C


    68




    CMR2

    Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C

    69

    83



    -40°C < T < 125 °C


    66




    SVR

    Common mode rejection ratio 20 log (ΔVCC/ΔVio)

    (VCC =3.3 V to 16 V,

    Vout = Vicm VCC/2)

    T = 25 °C

    73

    87



    -40°C < T < 125 °C


    70




    Avd

    Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V),

    RL > 1 MΩ)

    T = 25 °C

    100

    110


    -40°C < T < 125 °C

    90




    VOH

    High level output voltage Vid = +1 V, VOH = VCC-Vout

    RL = 10 kΩ, T = 25 °C



    70


    mV

    RL = 10 kΩ, -40°C < T < 125 °C



    100

    VOL

    Low level output voltage Vid = -1 V,

    RL = 10 kΩ, T = 25 °C



    70

    RL = 10 kΩ, -40°C < T < 125 °C



    100


    DocID024293 Rev 1 11/31


    Table 7. Electrical characteristics at VCC+ = +16 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL=10 kΩ connected to VCC/2 (unless otherwise specified)

    Symbol

    Parameter

    Conditions

    Min.

    Typ.

    Max.

    Unit


    Iout

    Isink

    Vout = VCC, T = 25 °C

    40

    92



    mA

    Vout = VCC, -40°C < T < 125 °C

    35




    Isource

    Vout = 0 V, T = 25 °C

    30

    90


    Vout = 0 V, -40°C < T < 125 °C

    25




    ICC

    Supply current

    (per operator, Vout = VCC/2, RL > 1 MΩ)

    T = 25 °C


    45

    60


    µA

    -40°C < T < 125 °C



    60

    AC performance

    GBP

    Gain bandwidth product


    RL = 100 kΩ, CL = 100 pF

    160

    200



    kHz

    Fu

    Unity gain frequency


    160


    m

    Phase margin


    55


    degrees

    Gm

    Gain margin


    9


    dB

    SR

    Slew rate

    RL = 100 kΩ CL = 100 pF, Vout = 0.5 V to VCC - 0.5V


    0.12


    V/s

    en

    Low-frequency peak-to-peak input noise

    Bandwidth: f = 0.1 to 10 Hz


    5


    µVpp


    en


    Equivalent input noise voltage

    f = 1 kHz



    60



    ---n--V-----

    Hz

    f = 10 kHz




    THD+N

    Total harmonic distortion + noise

    Follower configuration, fin = 1 kHz, RL = 100 kΩ, Vicm = 8 V,

    BW = 22 kHz, Vout = 1 Vpp



    0.004



    %

    1. See Chapter 4.3: Input offset voltage drift over temperature on page 18

    2. Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

    3. Guaranteed by design


    12/31 DocID024293 Rev 1


    Supply Current (µA)

    Population (%)

    Figure 2. Supply current vs. supply voltage at Vicm = VCC/2

    Figure 3. Input offset voltage distribution at VCC = 16 V


    50







    20


    Vcc=16V





    40


    Vicm=Vcc/2





    15

    Vicm=8V T=25°C





    30

















    10





    20













    T=25°C


    T=-40°C



    5





    10


    T=125°C










    0







    0





    0

    2

    4 6 8 10

    12

    14

    16

    -1500

    -1000

    -500 0 500

    1000

    1500



    Supply Voltage (V)






    Input offset voltage (µV)





    35

    Vcc=3.3V

    30 Vicm=1.65V T=25°C

    25


    20


    15


    10


    5


    0

    -250 -200 -150 -100 -50 0 50 100 150 200 250

    Input offset voltage (µV)

    Population (%)

    Figure 4. Input offset voltage distribution at VCC = 10 V


    Population (%)

    Figure 6. Input offset voltage temperature coefficient distribution

    Figure 5. Input offset voltage vs. temperature at VCC=16 V



    Limit for TSX63x









    Limit for TSX63xA






























































































    Vcc=16V












    3000


    2000


    1000


    0


    -1000


    -2000


    -3000

    -40 -20 0 20 40 60 80 100 120

    Temperature (°C)

    Input offset voltage (µV)

    Input Offset Voltage (µV)

    Figure 7. Input offset voltage vs. input common mode voltage


    25



    Vcc=16V











    600






    20


    Vicm=8V T=25°C











    400


















    200





    15













    0




















    T=125°C
















    -200


    T=25°C



    10













    -400


    T=-40°C




    5













    -600


















    -800


    Vcc=16V



    0













    -1000






    -8

    -7 -6 -5

    -4

    -3

    -2

    -1 0 1 2

    3

    4

    5

    6

    7

    8


    0

    2 4 6 8 10 12

    14

    16







    ΔVio/ΔT (µV/°C)









    Input Common Mode Voltage (V)





    DocID024293 Rev 1 13/31


    Output Current (mA)

    Output Current (mA)

    Figure 8. Output current vs. output voltage at VCC = 3.3 V

    Figure 9. Output current vs. output voltage at VCC = 16 V

    10.0

    Sink

    7.5 Vid=-1V

    5.0


    2.5


    0.0 T=125°C

    -2.5


    -5.0


    -7.5


    -10.0

    0.0 0.5


    T=25°C T=-40°C


    Vcc=3.3V


    1.0 1.5 2.0 2.5

    Output Voltage (V)


    Source Vid=1V

    3.0

    125





    100 Sink





    Vid=-1V





    75





    50





    25


    T=-40°C



    0


    T=25°C



    -25 T=125°C





    -50





    -75





    -100




    Source

    -125


    Vcc=16V


    Vid=1V

    0.0 2.0

    4.0

    6.0 8.0 10.0

    12.0

    14.0 16.0



    Output Voltage (V)




    0.10

    0.15

    0.20

    Vout (V)

    Figure 10. Output low-rail linearity performance (RL2 kΩ







    From Vcc=3.3V to Vcc=16V

















    Follower configuration T=25°C






    0.05

    0.10

    Vin (V)

    0.15


    0.20

    0.00

    0.00

    0.05

    Figure 12. Bode diagram at VCC = 3.3 V, RL= 10 kΩ

    Figure 11. Output high-rail linearity performance (RL2kΩ







    From Vcc=3.3V to Vcc=16V

















    Follower configuration T=25°C






    0.05

    0.10

    Vcc - Vin (V)

    0.15

    0.20


    10 -135

    T=-40°C

    10 -135

    T=-40°C

    0.00

    0.00

    0.05

    0.10

    0.15

    0.20

    Gain (dB)

    Phase (°)

    Vcc - Vout (V)

    Gain (dB)

    Phase (°)

    Figure 13. Bode diagram at VCC = 3.3 V, RL= 100 kΩ


    40

    0

    40

    0


    Gain

    Gain


    30

    -45

    30

    -45


    20

    -90

    20

    -90


    Phase

    Phase


    0

    Vcc=3.3V Vicm=1.65V Rl=10kΩ Cl=100pF

    Gain=-100

    T=25°C

    -180

    0

    T=25°C

    -180


    -20

    -270 1M

    -20


    Frequency (Hz)

    Frequency (Hz)



    -270 1M

    100k

    10k

    1k

    T=125°C

    -225

    -10

    Vcc=3.3V Vicm=1.65V Rl=100kΩ Cl=100pF

    Gain=-100

    100k

    10k

    1k

    T=125°C

    -225

    -10

    14/31 DocID024293 Rev 1


    10 -135

    T=-40°C

    10 -135

    T=-40°C

    Gain (dB)

    Phase (°)

    Gain (dB)

    Phase (°)

    Figure 14. Bode diagram at VCC = 16 V, RL = 10 kΩ

    Figure 15. Bode diagram at VCC = 16 V, RL = 100 kΩ


    40

    0

    40

    0


    Gain

    Gain


    30

    -45

    30

    -45


    20

    -90

    20

    -90


    Phase

    Phase


    0

    Vcc=16V

    Vicm=8V Rl=10kΩ Cl=100pF

    Gain=-100

    T=25°C

    -180

    0

    T=25°C

    -180


    -20

    -270 1M

    -20


    Frequency (Hz)

    Frequency (Hz)


    -270 1M

    100k

    10k

    1k

    T=125°C

    -225

    -10

    Vcc=16V

    Vicm=8V Rl=100kΩ Cl=100pF

    Gain=-100

    100k

    10k

    1k

    T=125°C

    -225

    -10

    Gain (dB)

    Riso (Ω)

    Figure 16. Closed-loop gain vs. capacitive load

    Figure 17. In-series resistor (Riso) vs. capacitive load


    15


    10


    5


    0


    -5


    -10


    -15

    1k


    Follower configuration Vcc=16V

    Vicm=8V Rl=100kΩ T=25°C


    Cl=20pF


    Cl=100pF


    10k 100k

    Frequency (Hz)


    Cl=470pF


    Cl=200pF


    1M

    10000



    Follower configuration


    Stable Vcc=16V


    Vicm=8V


    Rl=100kΩ

    1000

    T=25°C



    Unstable

    100



    10


    100p

    1n 10n 100n


    Cload (F)


    6.0

    5.0

    4.0

    3.0

    2.0

    1.0

    0.0

    -1.0

    -2.0

    -3.0

    -4.0

    -5.0

    -6.0

    -20 0 20 40

    6.0

    5.0

    4.0

    3.0

    2.0

    1.0

    0.0

    -1.0

    -2.0

    -3.0

    -4.0

    -5.0

    -6.0

    -20 0 20 40

    Output Voltage (V)

    Output Voltage (V)

    Figure 18. Negative slew rate Figure 19. Positive slew rate








    Vcc=16V

    Vicm=Vcc/2 Rl=100kΩ Cl=100pF








    T=-40°C

























    T=25°C
























    T=125°C








































































    T=125°C















    T=25°C

















    Vcc=16V

    Vicm=Vcc/2 Rl=100kΩ

    Cl=100pF






    T=-40°C




















    60

    Time (µs)

    80 100 120 140

    60

    Time (µs)

    80 100 120 140


    DocID024293 Rev 1 15/31


    Slew rate (V/µs)

    Output Voltage (V)

    Figure 20. Slew rate vs. supply voltage Figure 21. Small step response

    0.20




    0.10


    0.05


    0.00


    -0.05


    -0.10


    0


    10


    20

    Time (µs)


    30


    Vcc = 16V

    Vicm=8V Rl=100kΩ Cl=100pF T=25°C


    40

    0.15




    0.10




    0.05







    Vicm=Vcc/2

    0.00



    Vload=Vcc/2


    T=125°C

    T=25°C

    T=-40°C

    Rl=100kΩ

    -0.05



    Cl=100pF

    -0.10




    -0.15




    -0.20





    4

    6

    8

    10 12

    14

    16



    Supply Voltage (V)


    0

    2

    Vcc=16V

    Vicm=8V T=25°C

    4

    400


    350


    300


    250


    200


    150


    100


    50


    0

    10

    Vcc=16V

    Vicm=Vcc/2 T=25°C

    Equivalent Input Noise Voltage (nV/VHz)

    Input voltage noise (µV)

    Figure 22. Noise vs. frequency at VCC = 16 V Figure 23. 0.1 Hz to 10 Hz noise at VCC = 16 V


    Time (s)

    10

    8

    6

    4

    2

    -4

    0

    -2

    10000

    1000

    Frequency (Hz)

    100

    THD + N (%)

    THD + N (%)

    Figure 24. THD+N vs. frequency at VCC = 16 V

    Figure 25. THD+N vs. output voltage at VCC = 16 V

    1




    1





    Vcc=16V








    Vicm=8V








    Gain=1








    Vin=1Vpp

    BW=80kHz



    0.1





    Rl=100kΩ







    0.1

    T=25°C












    Vcc=16V







    0.01

    Vicm=8V








    Gain=1








    f=1kHz








    BW=22kHz








    Rl=100kΩ








    T=25°C



    0.01


    100


    1000

    Frequency (Hz)


    10000

    1E-3

    0.01



    0.1 1

    Output Voltage (Vpp)


    10


    16/31 DocID024293 Rev 1


    Output impedance (Ω)

    PSRR (dB)

    Figure 26. Output impedance vs. frequency in closed loop configuration

    Figure 27. PSRR vs. frequency


    10000



    10k 100k

    Frequency (Hz)



    100



    PSRR+


    PSRR-


    1k 10k

    Frequency (Hz)


    Vcc=16V

    Vicm=8V Gain=1 Rl=10kΩ Cl=100pF

    Vosc=100mV

    PP

    T=25°C


    100k



    Vcc=16V






    1000

    Vicm=8V

    Gain=1



    80




    Vosc=30mV













    100

    T=25°C



    60




    10





    40




    1





    20




    0.1





    0



    10

    100 1k

    1M

    10M

    10

    100

    1M


    DocID024293 Rev 1 17/31


  4. Application information


    1. Operating voltages

      The amplifiers of the TSX63x and TSX63xA series can operate from 3.3 to 16 V. Their parameters are fully specified at 3.3, 5, 10 and 16 V power supplies. However, the parameters are very stable in the full VCC range. Additionally, the main specifications are guaranteed in extended temperature ranges from -40 ° C to +125 ° C.


    2. Rail-to-rail input

      The TSX63x and TSX63xA are built with two complementary PMOS and NMOS input differential pairs. The devices have a rail-to-rail input, and the input common mode range is extended from VCC-- 0.1 V to VCC+ + 0.1 V.

      However, the performance of these devices is clearly optimized for the PMOS differential pairs (which means from VCC- - 0.1V to VCC+ - 1.65V).

      Beyond VCC+ - 1.65 V, the op-amp is still functional but with a degraded performance as can be observed in the electrical characteristics section of this datasheet (mainly Vio).

      These performances are suitable for a number of applications requiring rail-to-rail input and output.

      The devices are guaranteed without phase reversal.


    3. Input offset voltage drift over temperature

      The maximum input voltage drift over the temperature variation is defined as the offset variation related to offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations.

      The maximum input voltage drift over temperature is computed using Equation 1.


      Equation 1


      ΔVio

      VioTVio25 C

      ---Δ-------- = max ---------------------------------------------------

      T T 25 C


      with T = -40 °C and 125 °C.

      The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk (process capability index) greater than 2.


      18/31 DocID024293 Rev 1


    4. Long term input offset voltage drift

      To evaluate product reliability, two types of stress acceleration are used:

    5. High values of input differential voltage

      In closed loop configuration, which represents the typical use of an op-amp, the input differential voltage is low (close to Vio). However, some specific conditions can lead to higher input differential values, such as:

      • operation in an output saturation state

      • operation at speeds higher than the device bandwidth, with output voltage dynamics limited by slew rate.

      • use of the amplifier in a comparator configuration, hence in open loop

        Use of the TSX631 in comparator configuration, especially combined with high temperature and long duration can create a permanent drift of Vio.

        All channels of the dual and quad versions of the TSX632 and TSX634 are virtually unaffected when used in comparator configuration.


    6. PCB layouts

      For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins.


      20/31 DocID024293 Rev 1


    7. Macromodel

      Accurate macromodels of the TSX63x and TSX63xA are available on STMicroelectronics’ web site at www.st.com. These models are a trade-off between accuracy and complexity (that is, time simulation) of the TSX63x and TSX63xA operational amplifiers. They emulate the nominal performances of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements.


      DocID024293 Rev 1 21/31


  1. Package information


    In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com.

    ECOPACK® is an ST trademark.


    22/31 DocID024293 Rev 1


    1. SOT23-5 package information

      Figure 28. SOT23-5 package mechanical drawing


      Table 8. SOT23-5 package mechanical data


      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A

      0.90

      1.20

      1.45

      0.035

      0.047

      0.057

      A1



      0.15



      0.006

      A2

      0.90

      1.05

      1.30

      0.035

      0.041

      0.051

      B

      0.35

      0.40

      0.50

      0.013

      0.015

      0.019

      C

      0.09

      0.15

      0.20

      0.003

      0.006

      0.008

      D

      2.80

      2.90

      3.00

      0.110

      0.114

      0.118

      D1


      1.90



      0.075


      e


      0.95



      0.037


      E

      2.60

      2.80

      3.00

      0.102

      0.110

      0.118

      F

      1.50

      1.60

      1.75

      0.059

      0.063

      0.069

      L

      0.10

      0.35

      0.60

      0.004

      0.013

      0.023

      K

      0 °


      10 °

      0 °


      10 °


      DocID024293 Rev 1 23/31


    2. DFN8 2x2 package information

      Figure 29. DFN8 2x2 package mechanical drawing


      $

      '


      %



      0.10 & 2[

      (

      3,1 1 ,1'(; $5($




      0.10

      &

      2[


      &

      723 9,(:

      0.10




      0.08

      &


      3,1 1 ,1'(; $5($

      1


      $

      6,'( 9,(:


      H

      &


      $1

      6($7,1* 3/$1(


      E (8 SOFV)

      %

      $

      &

      0.10

      4



      3LQ#1 ,'



      /

      8 5

      %27720 9,(:

      *$062202131635&%


      Table 9. DFN8 2x2 package mechanical data


      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A

      0.70

      0.75

      0.80

      0.028

      0.030

      0.031

      A1

      0.00

      0.02

      0.05

      0.000

      0.001

      0.002

      b

      0.15

      0.20

      0.25

      0.006

      0.008

      0.010

      D


      2.00



      0.079


      E


      2.00



      0.079


      e


      0.50



      0.020


      L

      0.045

      0.55

      0.65

      0.018

      0.022

      0.026

      N

      8

      8


      24/31 DocID024293 Rev 1


    3. MiniSO-8 package information

      Figure 30. MiniSO-8 package mechanical drawing


      Table 10. MiniSO-8 package mechanical data


      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A



      1.1



      0.043

      A1

      0


      0.15

      0


      0.006

      A2

      0.75

      0.85

      0.95

      0.030

      0.033

      0.037

      b

      0.22


      0.40

      0.009


      0.016

      c

      0.08


      0.23

      0.003


      0.009

      D

      2.80

      3.00

      3.20

      0.11

      0.118

      0.126

      E

      4.65

      4.90

      5.15

      0.183

      0.193

      0.203

      E1

      2.80

      3.00

      3.10

      0.11

      0.118

      0.122

      e


      0.65



      0.026


      L

      0.40

      0.60

      0.80

      0.016

      0.024

      0.031

      L1


      0.95



      0.037


      L2


      0.25



      0.010


      k

      0 °


      8 °

      0 °


      8 °

      ccc



      0.10



      0.004


      DocID024293 Rev 1 25/31


    4. QFN16 3x3 package information

      $

      $

      DDD

      & 2[

      $1

      (

      Figure 31. QFN16 3x3 package mechanical drawing


      '


      %

      ,1'(; $5($

      ('/2[(/2)


      DDD & 2[


      723 9,(:



      FFF &

      &


      6($7,1*

      3/$1(


      HHH &

      6,'( 9,(:


      H

      / E

      5 8

      EEE & $ %

      EEE &


      4

      9



      1

      12


      3LQ#1 ,'

      50.11

      16

      13


      *$062502131051&%



      %27720 9,(:

      26/31 DocID024293 Rev 1


      Table 11. QFN16 3x3 package mechanical data


      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A

      0.50


      0.65

      0.020


      0.026

      A1

      0


      0.05

      0


      0.002

      b

      0.18

      0.25

      0.30

      0.007

      0.010

      0.012

      D


      3.00



      0.118


      E


      3.00



      0.118


      e


      0.50



      0.020


      L

      0.30


      0.50

      0.012


      0.020

      aaa



      0.15



      0.006

      bbb



      0.10



      0.004

      ccc



      0.10



      0.004

      ddd



      0.05



      0.002

      eee



      0.08



      0.003


      DocID024293 Rev 1 27/31


    5. TSSOP14 package information

      Figure 32. TSSOP14 package mechanical drawing






      Table 12. TSSOP14 package mechanical data


      Ref.

      Dimensions

      Millimeters

      Inches

      Min.

      Typ.

      Max.

      Min.

      Typ.

      Max.

      A



      1.20



      0.047

      A1

      0.05


      0.15

      0.002

      0.004

      0.006

      A2

      0.80

      1.00

      1.05

      0.031

      0.039

      0.041

      b

      0.19


      0.30

      0.007


      0.012

      c

      0.09


      0.20

      0.004


      0.0089

      D

      4.90

      5.00

      5.10

      0.193

      0.197

      0.201

      E

      6.20

      6.40

      6.60

      0.244

      0.252

      0.260

      E1

      4.30

      4.40

      4.50

      0.169

      0.173

      0.176

      e


      0.65



      0.0256


      L

      0.45

      0.60

      0.75

      0.018

      0.024

      0.030

      L1


      1.00



      0.039


      k

      0 °


      8 °

      0 °


      8 °

      aaa



      0.10



      0.004


      28/31 DocID024293 Rev 1


  2. Ordering information


    Table 13. Order codes

    Order code

    Temperature range

    No. of channels


    Package


    Packing


    Marking

    TSX631ILT


    -40 to 125 °C

    1

    SOT23-5


    Tape and reel

    K27

    TSX632IQ2T

    2

    DFN8 2x2

    K27

    TSX632IST

    2

    MiniSO8

    K27

    TSX634IQ4T

    4

    QFN16 3x3

    K27

    TSX634IPT

    4

    TSSOP14

    TSX634I

    TSX631IYLT

    -40 to 125 °C

    Automotive grade(1)

    1

    SOT23-5

    K188

    TSX632IYST

    2

    MiniSO8

    K188

    TSX634IYPT

    4

    TSSOP14

    TSX634IY

    TSX631AILT


    -40 to 125 °C

    1

    SOT23-5

    K189

    TSX632AIST

    2

    MiniSO8

    K189

    TSX634AIPT

    4

    TSSOP14

    TSX634AI

    TSX631AIYLT

    -40 to 125°C

    Automotive grade(1)

    1

    SOT23-5

    K190

    TSX632AIYST

    2

    MiniSO8

    K190

    TSX634AIYPT

    4

    TSSOP14

    TSX634AIY

    1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going.


    DocID024293 Rev 1 29/31


  3. Revision history


Table 14. Document revision history

Date

Revision

Changes

26-Mar-2013

1

Initial release


30/31 DocID024293 Rev 1


Please Read Carefully:


Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.

All ST products are sold pursuant to ST’s terms and conditions of sale.

Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.


UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

ST PRODUCTS ARE NOT AUTHORIZED FOR USE IN WEAPONS. NOR ARE ST PRODUCTS DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com


DocID024293 Rev 1 31/31

Mouser Electronics


Authorized Distributor


Click to View Pricing, Inventory, Delivery & Lifecycle Information:


STMicroelectronics:

TSX631AILT TSX631ILT TSX634IPT TSX634AIPT TSX631AIYLT TSX632AIST TSX634IQ4T TSX631IYLT TSX632IQ2T TSX632IST TSX632AIYST TSX634IYPT TSX632IYST TSX634AIYPT