250A, 3MHz, 200V/s

Operational Amplifier

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FEATURES DESCRIPTIO


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TYPICAL APPLICATIO

The LT®1351 is a low power, high speed, high slew rate operational amplifier with outstanding AC and DC perfor- mance. The LT1351 features lower supply current, lower input offset voltage, lower input bias current and higher DC gain than devices with comparable bandwidth. The circuit combines the slewing performance of a current feedback amplifier in a true operational amplifier with matched high impedance inputs. The high slew rate en- sures that the large-signal bandwidth is not degraded. The amplifier is a single gain stage with outstanding settling characteristics which make the circuit an ideal choice for data acquisition systems. The output drives a 1k load to

13Vwith 15Vsuppliesanda 500loadto 3.4Von 5V

supplies. The amplifier is also stable with any capacitive load which makes it useful in buffer or cable driver applications.

The LT1351 is a member of a family of fast, high perfor- mance amplifiers using this unique topology and employ- ing Linear Technology Corporation’s advanced complementary bipolar processing. For dual and quad amplifier versions of the LT1351 see the LT1352/LT1353 data sheet. For higher bandwidth devices with higher supply current see the LT1354 through LT1365 data sheets. Singles, duals and quads of each amplifier are available.

, LTC and LT are registered trademarks of Linear Technology Corporation.

C-Load is a trademark of Linear Technology Corporation.

Instrumentation Amplifier Large-Signal Response


R1

50k

R2 R5

5k 1.1k

R4

50k


R3

5k

LT1351

– +

VIN

+

LT1351

+

VOUT

GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102 TRIM R5 FOR GAIN

TRIM R1 FOR COMMON MODE REJECTION BW = 30kHz


1351 TA01 AV = –1 1351 TA02


U

W W

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ABSOLUTE AXI U RATINGS

Total Supply Voltage (V+ to V ) .............................. 36V

Differential Input Voltage (Transient Only, Note 1) ... 10V Input Voltage .......................................................... VS

Output Short-Circuit Duration (Note 2) ........... Indefinite

Operating Temperature Range ................ – 40C to 85C


Specified Temperature Range (Note 6) .....– 40C to 85C Maximum Junction Temperature (See Below)

Plastic Package ................................................ 150C

Storage Temperature Range ................. – 65C to 150C

Lead Temperature (Soldering, 10 sec) .................. 300C


U

W

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PACKAGE/ORDER I FOR ATIO



TOP VIEW

NULL 1 8 NULL

–IN 2 7 V+

+IN 3 6 VOUT

V4 5 SHDN

MS8 PACKAGE

8-LEAD PLASTIC MSOP


TJMAX = 150C, JA = 250C/ W

ORDER PART NUMBER


TOP VIEW


NULL 1 8 NULL

– IN 2 7 V+

+IN 3 6 VOUT

V4 5 SHDN

N8 PACKAGE S8 PACKAGE

8-LEAD PDIP 8-LEAD PLASTIC SO

TJMAX = 150C, JA = 130C/ W (N8) TJMAX = 150C, JA = 190C/ W (S)

ORDER PART NUMBER

LT1351CMS8

LT1351CN8 LT1351CS8

MS8 PART MARKING

S8 PART MARKING

LTBT

1351

Consult factory for Industrial and Military grade parts.


ELECTRICAL CHARACTERISTICS TA = 25C, VCM = 0V unless otherwise noted.


SYMBOL

PARAMETER

CONDITIONS

VSUPPLY

MIN

TYP

MAX

UNITS

VOS

Input Offset Voltage


15V

5V


0.2

0.2

0.6

0.6

mV mV



2.5V


0.3

0.8

mV

IOS

Input Offset Current


2.5V to 15V


5

15

nA

IB

Input Bias Current


2.5V to 15V


20

50

nA

en

Input Noise Voltage

f = 10kHz

2.5V to 15V

14

nV/Hz

in

Input Noise Current

f = 10kHz

2.5V to 15V

0.5

pA/Hz

RIN

Input Resistance

VCM = 12V

Differential

15V

15V

300

600

20


M M

CIN

Input Capacitance


15V

3

pF


Positive Input Voltage Range


15V

12.0

13.5


V


5V

2.5

3.5


V


2.5V

0.5

1.0


V

Negative Input Voltage Range


15V


– 13.5

– 12.0

V


5V


– 3.5

– 2.5

V


2.5V


– 1.0

– 0.5

V

CMRR

Common Mode Rejection Ratio

VCM = 12V VCM = 2.5V

VCM = 0.5V

15V

5V

2.5V

80

78

68

94

86

77


dB dB dB

PSRR

Power Supply Rejection Ratio

VS = 2.5V to 15V


90

106


dB


ELECTRICAL CHARACTERISTICS TA = 25C, VCM = 0V unless otherwise noted.


SYMBOL

PARAMETER

CONDITIONS

VSUPPLY

MIN

TYP MAX

UNITS

AVOL

Large-Signal Voltage Gain

VOUT = 12V, RL = 5k VOUT = 10V, RL = 2k VOUT = 10V, RL = 1k VOUT = 2.5V, RL = 5k VOUT = 2 .5V, RL = 2k VOUT = 2.5V, RL = 1k

VOUT = 1V, RL = 5k

15V

15V

15V

5V

5V

5V

2.5V

40

30

20

30

25

15

20

80

60

40

60

50

30

40

V/mV V/mV V/mV V/mV V/mV V/mV V/mV

VOUT

Output Swing

RL = 5k, VIN = 10mV RL = 2k, VIN = 10mV RL = 1k, VIN = 10mV RL = 1k, VIN = 10mV RL= 500, VIN = 10mV

RL = 5k, VIN = 10mV

15V

15V

15V

5V

5V

2.5V

13.5

13.4

13.0

3.5

3.4

1.3

14.0

13.8

13.4

4.0

3.8

1.7

V

V

V

V

V

V

IOUT

Output Current

VOUT = 13V VOUT = 3.4V

15V

5V

13.0

6.8

13.4

7.6

mA mA

ISC

Short-Circuit Current

VOUT = 0V, VIN = 3V

15V

30

45

mA

SR

Slew Rate

AV = – 1, RL = 5k (Note 3)

15V

5V

120

30

200

50

V/s V/s


Full-Power Bandwidth

10V Peak (Note 4) 3V Peak (Note 4)

15V

5V

3.2

2.6

MHz MHz

GBW

Gain Bandwidth

f = 200kHz, RL = 10k

15V

5V

2.5V

2.0

1.8

3.0

2.7

2.5

MHz MHz MHz

tr, tf

Rise Time, Fall Time

AV = 1, 10% to 90%, 0.1V

15V

5V

46

53

ns ns


Overshoot

AV = 1, 0.1V

15V

5V

13

16

%

%


Propagation Delay

50% VIN to 50% VOUT, 0.1V

15V

5V

41

52

ns ns

ts

Settling Time

10V Step, 0.1%, AV = – 1

10V Step, 0.01%, AV = – 1

5V Step, 0.1%, AV = – 1

5V Step, 0.01%, AV = – 1

15V

15V

5V

5V

700

1250

950

1400

ns ns ns ns

RO

Output Resistance

AV = 1, f = 20kHz

15V

1.5

ISHDN

Shutdown Input Current

SHDN = VEE + 0.1V SHDN = VCC

15V

15V

– 10

0.1 2

A

A

IS

Supply Current


SHDN = VEE + 0.1V

15V

5V

5V

250 330

220 300

10

A

A

A

0C TA 70C, VCM = 0V unless otherwise noted.


SYMBOL

PARAMETER

CONDITIONS

VSUPPLY

MIN TYP MAX

UNITS

VOS

Input Offset Voltage


15V

5V

2.5V

0.8

0.8

1.0

mV mV mV


Input VOS Drift

(Note 5)

2.5V to 15V

3 8

V/C

IOS

Input Offset Current


2.5V to 15V

20

nA

IB

Input Bias Current


2.5V to 15V

75

nA


ELECTRICAL CHARACTERISTICS

0C TA 70C, VCM = 0V unless otherwise noted.


SYMBOL

PARAMETER

CONDITIONS

VSUPPLY

MIN

TYP

MAX

UNITS

CMRR

Common Mode Rejection Ratio

VCM = 12V VCM = 2.5V VCM = 0.5V

15V

5V

2.5V

78

77

67

dB dB dB

PSRR

Power Supply Rejection Ratio

VS = 2.5V to 15V


89

dB

AVOL

Large-Signal Voltage Gain

VOUT = 12V, RL = 5k VOUT = 10V, RL = 2k

15V

15V

5V

5V

5V

2.5V

25

20

20

15

10

15

V/mV V/mV V/mV V/mV V/mV V/mV



VOUT = 2.5V, RL = 5k



VOUT = 2 .5V, RL = 2k



VOUT = 2.5V, RL = 1k



VOUT = 1V, RL = 5k

VOUT

Output Swing

RL = 5k, VIN = 10mV RL = 2k, VIN = 10mV

15V

15V

15V

5V

5V

2.5V

13.4

13.3

12.0

3.4

3.3

1.2

V

V

V

V

V

V



RL = 1k, VIN = 10mV



RL = 1k, VIN = 10mV



RL= 500, VIN = 10mV



RL = 5k, VIN = 10mV

IOUT

Output Current

VOUT = 12V VOUT = 3.3V

15V

5V

12.0

6.6

mA mA

ISC

Short-Circuit Current

VOUT = 0V, VIN = 3V

15V

24

mA

SR

Slew Rate

AV = – 1, RL = 5k (Note 3)

15V

100

V/s



5V

21

V/s

GBW

Gain Bandwidth

f = 200kHz, RL = 10k

15V

1.8

MHz



5V

1.6

MHz

ISHDN

Shutdown Input Current

SHDN = VEE + 0.1V SHDN = VCC

15V

15V


– 20


3

A

A

IS

Supply Current


15V

5V



380

355

A

A



SHDN = VEE + 0.1V

5V


20


A


– 40C TA 85C, VCM = 0V unless otherwise noted (Note 6).


SYMBOL

PARAMETER

CONDITIONS

VSUPPLY

MI

N TYP

MAX

UNITS

VOS

Input Offset Voltage


15V

5V

1.0

1.0

mV mV



2.5V

1.2

mV


Input VOS Drift

(Note 5)

2.5V to 15V


3

8

V/C

IOS

Input Offset Current


2.5V to 15V

30

nA

IB

Input Bias Current


2.5V to 15V

100

nA

CMRR

Common Mode Rejection Ratio

VCM = 12V

15V

5V

2.5V

76

76

66

dB dB dB



VCM = 2.5V



VCM = 0.5V

PSRR

Power Supply Rejection Ratio

VS = 2.5V to 15V


87

dB

AVOL

Large-Signal Voltage Gain

VOUT = 12V, RL = 5k VOUT = 10V, RL = 2k

15V

15V

5V

5V

5V

2.5V

20

15

15

10

8

10

V/mV V/mV V/mV V/mV V/mV V/mV



VOUT = 2.5V, RL = 5k



VOUT = 2 .5V, RL = 2k



VOUT = 2.5V, RL = 1k



VOUT = 1V, RL = 5k


ELECTRICAL CHARACTERISTICS – 40C TA 85C, VCM = 0V unless otherwise noted (Note 6).


SYMBOL

PARAMETER

CONDITIONS

VSUPPLY

MIN

TYP

MAX

UNITS

VOUT

Output Swing

RL = 5k, VIN = 10mV RL = 2k, VIN = 10mV

15V

15V

15V

5V

5V

2.5V

13.3

13.2

10.0

3.3

3.2

1.1

V

V

V

V

V

V



RL = 1k, VIN = 10mV



RL = 1k, VIN = 10mV



RL= 500, VIN = 10mV



RL = 5k, VIN = 10mV

IOUT

Output Current

VOUT = 10V VOUT = 3.2V

15V

5V

10.0

6.4

mA mA

ISC

Short-Circuit Current

VOUT = 0V, VIN = 3V

15V

20

mA

SR

Slew Rate

AV = – 1, RL = 5k (Note 3)

15V

50

V/s



5V

15

V/s

GBW

Gain Bandwidth

f = 200kHz, RL = 10k

15V

1.6

MHz



5V

1.4

MHz

ISHDN

Shutdown Input Current

SHDN = VEE + 0.1V SHDN = VCC

15V

15V


– 30


5

A

A

IS

Supply Current


15V

5V



390

380

A

A



SHDN = VEE + 0.1V

5V


30


A


Note 1: Differential inputs of 10V are appropriate for transient operation only, such as during slewing. Large, sustained differential inputs will cause excessive power dissipation and may damage the part. See Input Considerations in the Applications Information section of this data sheet for more details.

Note 2: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely.

Note 3: Slew rate is measured between 8V on the output with 12V input for 15V supplies and 2V on the output with 3V input for 5V supplies.

Note 4: Full-power bandwidth is calculated from the slew rate measurement: FPBW = (Slew Rate)/2VP.

Note 5: This parameter is not 100% tested.

Note 6: The LT1351 is designed, characterized and expected to meet these extended temperature limits, but is not tested at – 40C and at 85C. Guaranteed I grade parts are available; consult factory.


U W

TYPICAL PERFOR A CE CHARACTERISTICS



350


125C

300

Supply Current vs Supply Voltage and Temperature


V+

–0.5

COMMON MODE RANGE (V)

–1.0

Input Common Mode Range vs Supply Voltage

Input Bias Current

vs Input Common Mode Voltage

30

TA = 25C VS = 15V

INPUT BIAS CURRENT (nA)

20 I + + I


SUPPLY CURRENT (A)

250


–1.5

–2.0

IB =


10

B B

2


–55C

25C

200


150


100

0


5 10 15 20

2.0

TA = 25C




VOS = 1mV



































1.5

1.0

0.5

V

0


5 10 15 20

0


–10


–20

–15


–10 –5 0 5


10 15

SUPPLY VOLTAGE (V)


1351 G01

SUPPLY VOLTAGE (V)


1351 G02

INPUT COMMON MODE VOLTAGE (V)

1351 G03


U W

TYPICAL PERFOR A CE CHARACTERISTICS


Input Bias Current vs Temperature

VS = 15V






IB =

I + + I B B

2




























































40

36

INPUT BIAS CURRENT (nA)

32

28

24

20

16

12

8

4

0


100


INPUT VOLTAGE NOISE (nV/Hz)

10


1

Input Noise Spectral Density


TA = 25C VS = 15V AV = 101 RS = 100k


en


in


10


1


0.1


110


INPUT CURRENT NOISE (pA/Hz)

OPEN-LOOP GAIN (dB)

100


90


80


70


60

Open-Loop Gain vs Resistive Load

TA = 25C


VS = 15V

VS = 5V

–50

–25 0

25 50 75

100 125

1 10 100

1k 10k

10 100 1k 10k

TEMPERATURE (C)


1351 G04

FREQUENCY (Hz)


Output Voltage Swing


1351 G05

LOAD RESISTANCE ()


Output Voltage Swing


1351 G06


100

Open-Loop Gain vs Temperature

vs Supply Voltage

V+


V+

– 0.5

vs Load Current

VS = 5V


85C

OUTPUT VOLTAGE SWING (V)

VS = 15V VO = 12V RL = 5k









































99 –1

OPEN-LOOP GAIN (dB)

98 –2

–3

97

3


TA = 25C VIN = 10mV


RL = 1k



RL = 2k

–1.0

OUTPUT VOLTAGE SWING (V)

–1.5

–2.0


2.0

VIN = 10mV


25C

85C

25C


–40C


25C


–40C 85C

96


95


94

–50


–25 0


25 50


75 100 125

2


1


V

0 5 10

RL = 1k RL = 2k

15 20

1.5 –40C

1.0

0.5

V

–20 –15


–10


–40C

25C

85C


– 5 0 5


10 15 20

TEMPERATURE (C)


Output Short-Circuit Current vs Temperature

OUTPUT SHORT-CIRCUIT CURRENT (mA)

VS = 15V
















SINK






SOURCE

























60


55


50


45


40


35


30


25


1351 G07


10

8

6

OUTPUT STEP (V)

4

2

0

–2

–4

–6

–8

–10

SUPPLY VOLTAGE (V)






















10mV



1mV






























1

0mV

1mV



VS = 15V AV = 1 OUTPUT FILTER: 1.6MHz LPF






















Settling Time vs Output Step (Noninverting)


1351 G08


10

8

6

OUTPUT STEP (V)

4

2

0

–2

–4

–6

–8

–10

OUTPUT CURRENT (mA)


































10mV



1mV
























10mV





1mV


VS = 15V AV = –1

RG = RF = 2k CF = 5pF

RL = 2k






















Settling Time vs Output Step (Inverting)


1351 G09

–50

–25 0

25 50

75 100 125

0.7 0.8

0.9 1

1.1 1.2

1.3 1.4 1.5

1.6

0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5

TEMPERATURE (C)


1351 G10

SETTLING TIME (s)


1351 G11

SETTLING TIME (s)


1351 G12


U W

TYPICAL PERFOR A CE CHARACTERISTICS



Gain and Phase vs Frequency

70

TA = 25C


120


1000


Output Impedance vs Frequency

TA = 25C

Frequency Response vs Capacitive Load

10

OUTPUT IMPEDANCE ()

8 TA = 25C

60 PHASE

50

VS = 15V

AV = –1

RF = RG = 5k

PHASE (DEG)

VS = 15V

100


80


100

VS = 15V

AV = 100

AV = 10 AV = 1

VS = 15V

6 AV = –1

4 RFB = RG = 5k C = 500pF

C = 100pF


C = 5000pF

C = 1000pF

GAIN (dB)

40


30


20


10


0


–10

VS = 5V VS = 5V GAIN

60


40


20


0


–20


–40

10


1


0.1


0.01

2

GAIN (dB)

0

–2

–4

–6

–8

–10


C = 10pF

1k 10k 100k 1M FREQUENCY (Hz)

10M

100M


1351 G13

1k 10k

100k 1M 10M FREQUENCY (Hz)

1351 G14

10k

100k 1M 10M FREQUENCY (Hz)

1351 G15



4.50

4.25

GAIN BANDWIDTH (MHz)

4.00

3.75

3.50

3.25

3.00

2.75

Gain Bandwidth and Phase Margin vs Temperature

50

VS = 15V 48

VS = 5V 46

PHASE MARGIN (DEG)

PHASE MARGIN 44

42

GAIN BANDWIDTH 40

38

VS = 15V 36

Frequency Response

vs Supply Voltage (AV = 1)

5

TA = 25C

4 AV = 1

3 RL = 5k

2

GAIN (dB)

1

0

–1

–2 15V

Frequency Response

vs Supply Voltage (AV = – 1)

5

TA = 25C

4 AV = –1

3 RL = RG = 5k

2

GAIN (dB)

1

0

–1

–2

2.50

2.25

2.00

VS = 5V

34 –3

32 –4

30 –5

5V

2.5V 3

–4

–5

15V

5V

2.5V

–50

–25 0

25 50 75

100 125

10k

100k 1M 10M

10k

100k 1M 10M

TEMPERATURE (C)


1351 G16

FREQUENCY (Hz)


1351 G17

FREQUENCY (Hz)


1351 G18


4.50

4.25

GAIN BANDWIDTH (MHz)

4.00

3.75

3.50

3.25

3.00

2.75

2.50

2.25

2.00

Gain Bandwidth and Phase Margin vs Supply Voltage

TA = 25C








PHASE MARGIN



















GAIN BANDWIDTH









50

48

46

44

42

40

38

36

34

32

30


120


POWER SUPPLY REJECTION RATIO (dB)

100


PHASE MARGIN (DEG)

80


60


40


20


0






TA = 25C VS = 15V









– PSRR = +PSRR




















Power Supply Rejection Ratio vs Frequency


COMMON MODE REJECTION RATIO (dB)

120


100


80


60


40


20


0


Common Mode Rejection Ratio vs Frequency


TA = 25C VS = 15V

0 5 10 15 20

10 100 1k 10k 100k

1M 10M

100

1k 10k 100k 1M

10M

SUPPLY VOLTAGE (V)

FREQUENCY (Hz)

FREQUENCY (Hz)


1351 G19


1351 G20


1351 G21


U W

TYPICAL PERFOR A CE CHARACTERISTICS



200

Slew Rate vs Supply Voltage

TA = 25C


250

Slew Rate vs Temperature Slew Rate vs Input Level

TA = 25C VS = 15V AV = –1

RFB = RG = 5k

SR = (SR+ + SR)/2











































200

AV = –1


SLEW RATE (V/s)

150


100


50


0

AV = –1

RF = RG = 5k

SR = (SR+ + SR)/2


200


SLEW RATE (V/s)

150


100


50


0


VS = 15V


VS = 5V

RF = RG = RL = 5k SR = (SR+ + SR)/2

175


SLEW RATE (V/s)

150


125


100


75


50


25


0

0 5 10 15

–50 –25 0

25 50 75

100 125

0 4 8

12 16

20 24

SUPPLY VOLTAGE (V)


Total Harmonic Distortion vs Frequency

1

TOTAL HARMONIC DISTORTION (%)

TA = 25C VS = 15V


1351 G22

TEMPERATURE (C)


Undistorted Output Swing vs Frequency (15V)

30


1351 G23


AV = –1

INPUT LEVEL (VP-P)


Undistorted Output Swing vs Frequency (5V)

10

9


1351 G24


0.1


0.01


0.001

RL = 5k

VO = 2VP-P


AV = –1


AV = 1

25


OUTPUT VOLTAGE (VP-P)

20


15


10


5 VS = 15V RL = 5k THD = 1%

0

AV = 1

8

AV = 1

OUTPUT VOLTAGE (VP-P)

7

AV = –1

6

5

4

3

2 VS = 5V

1 RL = 5k THD = 1%

0

10 100 1k 10k 100k FREQUENCY (Hz)

1351 G25

10k

100k 1M

FREQUENCY (Hz)

1351 G26

10k

100k 1M

FREQUENCY (Hz)

1351 G27


–30

2nd and 3rd Harmonic Distortion vs Frequency


100

Shutdown Supply Current

vs Temperature Capacitive Load Handling

TA = 25C VS = 15V

RL = 5k












































AV = 1














































AV = –1


















































100


HARMONIC DISTORTION (dB)

–40


–50


–60


–70


–80


VS = 15V AV = 1

RL = 5k

VO = 2VP-P



















3RD HARMONIC























2ND HARMONIC










–90

90 VS = 15V 90

SUPPLY CURRENT (A)

80 80

VSHDN = VEE + 0.2

OVERSHOOT (%)

70 70

60 60

1

50 VSHDN = VEE + 0. 50

40 40

30 30

EE

20 VSHDN = V 20

10 10

0 0

100k

1M 50

–25 0

25 50 75

100 125

10p

100p 1n 10n 0.1 1

FREQUENCY (Hz)

1351 G28

TEMPERATURE (C)

1351 G29

CAPACITIVE LOAD (F)

1351 G30


U

W

TYPICAL PERFOR A CE CHARACTERISTICS


Small-Signal Transient (AV = 1)

Small-Signal Transient (AV = – 1)

Small-Signal Transient (AV = – 1, CL = 1000pF)



1351 G31


1351 G32


1351 G33


Large-Signal Transient (AV = 1)

Large-Signal Transient (AV = – 1)

Large-Signal Transient (AV = 1, CL = 10,000pF)



1351 G34


1351 G35


1351 G36


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APPLICATIO S I FOR ATIO

The LT1351 may be inserted directly into many high speed amplifier applications improving both DC and AC performance, provided that the nulling circuitry is re- moved. The suggested nulling circuit for the LT1351 is shown in Figure 1.

V+


0.1F


Layout and Passive Components

The LT1351 amplifier is easy to apply and tolerant of less than ideal layouts. For maximum performance (for ex- ample fast settling time) use a ground plane, short lead lengths and RF-quality bypass capacitors (0.01F to 0.1F). For high drive current applications use low ESR bypass capacitors (1F to 10F tantalum). For details see Design Note 50.

3 +


2


LT1351

7 6

4

The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with

8

1

100k

V


0.1F


1351 F01

the input capacitance to form a pole which can cause peaking or even oscillations. For feedback resistors greater than 10k, a parallel capacitor of value, CF > (RG)(CIN/RF) should be used to cancel the input pole and optimize

Figure 1. Offset Nulling

dynamic performance. For applications where the DC


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APPLICATIO S I FOR ATIO

noise gain is one and a large feedback resistor is used, CF should be greater than or equal to CIN. An example would bean I-to-V converter asshowninthe Typical Applications section.

Capacitive Loading

The LT1351 is stable with any capacitive load. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response. Graphs of Fre- quency Response vs Capacitive Load, Capacitive Load Handling and the transient response photos clearly show these effects.

Input Considerations

Each of the LT1351 inputs is the base of an NPN and a PNP transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. Because of variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current does not depend on NPN/PNP beta matching and is well controlled. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized.

The inputs can withstand transient differential input volt- ages up to 10V without damage and need no clamping or source resistance for protection. Differential inputs, how- ever, generate large supply currents (tens of mA) as required for high slew rates. If the device is used with sustained differential inputs, the average supply current will increase, excessive power dissipation will result and the part may be damaged. The part should not be used as a comparator, peak detector or other open-loop applica- tion with large, sustained differential inputs. Under normal, closed-loop operation, an increase of power dissipation is only noticeable in applications with large slewing outputs and is proportional to the magnitude of the differential input voltage and the percent of the time that the inputs are apart. Measure the average supply current for the application in order to calculate the power dissipation.


Shutdown

The LT1351 has a Shutdown pin for conserving power. When this pin is open or 2V above the negative supply the part operates normally. When pulled down to Vthe supply current will drop to about 10A. The current out of the Shutdown pin is also typically 10A. In shutdown the

amplifier output is not isolated from the inputs so the LT1351 cannot be used in multiplexing applications using the shutdown feature.

A level shift application is shown in the Typical Applica- tions section so that a ground-referenced logic signal can control the Shutdown pin.

Circuit Operation

The LT1351 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic.

The inputs are buffered by complementary NPN and PNP emitter followers which drive R1, a 1k resistor. The input voltage appears across the resistor generating currents which are mirrored into the high impedance node and

compensation capacitor CT. Complementary followers form an output stage which buffers the gain node from the load. The output devices Q19 and Q22 are connected to form a composite PNP and composite NPN.

The bandwidth is set by the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current available to charge the capacitance. This current is the differential input voltage divided by R1, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 10V output step in a gain of 10 has only a 1V input step whereas the same outputstepinunitygainhasa 10 times greater input step. The curve of Slew Rate vs Input Level illustrates this relationship.

Capacitive load compensation is provided by the RC, CC network which is bootstrapped across the output stage. When the amplifier is driving a light load the network has no effect. When driving a capacitive load (or a low value


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APPLICATIO S I FOR ATIO

resistive load) the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance slows down the amplifier and a zero is created by the RC combination, both of


which improve the phase margin. The design ensures that even for very large load capacitances the total phase lag can never exceed 180 degrees (zero phase margin) and the amplifier remains stable.


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SI PLIFIED SCHE ATIC


V+


Q10


Q11


Q12


R2


C1 Q20


R3 Q21


Q7 R1


Q9

Q3


Q17

R6

Q19


CC


–IN


V

Q5 Q6

1k


Q8 Q4

Q2 Q1


Q14


+IN


Q13

CT


Q15

RC


Q18

R7


Q16


C2


Q23


Q22


R4


Q24 R5


OUTPUT


1351 SS


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TYPICAL APPLICATIO S


20kHz, 4th Order Butterworth Filter



VIN


4.64k


13.3k

4.64k


470pF



5.49k


11.3k


5.49k

220pF


2200pF

LT1351

+


4700pF

LT1351

+


VOUT



1351 TA03


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TYPICAL APPLICATIO S



Shutdown Circuit


3 +

LT1351 6


SHDN


1N4148


1M G

2

S SST177

D G


1M


5


S SST177 D


V 1351 TA04


DAC I-to-V Converter



12

DAC

INPUTS


5k


565A TYPE

10pF


LT1351

+


VOUT

A

VOS + IOS (5k) + VOUT < 0.5LSB 5k

VOL


1351 TA05



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MS8 Package

8-Lead Plastic MSOP

(LTC DWG # 05-08-1660)



0.118 0.004*


8 7 6 5

(3.00 0.102)


0.192 0.004

(4.88 0.10)

0.118 0.004**

(3.00 0.102)


1 2 3 4



0.007

(0.18)


0 – 6 TYP


SEATING

0.040 0.006

(1.02 0.15)

0.034 0.004

(0.86 0.102)

0.021 0.006

PLANE

0.012

0.006 0.004

(0.53 0.015)

(0.30) REF

0.0256

(0.65) TYP

(0.15 0.102)

MSOP (MS8) 1197


* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE


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PACKAGE DESCRIPTIO


Dimensions in inches (millimeters) unless otherwise noted.


N8 Package

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)





55 0.015*

77 0.381)

(10.160) MAX


8


7


6


5












1


2


3


4


0.2

(6.4

0.400*



0.300 – 0.325

(7.620 – 8.255)


0.045 – 0.065

(1.143 – 1.651)


0.130 0.005

(3.302 0.127)



0.009 – 0.015

(0.229 – 0.381)

0.325 +0.035

–0.381

8.255 +0.889


0.065

(1.651) TYP


–0.015

0.100 0.010

(2.540 0.254)


0.125

(3.175) MIN

0.018 0.003

(0.457 0.076)


0.020

(0.508) MIN


N8 1197

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)


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S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)



0.189 – 0.197*

(4.801 – 5.004)

8 7 6 5


0.228 – 0.244

(5.791 – 6.197)

0.150 – 0.157**

(3.810 – 3.988)


1 2 3 4


0.010 – 0.020 45

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)


0– 8 TYP


0.053 – 0.069

(1.346 – 1.752)


0.004 – 0.010

(0.101 – 0.254)


0.016 – 0.050

0.406 – 1.270


0.014 – 0.019

(0.355 – 0.483)


0.050

(1.270) TYP

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE


SO8 0996


15

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits asdescribedherein will not infringe on existing patent rights.


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TYPICAL APPLICATIO


Low Power Sample-and-Hold



VIN


LT1351


LTC201 LT1351


2000pF


VOUT


DROOP: 20nA/2000pF = 10mV/ms ACQUISITION TIME: 10V, 0.1% = 2s

CHARGE INJECTION ERROR: 8pC/2000pF = 4mV


1351 TA06


RELATED PARTS


PART NUMBER

DESCRIPTION

COMMENTS

LT1352/LT1353

Dual/Quad 250A, 3MHz, 200V/s Op Amp

Good DC Precision, Stable with All Capacitive Loads

LT1354

1mA, 12MHz, 400V/s Op Amp

Good DC Precision, Stable with All Capacitive Loads


16

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408)432-1900FAX:(408) 434-0507 www.linear-tech.com


1351fa LT/TP 0498 REV A 2K • PRINTED IN USA


LINEAR TECHNOLOGY CORPORATION 1996

Mouser Electronics


Authorized Distributor


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