DATASHEET
ISL55002
High Supply Voltage 200MHz Unity-Gain Stable Operational Amplifier
FN7497 Rev 4.00
July 27, 2006
The ISL55002 is a high speed, low power, low cost monolithic operational amplifier. The ISL55002 is unity-gain stable and features a 300V/µs slew rate and 200MHz bandwidth while requiring only 8.5mA of supply current per amplifier.
The power supply operating range of the ISL55002 is from
±15V down to ±2.5V. For single-supply operation, the ISL55002 operates from 30V down to 5V.
The ISL55002 also features an extremely wide output voltage swing of -12.75V/+13.4V with VS = ±15V and RL = 1k.
At a gain of +1, the ISL55002 has a -3dB bandwidth of 200MHz with a phase margin of 55°. Because of its conventional voltage-feedback topology, the ISL55002 allow the use of reactive or non-linear elements in its feedback network. This versatility combined with low cost and 140mA of output-current drive makes the ISL55002 an ideal choice for price-sensitive applications requiring low power and high speed.
The ISL55002 is available in an 8 Ld SO package and is specified for operation over the full -40°C to +85°C temperature range.
200MHz -3dB bandwidth
Unity-gain stable
Low supply current: 8.5mA per amplifier
Wide supply range: ±2.5V to ±15V dual-supply and 5V to 30V single-supply
High slew rate: 300V/µs
Fast settling: 75ns to 0.1% for a 10V step
Wide output voltage swing: -12.75V/+13.4V with VS = ±15V, RL = 1k
Enhanced replacement for EL2244
Pb-free plus anneal available (RoHS compliant)
Video amplifiers
Single-supply amplifiers
Active filters/integrators
High speed sample-and-hold
High speed signal processing
ADC/DAC buffers
Pulse/RF amplifiers
Pin diode receivers
Log amplifiers
Photo multiplier amplifiers
Difference amplifiers
PART NUMBER | PART MARKING | TAPE & REEL | PACKAGE | PKG. DWG. # |
ISL55002IB | 55002IB | - | 8 Ld SO | MDP0027 |
ISL55002IB-T7 | 55002IB | 7” | 8 Ld SO | MDP0027 |
ISL55002IB-T13 | 55002IB | 13” | 8 Ld SO | MDP0027 |
ISL55002IBZ (See Note) | 55002IBZ | - | 8 Ld SO (Pb-Free) | MDP0027 |
ISL55002IBZ-T7 (See Note) | 55002IBZ | 7” | 8 Ld SO (Pb-Free) | MDP0027 |
ISL55002IBZ-T13 (See Note) | 55002IBZ | 13” | 8 Ld SO (Pb-Free) | MDP0027 |
ISL55002 (8 LD SO) TOP VIEW
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
OUT 1
IN1- 2
IN1+ 3
VS- 4
8 VS+
- + 7 OUT2
+ - 6 IN2- 5 IN2+
FN7497 Rev 4.00 Page 1 of 12
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . ±16.5V or 33V
Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±VS
Differential Input Voltage (dVIN). . . . . . . . . . . . . . . . . . . . . . . . .±10V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Temperature Range (TA). . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature (TST) . . . . . . . . . . . . . . . . . . .-65°C to +150°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications VS = ±15V, AV = +1, RL = 1k, TA = 25°C, unless otherwise specified.
PARAMETER | DESCRIPTION | CONDITION | MIN | TYP | MAX | UNIT |
VOS | Input Offset Voltage | VS = ±15V | 1.2 | 5 | mV | |
TCVOS | Average Offset Voltage Drift (Note 1) | -40°C to +85°C | 17 | µV/°C | ||
IB | Input Bias Current | VS = ±15V | 0.6 | 3.5 | µA | |
IOS | Input Offset Current | VS = ±15V | 0.2 | 2 | µA | |
TCIOS | Average Offset Current Drift (Note 1) | 0.2 | nA/°C | |||
AVOL | Open-loop Gain | VS = ±15V, VOUT = ±10V, RL = 1k | 12000 | 21000 | V/V | |
PSRR | Power Supply Rejection Ratio | VS = ±5V to ±15V | 75 | 100 | dB | |
CMRR | Common-mode Rejection Ratio | VCM = ±10V, VOUT = 0V | 75 | 90 | dB | |
CMIR | Common-mode Input Range | VS = ±15V | 13 | V | ||
VOUT | Output Voltage Swing | VO+, RL = 1k | 13.25 | 13.4 | V | |
VO-, RL = 1k | -12.6 | -12.75 | V | |||
VO+, RL = 150 | 9.6 | 10.7 | V | |||
VO-, RL = 150 | -8.3 | -9.4 | V | |||
ISC | Output Short Circuit Current | 80 | 140 | mA | ||
IS | Supply Current (per amplifier) | VS = ±15V, no load | 8.5 | 9.25 | mA | |
RIN | Input Resistance | 2.0 | 3.2 | M | ||
CIN | Input Capacitance | AV = +1 | 1 | pF | ||
ROUT | Output Resistance | AV = +1 | 50 | m | ||
PSOR | Power Supply Operating Range | Dual supply | ±2.25 | ±15 | V | |
Single supply | 4.5 | 30 | V |
NOTE:
Measured from TMIN to TMAX.
AC Electrical Specifications VS = ±15V, AV = +1, RL = 1k, TA = 25°C, unless otherwise specified.
PARAMETER | DESCRIPTION | CONDITION | MIN | TYP | MAX | UNIT |
BW | -3dB Bandwidth (VOUT = 0.4VPP) | VS = ±15V, AV = +1 | 200 | MHz | ||
VS = ±15V, AV = -1 | 50 | MHz | ||||
VS = ±15V, AV = +2 | 50 | MHz | ||||
VS = ±15V, AV = +5 | 17 | MHz | ||||
GBWP | Gain Bandwidth Product | VS = ±15V | 70 | MHz | ||
PM | Phase Margin | RL = 1k, CL = 5pF | 55 | ° | ||
SR | Slew Rate (Note 1) | 260 | 300 | V/µs |
AC Electrical Specifications VS = ±15V, AV = +1, RL = 1k, TA = 25°C, unless otherwise specified. (Continued)
PARAMETER | DESCRIPTION | CONDITION | MIN | TYP | MAX | UNIT |
FPBW | Full-power Bandwidth (Note 2) | VS = ±15V | 9.5 | MHz | ||
tS | Settling to +0.1% (AV = +1) | VS = ±15V, 10V step | 75 | ns | ||
dG | Differential Gain (Note 3) | NTSC/PAL | 0.01 | % | ||
dP | Differential Phase | NTSC/PAL | 0.05 | ° | ||
eN | Input Noise Voltage | 10kHz | 12 | nV/Hz | ||
iN | Input Noise Current | 10kHz | 1.5 | pA/Hz |
NOTES:
Slew rate is measured on rising edge.
For VS = ±15V, VOUT = 10VPP, for VS = ±5V, VOUT = 5VPP. Full-power bandwidth is based on slew rate measurement using FPBW = SR/(2 * VPEAK).
Video performance measured at VS = ±15V, AV = +2 with two times normal video level across RL = 150. This corresponds to standard video levels across a back-terminated 75 load. For other values or RL, see curves.
FIGURE 1. OPEN-LOOP GAIN vs FREQUENCY FIGURE 2. OPEN-LOOP PHASE vs FREQUENCY
FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS NON- INVERTING GAIN SETTINGS
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS INVERTING GAIN SETTINGS
FIGURE 5. PHASE vs FREQUENCY FOR VARIOUS NON- INVERTING GAIN SETTINGS
FIGURE 6. PHASE vs FREQUENCY FOR VARIOUS INVERTING GAIN SETTINGS
GAIN BANDWIDTH PRODUCT [MHz]
100
80
60
40
20
RL=500
350
SLEW RATE (V/µs)
300
250
200
150
AV=+2 RF=500 RL=500 CL=5pF
POSITIVE SLEW RATE
NEGATIVE SLEW RATE
0
0 3 6 9 12 15
SUPPLY VOLTAGES (±V)
100
0
3 6 9 12 15
SUPPLY VOLTAGES (±V)
FIGURE 7. GAIN BANDWIDTH PRODUCT vs SUPPLY FIGURE 8. SLEW RATE vs SUPPLY
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RLOAD (AV = +1)
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS RLOAD (AV = +2)
5 VS = 15V
NORMALIZED GAIN (dB)
4 AV = +2 RF = 500
3 RL = 500
2
CL= 68pF
CL= 100pF
1 CL= 39pF CL= 22pF
0
-1
CL= 39pF
-2
-3
-4
-5
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CLOAD (AV = +1)
100k 1M 10M 100M 1G FREQUENCY (Hz)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS CLOAD (AV = +2)
5
4 VS
= ±15V
5
4 VS
= ±15V
NORMALIZED GAIN (dB)
AV = +1
3 RL = 500 CL = 5pF
2
1
0
-1
-2
-3
-4
100k | 1M | 10M | 100M | 1G | -5 100k | 1M 10M | 100M |
FREQUENCY (Hz) | FREQUENCY (Hz) |
-5
RF=100 RF=0
RF=500 RF=250
AV = +2
NORMALIZED GAIN (dB)
3 RL = 500 CL = 5pF
2
1
0
-1
-2
-3
-4
RF=100 RF=250 RF=500
RF=1k
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS RFEEDBACK (AV = +1)
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS RFEEDBACK (AV = +2)
AV = +1 RF = 0 RL = 500 CL = 5pF
VS = ±15V RF = 500 RL = 500 CL = 5pF
AV = +2
4 5
CIN = 6.8pF
CIN = 10pF
3 4
CIN = 4.7p
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
2 3
1 F 2
0 1
CIN = 2.2pF
-1 0
CIN = 0pF
-2 -1
-3 -2
-4 -3
-5 -4
-6 -5
VS = ±2.5V
VS = ± 5V
VS = ± 10V
VS = ± 15V
100k 1M 10M 100M 1G FREQUENCY (Hz)
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS INVERTING INPUT CAPACITANCE (CIN)
100k 1M 10M 100M 1G FREQUENCY (Hz)
FIGURE 16. GAIN vs FREQUENCY FOR VARIOUS SUPPLY SETTINGS
FIGURE 17. COMMON-MODE REJECTION RATIO (CMRR) FIGURE 18. POWER SUPPLY REJECTION RATIO (PSRR)
-20
HARMONIC DISTORTION (dBc)
-30
-40
-50
-60
VS=±15V AV=+1 RF=0 RL=500 CL=5pF VOUT=2VP-P
3RD HD
2ND HD
THD
-70
-80
-90
-100
500K 1M 10M 40M
FREQUENCY (Hz)
FIGURE 19. HARMONIC DISTORTION vs FREQUENCY (AV = +1)
FIGURE 20. HARMONIC DISTORTION vs OUTPUT VOLTAGE (AV = +2)
RL=500 CL=5pF
25
OUTPUT VOLTAGE SWING [Vp-p]
Av=+1
20
Av=+2
15 RF=500
10
5
0
0 3 6 9 12 15
SUPPLY VOLTAGES (±V)
FIGURE 21. OUTPUT SWING vs FREQUENCY FOR VARIOUS GAIN SETTINGS
FIGURE 22. OUTPUT SWING vs SUPPLY VOLTAGE FOR VARIOUS GAIN SETTINGS
20% to 80% 80% to 20%
20% to 80% 80% to 20%
FIGURE 23. LARGE SIGNAL RISE AND FALL TIMES FIGURE 24. SMALL SIGNAL RISE AND FALL TIMES
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
TOTAL SUPPLY CURRENT (mA)
781mW | ||||||
SO8 JA=160°C/W | ||||||
25 1.2
POWER DISSIPATION (W)
20 1
15
10
AV=+1
5 RF=0
RL=500 CL=5pF
0
0 3 6 9 12 15
0.8
0.6
0.4
0.2
0
0 25 50 75 85
100
125
150
SUPPLY VOLTAGES (±V) AMBIENT TEMPERATURE (°C)
FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.136W | |||||||
SO8 JA=110°C/W | |||||||
1.8
POWER DISSIPATION (W)
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0 25 50 75 85 100 125
150
AMBIENT TEMPERATURE (°C)
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
The ISL55002 is a wide bandwidth, low power, and low offset voltage feedback operational amplifier. This device is internally compensated for closed loop gain of +1 or greater. Connected in voltage follower mode and driving a 500 load, the -3dB bandwidth is around a 200MHz. Driving a 150 load and a gain of 2, the bandwidth is about 90MHz while maintaining a 300V/µs slew rate.
The ISL55002 is designed to operate with supply voltage from
+15V to -15V. That means for single supply application, the supply voltage is from 0V to 30V. For split supplies application, the supply voltage is from ±15V. The amplifier has an input common-mode voltage range from 1.5V above the negative supply (VS- pin) to 1.5V below the positive supply (VS+ pin). If the input signal is outside the above specified range, it will cause the output signal to be distorted.
The outputs of the ISL55002 can swing from -12.75V to +13.4V for VS = ±15V. As the load resistance becomes lower, the output swing is lower.
For applications that require a gain of +1, no feedback resistor is required. Just short the output pin to the inverting input pin. For gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF can't be very big for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico Farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. For gain of +1, RF = 0 is optimum. For the gains other than +1, optimum response is obtained with RF with proper selection of RF and RG (see Figures15 and 16 for selection).
For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This is especially difficult when driving a standard video load of 150, because of the change in output current with DC level. The dG and dP of this device is about 0.01% and 0.05°, while driving 150 at a gain of 2. Driving high impedance loads would give a similar or better dG and dP performance.
The ISL55002 can drive a 47pF load in parallel with 500 with less than 3dB of peaking at gain of +1 and as much as 100pF at a gain of +2 with under 3db of peaking. If less peaking is
chosen to make up for any gain loss which may be created by the additional series resistor at the output.
When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
The ISL55002 does not have internal short circuit protection circuitry. It has a typical short circuit current of 140mA. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds ±60mA. This limit is set by the design of the internal metal interconnect. Note that in transient applications, the part is robust.
Short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. In video applications this would be a 75 resistor and will provide adequate short circuit protection to the device. Care should still be taken not to stress the device with a short at the output.
With the high output drive capability of the ISL55002, it is possible to exceed the 150°C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is determined according to:
TJMAX – TAMAX PDMAX = --------------------------------------------
JA
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or:
For sourcing:
RLi
desired in applications, a small series resistor (usually between n V
5 to 50) can be placed in series with the output to eliminate
PDMAX = VS ISMAX + VS – VOUTi -----O----U---T i
most peaking. However, this will reduce the gain slightly. If the gain setting is greater than 1, the gain resistor RG can then be
i = 1
For sinking:
n
PDMAX = VS ISMAX + VOUTi – VS ILOADi
i = 1
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
N = number of amplifiers (max = 2)
By setting the two PDMAX equations equal to each other, we can solve the output current and RLOAD to avoid the device overheat.
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply
pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
A common and easy to implement filter taking advantage of the wide bandwidth, low offset and low power demands of the ISL55002. A derivation of the transfer function is provided for convenience (See Figure 28).
Again this useful filter benefits from the characteristics of the ISL55002. The transfer function is very similar to the low pass so only the results are presented (See Figure 29).
V2 K 1 RB
5V RA
C5 Vo K 1 V1
1nF
C1
R2C2s 1
Vo
V1 Vi 1 K V1 Vo Vi 0
R1
1k
R2
1k C
1nF
+ V+
VOUT
R1
H(s)
R2 1
C1s
K
2
V1 2
1nF
- V-
R7
1k
R1C1R2C2s ((1 K)R1C1 R1C2 R21C2)s 1
1
H( jw ) 1 w 2R C R C
jw((1 K)R C R C R C )
RB
1k
RA C5
1 1 2 2
Holp K
wo 1
1 1 1 2 2 2
1k
1nF
R1C1R2C2
Q 1
V3 (1 K)
5V
R1C1
R2C2
R1C2
R2C1
R2C2 R1C1
Holp K
Equations simplify if we let all
FIGURE 28. SALLEN-KEY LOW PASS FILTER
wo 1 RC
Q 1
components be equal R=C
3 K
5V
V2 Holp K
C5 wo 1
1nF
C1
R1C1R2C2
Q 1
R1
V1 1k
R2
1k C2
1nF
1nF
+ V+
- V-
VOUT
R7
(1 K)
R1C1
R2C2
R1C2
R2C1
R2C2 R1C1
RB
1k
RA C5
1k
Holp
wo
K
4 K
2
Equations simplify if we let
1k
1nF
V3 5V
RC
Q 2
4 K
all components be equal R=C
FIGURE 29. SALLEN-KEY HIGH PASS FILTER
The addition of a third amplifier to the conventional three amplifier instrumentation amplifier introduces the benefits of
eo3 = –1 + 2R2 RGe1 – e2 eo = –21 + 2R2 RGe1 – e2
eo4 = 1 + 2R2 RGe1 – e2
differential signal realization, specifically the advantage of using common-mode rejection to remove coupled noise and ground potential errors inherent in remote transmission. This configuration also provides enhanced bandwidth, wider output
2f
C1 2
BW = ------------------
ADi
ADi
= –21 + 2R2
RG
swing and faster slew rate than conventional three amplifier solutions with only the cost of an additional amplifier and few resistors.
The strain gauge is an ideal application to take advantage of the moderate bandwidth and high accuracy of the ISL55002. The operation of the circuit is very straightforward. As the strain variable component resistor in the balanced bridge is
A1
e1 +
-
R2
R3 R3
A3
-
+
R3 R3
eo3
+
subjected to increasing strain, its resistance changes, resulting in an imbalance in the bridge. A voltage variation from the referenced high accuracy source is generated and translated to the difference amplifier through the buffer stage. This voltage difference as a function of the strain is converted into an output voltage.
RG
R3 R3
R2 A4
+
-
REF
eo
-
eo4
A2
- R3 R3
e2 +
FIGURE 30. DIFFERENTIAL OUTPUT AMPLIFIER
VARIABLE SUBJECT TO STRAIN
5
V
R
R
+ 1k
15 16
+ V2
- 5V C6
1nF
R17 1k
+ V+
0V -
1k
1k 1k
R18
1k
-
RF
1k
V-
C12
1nF
+ V4
5V
RL
1k
VOUT (V1+V2+V3+V4)
FIGURE 31. STRAIN GAUGE
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A
D
N (N/2)+1
h X 45°
E E1
PIN #1
I.D. MARK
A
c
SEE DETAIL “X”
1 (N/2)
B
L1
0.010 M C A B
e H
C
A2
SEATING PLANE
0.004 C
A1 L
b DETAIL X
B
A
C
0.010 M
0.010
4° ±4°
GAUGE PLANE
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL | SO-8 | SO-14 | SO16 (0.150”) | SO16 (0.300”) (SOL-16) | SO20 (SOL-20) | SO24 (SOL-24) | SO28 (SOL-28) | TOLERANCE | NOTES |
A | 0.068 | 0.068 | 0.068 | 0.104 | 0.104 | 0.104 | 0.104 | MAX | - |
A1 | 0.006 | 0.006 | 0.006 | 0.007 | 0.007 | 0.007 | 0.007 | 0.003 | - |
A2 | 0.057 | 0.057 | 0.057 | 0.092 | 0.092 | 0.092 | 0.092 | 0.002 | - |
b | 0.017 | 0.017 | 0.017 | 0.017 | 0.017 | 0.017 | 0.017 | 0.003 | - |
c | 0.009 | 0.009 | 0.009 | 0.011 | 0.011 | 0.011 | 0.011 | 0.001 | - |
D | 0.193 | 0.341 | 0.390 | 0.406 | 0.504 | 0.606 | 0.704 | 0.004 | 1, 3 |
E | 0.236 | 0.236 | 0.236 | 0.406 | 0.406 | 0.406 | 0.406 | 0.008 | - |
E1 | 0.154 | 0.154 | 0.154 | 0.295 | 0.295 | 0.295 | 0.295 | 0.004 | 2, 3 |
e | 0.050 | 0.050 | 0.050 | 0.050 | 0.050 | 0.050 | 0.050 | Basic | - |
L | 0.025 | 0.025 | 0.025 | 0.030 | 0.030 | 0.030 | 0.030 | 0.009 | - |
L1 | 0.041 | 0.041 | 0.041 | 0.056 | 0.056 | 0.056 | 0.056 | Basic | - |
h | 0.013 | 0.013 | 0.013 | 0.020 | 0.020 | 0.020 | 0.020 | Reference | - |
N | 8 | 14 | 16 | 16 | 20 | 24 | 28 | Reference | - |
Rev. L 2/01
NOTES:
Plastic or metal protrusions of 0.006” maximum per side are not included.
Plastic interlead protrusions of 0.010” maximum per side are not included.
Dimensions “D” and “E1” are measured at Datum Plane “H”.
Dimensioning and tolerancing per ASME Y14.5M-1994
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