36V, Low Noise Zero-Drift Operational Amplifier
FEATURES DESCRIPTION
n Supply Voltage Range: 4.75V to 36V
n Offset Voltage: 5μV (Maximum)
n Input Noise Voltage
n Input Common Mode Range: V– – 0.1V to V+ – 1.5V
n Rail-to-Rail Output
n Unity Gain Stable
n Gain Bandwidth Product: 2.5MHz (Typ)
n Slew Rate: 1.6V/μs (Typ)
n AVOL: 150dB (Typ) n PSRR: 150dB (Typ) n CMRR: 150dB (Typ)
n Shutdown Mode
APPLICATIONS
n High Resolution Data Acquisition
n Reference Buffering
n Test and Measurement
n Electronic Scales
n Thermocouple Amplifiers
n Strain Gauges
n Low Side Current Sense
n Automotive Monitors and Control
TYPICAL APPLICATION
The LTC®2058 is a dual, low noise, zero-drift operational amplifier that offers precision DC performance over a wide supply range of 4.75V to 36V. Offset voltage and 1/f noise are suppressed, allowing this amplifier to achieve a maximum offset voltage of 5μV and a DC to 10Hz input noise voltage of 200nVP-P (Typ). The LTC2058’s self- calibrating circuitry results in low offset voltage drift with
temperature, 0.025μV/°C (Max), and practically zero drift over time. The amplifier also features an excellent power supply rejection ratio (PSRR) of 150dB and a common mode rejection ratio (CMRR) of 150dB (Typ).
The LTC2058 provides rail-to-rail output swing and an input common mode range that includes the V– rail. In addition to low offset and noise, this amplifier features a 2.5MHz (Typ) gain-bandwidth product and a 1.6V/μs (Typ) slew rate.
Wide supply range, combined with low noise, low offset, and excellent PSRR and CMRR make the LTC2058 well suited for high dynamic-range test, measurement, and instrumentation systems.
All registered trademarks and trademarks are the property of their respective owners.
MEASUREMENT BANDWIDTH | VOUT NOISE |
10kHz | 12μVRMS |
100kHz | 80μVRMS |
VOUT (5V/DIV)
REF 5V
+
½ LTC2058
–
RCOM
RIN
150pF
VS = ±15V
DAC SPAN = ±10V
SPI WITH 4
READBACK
LTC2756
REF
ROFS
RFB
IOUT1
20pF
5V
0.1µF
VDD GND
GAIN ADJUST
GEADJ
BIT DAC WITH SPAN SELECT
OFFSET ADJUST
VOSADJ
IOUT2 GND
2058 TA01a
½ LTC2058
VOUT
15µs/DIV
2058 TA01b
Rev 0
For more information www.analog.com 1
Total Supply Voltage
(V+ to V–) ..............................................................40V
Input Voltage
–IN, +IN ................................... V– – 0.3V to V+ + 0.3V
SD, SDCOM ............................. V– – 0.3V to V+ + 0.3V
Input Current
–IN, +IN ........................................................... ±10mA
SD, SDCOM ..................................................... ±10mA
Differential Input Voltage
+IN to –IN .............................................................±6V
SD – SDCOM ........................................ –0.3V to 5.3V
Output Short-Circuit Duration .......................... Indefinite Operating Temperature Range (Note 2)
LTC2058I ............................................. –40°C to 85°C
LTC2058H.......................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
12 SDCOM
11 V+
10 OUTB
9 GUARD
8 –INB
7 +INB
SD 1
V– 2
OUTA 3
GUARD 4
–INA 5
+INA 6
V+ OUTB
–INB
+INB
9
V–
OUTA
–INA
+INA V–
5
4
6
3
7
2
8
1
V–
13
TOP VIEW
TOP VIEW
S8E PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJC = 5°C/W, θJA = 33°C/W EXPOSED PAD (PIN 9) IS V–, MUST BE SOLDERED TO PCB
MSE PACKAGE
12-LEAD PLASTIC MSOP
TJMAX = 150°C, θJC = 10°C/W, θJA = 40°C/W EXPOSED PAD (PIN 13) IS V–, MUST BE SOLDERED TO PCB
TUBES | TAPE AND REEL | PART MARKING* | PACKAGE DESCRIPTION | SPECIFIED TEMPERATURE RANGE |
LTC2058IMSE#PBF | LTC2058IMSE#TRPBF | 2058 | 12-Lead Plastic MSOP | –40°C to 85°C |
LTC2058HMSE#PBF | LTC2058HMSE#TRPBF | 2058 | 12-Lead Plastic MSOP | –40°C to 125°C |
LTC2058IS8E#PBF | LTC2058IS8E#TRPBF | 2058 | 8-Lead Plastic Small Outline | –40°C to 85°C |
LTC2058HS8E#PBF | LTC2058HS8E#TRPBF | 2058 | 8-Lead Plastic Small Outline | –40°C to 125°C |
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Parts ending with PBF are ROHS and WEEE compliant.
For more information on tape and reel specifications, go to: Tape and reel specifications Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
PARAMETER | CONDITIONS | MIN | TYP | MAX | UNITS | ||
VOS | Input Offset Voltage (Note 3) | 0.5 5 | μV | ||||
ΔVOS ΔT | Average Input Offset Voltage Drift (Note 3) | –40°C to 125°C | l | 0.025 | μV/°C | ||
IB | Input Bias Current (Notes 4, 5) | –40°C to 85°C –40°C to 125°C | l l | 30 | 100 200 4.5 | pA pA nA | |
IOS | Input Offset Current (Notes 4, 5) | –40°C to 85°C –40°C to 125°C | l l | 60 | 200 200 300 | pA pA pA | |
in | Input Noise Current Spectral Density (Note 8) | 1kHz, CEXT = 0pF | 0.5 | pA/√Hz | |||
en | Input Noise Voltage Spectral Density | 1kHz | 9 | nV/√Hz | |||
enP-P | Input Noise Voltage | DC to 10Hz | 200 | nVP-P | |||
ZIN | Differential Input Impedance Common Mode Input Impedance | 225k||8 1012||20 | Ω||pF Ω||pF | ||||
CMRR | Common Mode Rejection Ratio (Note 6) | VCM = V– – 0.1V to V+ – 1.5V –40°C to 85°C –40°C to 125°C | l l | 123 121 118 | 150 | dB dB dB | |
PSRR | Power Supply Rejection Ratio (Note 6) | VS = 4.75V to 36V –40°C to 125°C | l | 140 140 | 150 | dB dB | |
AVOL | Open Loop Voltage Gain (Note 6) | VOUT = V– +0.5V to V+ – 0.3V, RL =1kΩ –40°C to 125°C | l | 124 120 | 150 | dB dB | |
VOL – V– | Output Voltage Swing Low | No Load –40°C to 125°C | l l l l | 5 55 260 | 15 20 150 200 470 750 750 | mV mV mV mV mV mV mV | |
ISINK = 1mA | |||||||
–40°C to 125°C | |||||||
ISINK = 5mA | |||||||
–40°C to 85°C | |||||||
–40°C to 125°C | |||||||
V+ – VOH | Output Voltage Swing High | No Load –40°C to 125°C | l l l l | 5.5 50 235 | 16 20 75 95 315 365 400 | mV mV mV mV mV mV mV | |
ISOURCE = 1mA | |||||||
–40°C to 125°C | |||||||
ISOURCE = 5mA | |||||||
–40°C to 85°C | |||||||
–40°C to 125°C | |||||||
ISC | Short-Circuit Current | Sourcing/Sinking | 20/19 | 31/30 | mA | ||
SRRISE | Rising Slew Rate | AV = –1, RL = 10kΩ | 1.6 | V/μs | |||
SRFALL | Falling Slew Rate | AV = –1, RL = 10kΩ | 1.7 | V/μs | |||
GBW | Gain Bandwidth Product | 2.5 | MHz | ||||
fC | Internal Chopping Frequency | 100 | kHz | ||||
IS | Supply Current Per Amplifier | No Load –40°C to 85°C –40°C to 125°C | l l | 0.95 | 1.15 1.4 1.55 | mA mA mA | |
In Shutdown Mode –40°C to 85°C –40°C to 125°C | l l | 3 | 4.25 5 | µA µA µA | |||
VSDL | Shutdown Threshold (SD – SDCOM) Low (Note 7) | –40°C to 125°C | l | 0.8 | V | ||
VSDH | Shutdown Threshold (SD – SDCOM) High (Note 7) | –40°C to 125°C | l | 2 | V | ||
SDCOM Voltage Range (Note 7) | –40°C to 125°C | l | V– | V+ –2V | V | ||
ISD | SD Pin Current (Note 7) | –40°C to 125°C, VSD – VSDCOM = 0 | l | –1 | –0.5 | µA | |
ISDCOM | SDCOM Pin Current (Note 7) | –40°C to 125°C, VSD – VSDCOM = 0 | l | 0.75 | 1.5 | µA |
SYMBOL | PARAMETER | CONDITIONS | MIN TYP | MAX | UNITS | |
VOS | Input Offset Voltage (Note 3) | 0.5 5 | μV | |||
ΔVOS ΔT | Average Input Offset Voltage Drift (Note 3) | –40°C to 125°C | l | 0.025 | μV/°C | |
IB | Input Bias Current (Note 4, 5) | –40°C to 85°C –40°C to 125°C | l l | 30 | 100 200 4.5 | pA pA nA |
IOS | Input Offset Current (Note 4, 5) | –40°C to 85°C –40°C to 125°C | l l | 60 | 200 200 300 | pA pA pA |
in | Input Noise Current Spectral Density (Note 8) | 1kHz, CEXT = 0pF 1kHz, CEXT = 22pF | 1 0.5 | pA/√Hz pA/√Hz | ||
en | Input Noise Voltage Spectral Density | 1kHz | 9 | nV/√Hz | ||
enP-P | Input Noise Voltage | DC to 10Hz | 200 | nVP-P | ||
ZIN | Differential Input Impedance Common Mode Input Impedance | 225k||13 1012||6 | Ω||pF Ω||pF | |||
CMRR | Common Mode Rejection Ratio (Note 6) | VCM = V– – 0.1V to V+ – 1.5V –40°C to 85°C –40°C to 125°C | l l | 138 150 137 135 | dB dB dB | |
PSRR | Power Supply Rejection Ratio (Note 6) | VS = 4.75V to 36V –40°C to 125°C | l | 140 150 140 | dB dB | |
AVOL | Open Loop Voltage Gain (Note 6) | VOUT = V– +0.4V to V+ –0.25V, RL = 10kΩ –40°C to 125°C | l | 137 150 133 | dB dB | |
VOL – V– | Output Voltage Swing Low | No Load –40°C to 125°C ISINK = 1mA –40°C to 125°C ISINK = 5mA –40°C to 85°C –40°C to 125°C | l | 5 | 15 20 | mV mV |
55 | 150 | mV | ||||
l | 200 | mV | ||||
270 | 470 | mV | ||||
l | 750 | mV | ||||
l | 750 | mV | ||||
V+ – VOH | Output Voltage Swing High | No Load –40°C to 125°C ISOURCE = 1mA –40°C to 125°C ISOURCE = 5mA –40°C to 85°C –40°C to 125°C | l | 7 | 18 22 75 90 315 365 400 | mV mV |
50 | mV | |||||
l | mV | |||||
235 | mV | |||||
l | mV | |||||
l | mV | |||||
ISC | Short-Circuit Current | Sourcing/Sinking | 20/25 31/36 | mA | ||
SRRISE | Rising Slew Rate | AV = –1, RL = 10kΩ | 1.6 | V/μs | ||
SRFALL | Falling Slew Rate | AV = –1, RL = 10kΩ | 1.7 | V/μs | ||
GBW | Gain Bandwidth Product | 2.5 | MHz | |||
fC | Internal Chopping Frequency | 100 | kHz | |||
IS | Supply Current Per Amplifier | No Load –40°C to 85°C –40°C to 125°C | l l | 1 | 1.2 1.45 1.6 | mA mA mA |
In Shutdown Mode –40°C to 85°C | l | 5 | 7.5 | µA µA | ||
–40°C to 125°C | l | 9 | µA | |||
VSDL | Shutdown Threshold (SD – SDCOM) Low (Note 7) | –40°C to 125°C | l | 0.8 | V |
SYMBOL | PARAMETER | CONDITIONS | MIN TYP MAX | UNITS | |
VSDH | Shutdown Threshold (SD – SDCOM) High (Note 7) | –40°C to 125°C | l | 2 | V |
SDCOM Voltage Range (Note 7) | –40°C to 125°C | l | V– V+ –2V | V | |
ISD | SD Pin Current (Note 7) | –40°C to 125°C, VSD – VSDCOM = 0 | l | –1 –0.5 | µA |
ISDCOM | SDCOM Pin Current (Note 7) | –40°C to 125°C, VSD – VSDCOM = 0 | l | 0.75 1.5 | µA |
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The LTC2058I is guaranteed to meet specified performance from –40°C to 85°C. The LTC2058H is guaranteed to meet specified performance from –40°C to 125°C.
Note 3: These parameters are guaranteed by design. Thermocouple effects preclude measurements of these voltage levels during automated testing. VOS is measured to a limit determined by test equipment capability.
Note 4: These specifications are limited by automated test system capability. Leakage currents and thermocouple effects reduce test accuracy. For tighter guaranteed specifications, please contact LTC Marketing.
Note 5: Input BIAS current is measured using an equivalent source impedance of 100MΩ || 51pF.
Note 6: Minimum specifications for these parameters are limited by the capabilities of the automated test system, which has an accuracy of approximately 10µV for VOS measurements. For reference, 30V/1µV is 150dB of voltage ratio.
Note 7: MSE package only.
Note 8: Refer to the Application Information section for more details.
N = 160 VS = ±2.5V µ = 0.130µV σ = 0.420µV TA = 25°C | |||||||||||
N = 160 VS = ±15V µ = 0.194µV σ = 0.436µV TA = 25°C | |||||||||||
80 80
70 70
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
60 60
50 50
40 40
30 30
20 20
10 10
N = 160 VS = ±2.5V µ = 3.933nV/°C σ = 1.318nV/°C | |||||||||
80
70
NUMBER OF AMPLIFIERS
60
50
40
30
20
10
0
–3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5 3
VOS (µV)
2058 G01
0
–3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5 3
VOS (µV)
2058 G02
0
0 2 4 6 8 10 12 14 16 18 20
VOS TC (nV/°C)
2058 G03
80
N = 160
70 VS = ±15V
µ = 5.469nV/°C
NUMBER OF AMPLIFIERS
60 σ = 1.805nV/°C
50
40
30
20
10
5
4
6 TYPICAL CHANNELS VS = 5V
3 TA = 25°C
2
VOS (µV)
1
0
–1
–2
–3
–4
5
6 TYPICAL CHANNELS
4 VS = 30V
3 TA = 25°C
2
VOS (µV)
1
0
–1
–2
–3
–4
0
0 2 4 6 8 10 12 14 16 18 20
VOS TC (nV/°C)
2058 G04
–5
–1 0 1 2 3 4 5
VCM (V)
2058 G05
–5
0 5 10 15 20 25 30
VCM (V)
2058 G06
5
4
6 TYPICAL CHANNELS VCM = VS/2
3 TA = 25°C
2
VOS (µV)
1
0
–1
–2
–3
–4
–5
1 TYPICAL UNIT VS = ±15V VCM=0V
78 TYPICAL CHANNELS | |||||||
VS = ±15V | |||||||
5 100
4
3
10
2
VOS (µV)
IB (nA)
1
0 1
–1
–2
0.1
–3
–4
–5 0.01
0 5 10 15 20 25 30 35 40
VS (V)
2058 G07
0 300 600 900 1200 1500 1800 2100
TIME (HOURS)
2058 G08
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
2058 G09
100
80
60
40
IB (pA)
20
0
–20
–40
–60
–80
–100
AVERAGE OF 6 TYPICAL CHANNELS | ||||||
VS = 5V TA=25°C | ||||||
–1 0 1 2 3 4 5
VCM (V)
2058 G10
100
80
60
40
IB (pA)
20
0
–20
–40
–60
–80
–100
AVERAGE OF 6 TYPICAL CHANNELS | ||||||
VS = 30V TA=25°C | ||||||
0 5 10 15 20 25 30
VCM (V)
2058 G11
100
80
60
40
IB (pA)
20
0
–20
–40
–60
–80
–100
AVERAGE OF 6 TYPICAL CHANNELS VCM = VS/2 TA = 25°C | ||||||||
IB(+IN) IB(–IN) | ||||||||
0 5 10 15 20 25 30 35 40
VS (V)
2058 G12
NPUT–REFERRED VOLTAGE NOISE (100nV/DIV)
NPUT-REFERRED VOLTAGE NOISE (100nV/DIV)
VS = ±2.5V | |||||||||||||||||
VS = ±15V | |||||||||||||||||||
100
INPUT-REFERRED VOLTAGE NOISE DENSITY (nV/√Hz)
VS = ±2.5V...±15V AV=+1
10
1s/DIV
2058 G13
1s/DIV
2058 G14
1
0.1 1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 G15
INPUT–REFERRED CURRENT NOISE DENSITY (pA/√Hz)
10
1
0.1
CEXT = 0 pF TA = 25°C
VS= ±15V VS= ±2.5V
120
100
CMRR (dB)
80
60
40
20
0
VS = 30V VCM= VS/2 | ||||||||||||||
140
120
100
PSRR (dB)
80
60
40
20
0
VS = 30V VCM = VS /2
PSRR+
PSRR–
0.1 1 10 100 1k 10k 100k
FREQUENCY (Hz)
2058 G16
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 G17
1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 G18
60
50
CLOSED LOOP GAIN (dB)
40
30
20
10
0
–10
–20
VS = ±15V
RL,eff = 10kΩ
100
80
60
GAIN (dB)
40
20
0
–20
–40
–60
GAIN
CL= 50pF
CL= 200pF
CL= 0pF
VS = ±2.5V RL= 10kΩ
PHAS
E
135
90
PHASE (°C)
45
0
–45
100
80
60
GAIN (dB)
40
20
0
–20
–40
–60
GAIN
CL= 50pF
CL= 200pF
CL= 0pF
VS = ±15V RL= 10kΩ
PHAS
E
135
90
PHASE (°C)
45
0
–45
1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 G19
10k 100k 1M 10M
FREQUENCY (Hz)
2058 G20
10k 100k 1M 10M
FREQUENCY (Hz)
2058 G21
SD–SDCOM
2V/DIV
SUPPLY CURRENT 2mA/DIV
VIN ,VOUT
500mV/DIV
VS = ±2.5V, AV = +1, RL= 2kΩ POWER SUPPLY BYPASS = 10nF
SDB–SDCOM
2V/DIV
SUPPLY CURRENT 2mA/DIV
VIN, VOUT 500mV/DIV
VS= ±15V, AV = +1, RL= 2kΩ POWER SUPPLY BYPASS = 10nF | |||||||||
1k
100
ZOUT (Ω)
10
1
VS = ±2.5V
20µs/DIV
2058 G22
20µs/DIV
2058 G23
0.1 AV = +1
AV = +10
AV = +100
0.01
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 G24
1k
100
ZOUT (Ω)
10
1
VS = ±15V
10G
1G
100M
ZOUT (Ω)
10M
1M
100k
0.1
VS = ±15V
THD +N (%)
0.01
0.001
VS = ±15V RL = 10kΩ
fIN = 1kHz
BW = 80kHz
–60
THD +N (dB)
–80
–100
0.1 AV
= +1
10k
0.0001
–120
0.01
AV = +10
AV = +100 1k
0.00001
AV = +1
AV = –1
–140
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 G25
100
1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz)
2058 G26
0.01 0.1 1 10
OUTPUT AMPLITUDE (VRMS)
2058 G27
0.1
0.01
VS = ±15V AV = +1 RL = 10kΩ
BW = 80kHz
–60
–80
0.01
THD +N (dB)
THD +N (%)
0.001
VS = ±15V AV = –1
RI = RF = 10kΩ
BW = 80kHz
–80
THD +N (dB)
–100
15.0
OUTPUT AMPLITUDE (VP)
12.5
10.0
VS = ±15V
AV = +1 RL = 10kΩ THD+N < 1%
THD +N (%)
0.001
–100
7.5
0.0001
0.00001
VOUT = 3.5VRMS
VOUT = 2VRMS
10 100 1k 10k FREQUENCY (Hz)
2058 G28
–120
–140
0.0001
0.00001
VOUT = 3.5VRMS
VOUT = 2VRMS
10 100 1k 10k FREQUENCY (Hz)
2058 G29
–120
–140
5.0
2.5
0
VS = ±2.5V
1k 10k 100k 1M 10M FREQUENCY (Hz)
2058 G30
3.5
3.0
2.5
IS (mA)
2.0
125°C
85°C
150°C
25°C
3.5
3.0
2.5
IS (mA)
2.0
±15V | ||||||
±2.5V | ||||||
25
SD = SDCOM = VS/2
20
150°C
IS (µA)
15 125°C
1.5
1.0
0.5
0
–55°C
1.5
1.0
0.5
0
85°C
10
5
–40°C
0
–40°C
0°C
25°C
–55°C
0 5 10 15 20 25 30 35 40
VS (V)
2058 G31
–60 –30 0 30 60 90 120 150
TEMPERATURE (°C)
2058 G32
0 4 8 12 16 20 24 28 32 36 40
VS (V)
2058 G33
3.5
3.0
2.5
IS (mA)
2.0
1.5
1.0
0.5
3.5
3.0
2.5
IS (mA)
2.0
1.5
1.0
0.5
VS = ±15V SDCOM=0V | ||||||||||
ISD –55°C ISD 125°C ISDCOM –55°C ISDCOM 125°C | ||||||||||
5
SHUTDOWN PIN CURRENT (µA)
4
3
2
1
0
–1
–2
–3
–4
VS = ±2.5V SDCOM = –2.5V | |||||||||
–55°C –40°C 25°C 85°C 125°C 150°C | |||||||||
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
SD – SDCOM (V)
2058 G34
0
VS = ±15V SDCOM= 0V | |||||||||
–55°C –40°C 25°C 85°C 125°C 150°C | |||||||||
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
SD - SDCOM (V)
2058 G35
–5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
SD – SDCOM (V)
2058 G36
1.5
SHUTDOWN PIN CURRENT (µA)
1.0
0.5
0
–0.5
–1.0
SDCOM
SDB
150°C
–55°C
10
1
V+ – VOUT
0.1
0.01
100
10
V+ - VOUT (V)
1
0.1
0.01
–1.5
SD = SDCOM = VS/2 25°C
0 5 10 15 20 25 30 35 40
VS (V)
2058 G37
0.001
VS = ±2.5V | ||||||||||||||
–55°C –40°C 25°C 85°C | ||||||||||||||
125°C 150°C | ||||||||||||||
0.001 0.01 0.1 1 10 100
ISOURCE (mA)
2058 G38
0.001
VS = ±15V | ||||||||||||||
–55°C | ||||||||||||||
–40°C 25°C 85°C 125°C | ||||||||||||||
150°C | ||||||||||||||
0.001 0.01 0.1 1 10 100
ISOURCE (mA)
2058 G39
10
VOUT – V– (V)
1
0.1
0.01
0.001
100
10
VOUT - V- (V)
1
0.1
0.01
VS = ±15V | ||||||||||||||
–55°C | ||||||||||||||
–40°C 25°C 85°C 125°C 150°C | ||||||||||||||
0.001
VS = ±2.5V | ||||||||
SOURCING SINKING | ||||||||
50
45
40
35
ISC (mA)
30
25
20
15
10
5
0
VS = ±2.5V | |||||||||||||
–55°C –40°C 25°C 85°C 125°C 150°C | |||||||||||||
0.001 0.01 0.1 1 10 100
ISINK (mA)
2058 G40
0.001 0.01 0.1 1 10 100
ISINK (mA)
2058 G41
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
2058 G42
VS = ±15V | ||||||||
SOURCING SINKING | ||||||||
50
45
VOUT (200mV/DIV)
VOUT (2V/DIV)
40
35
ISC (mA)
30
25
20
15
10
5
0
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
VS = ±2.5V VIN = ±0.5V AV = +1
CL = 200pF
2µs/DIV
2058 G44
VS = ±15V VIN = ±5V AV = +1
CL = 200pF
10µs/DIV
2058 G45
2058 G43
100
90
80
OVERSHOOT (%)
70
VS = ± 2.5V AV = +1
OS+
VOUT (25mV/DIV)
VOUT (25mV/DIV)
OS–
60 OS+ RS= 5Ω
VS = ±2.5V VIN = ±50mV
500ns/DIV
2058 G46
VS = ±15V VIN = ±50mV
500ns/DIV
50
40
30
2058 G47 20
10
0
OS– RS= 5Ω
AV = +1
AV = +1
10p 100p 1n 10n 100n 1µ 10µ 100µ
CL= 200pF
CL= 200pF
CLOAD
(F)
2058 G48
100
90
1k
VS = ±2.5V...±15V
AV= +1
VS = ± 15V AV = +1
80
OVERSHOOT (%)
70 OS+
OS–
100
TA= 25°C
VIN 8V/DIV
VOUT
VOUT WITH AVERAGING
–8V
RS (Ω)
60 OS+ RS= 5Ω
50 OS– RS= 5Ω
40
30 10
20
10
0 1
BETTER STABILITY
< 30% OVERSHOOT
< 10% OVERSHOOT
VOUT 0.5mV/DIV
10µs/DIV
VS = ±15V AV = –1 RF = 10kΩ
2058 G51
10p 100p 1n 10n 100n 1µ 10µ 100µ
CLOAD (F)
2058 G49
100p 1n 10n 100n 1u 10µ 100µ
CLOAD (F)
2058 G50
VS = ±15V
VIN
VOUT WITH
VIN
VOUT WITH
VIN
AV = –1 RF = 10kΩ
8V/DIV
AVERAGING
8V/DIV
AVERAGING
8V/DIV
VOUT
WITH
VOUT
VOUT
–8V
VOUT
–8V
AVERAGING VOUT
0.5mV/DIV
VS = ±15V
AV = –1 RF = 10kΩ CF = 22pF
0.5mV/DIV
VOUT
VS = ±15V
AV = –1 RF = 10kΩ CF = 47pF
VOUT 0.5mV/DIV
0V
10µs/DIV
2058 G52
10µs/DIV
2058 G53
10µs/DIV
2058 G54
VIN
0V
VIN
VS = ±15V
VOUT = 3.5 VRMS AV = +1
VOUT
–80
–90
8V/DIV
VOUT
VOUT 0.5mV/DIV
VOUT WITH AVERAGING
NG
RAGI
AVE
TH
T WI
VS = ±15V AV = –1
8V/DIV
VOU
0V
VOUT 0.5mV/DIV
VS = ±15V AV = –1
RF= 10kΩ CF=47pF
–100
CROSSTALK (dB)
–110
–120
–130
RF = 10kΩ CF = 22pF
–140
10µs/DIV
2058 G55
10µs/DIV
2058 G56
–150
–160
RL = 100kΩ
RL = 1kΩ
10 100 1k 10k 100k FREQUENCY (Hz)
2058 G57
140
120
EMIRR (dB)
100
80
60
VIN 50mV/DIV
VOUT 1V/DIV
VIN 250mV/DIV
VOUT 5V/DIV
VS = 30V AV=+1 VIN=–10dBm VCM= VS/2 | ||||||||||||||
EMIRR = 20log(VIN,PEAK/VOUT,DC) |
VS = ±2.5V AV = –100 RF = 10kΩ CL = 100pF | |||||||||
40
20
10M 100M 1G 4G
FREQUENCY (Hz)
5µs/DIV
VS = ±15V AV = –100 RF = 10kΩ CL = 100pF | ||||||||||
2058 G59
2µs/DIV
2058 G60
VIN 50mV/DIV
VOUT 1V/DIV
VS = ±2.5V AV = –100 RF = 10kΩ | ||||||||||
CL = 100pF | ||||||||||
2058 G58
VIN 250mV/DIV
VOUT 5V/DIV
| |||||||||
VS = ±15V AV = –100 RF = 10kΩ CL = 100pF | |||||||||
VS=5V VS=30V | |||||
30
25
CCM (pF)
20
15
10
5µs/DIV
2058 G61
2µs/DIV
2058 G62
5
0
0 5 10 15 20 25 30
VCM (V)
2058 G63
Exposed Pad (Pin 9): Must Be Connected to V–.
SDCOM (Pin 12): Reference Voltage for SD.
Exposed Pad (Pin 13): Must Be Connected to V–.
–IN
+IN
V+
V– V+
V–
250Q
250Q
V+
V+
–
+
–
V V–
OUT
2058 BD1
V+
V+ 0.5µA
SD
SDCOM
10k
V+
V–
10k
V–
5.25V
V–
–
VTH ≈ 1.3V +
–+
0.75µA
SD
2058 BD2
Chopper stabilized amplifiers like the LTC2058 achieve low offset and 1/f noise by heterodyning DC and flicker noise to higher frequencies. In a classical chopper sta- bilized amplifier, this process results in idle tones at the chopping frequency and its odd harmonics.
The LTC2058 utilizes circuitry to suppress these spurious
10
INPUT-REFERRED CURRENT NOISE DENSITY (pA/√Hz)
VS = ±15V TA=25°C
1
artifacts to well below the offset voltage. The typical ripple CEXT = 0pF
magnitude at 100kHz is much less than 1µVRMS.
0.1
CEXT = 22pF
The voltage noise spectrum of the LTC2058 is shown in
0.1 1 10 100 1k 10k 100k FREQUENCY (Hz)
Figure 1. If lower noise is required, consider the following circuit from the Typical Applications section: Paralleling Choppers to Improve Noise.
VS = ±2.5V...±15V AV=+1
100
–
1M
+
CEXT
TEST CIRCUIT
2058 F02a
INPUT–REFERRED VOLTAGE NOISE DENSITY (nV/√Hz)
10
1
0.1 1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
2058 F01
For applications with high source impedances, input cur- rent noise can be a significant contributor to total output noise. For this reason, it is important to consider noise
2058 F02b
chopper and auto-zero amplifiers with switched inputs, the dominant current noise mechanism is not shot noise.
100
LEAKAGE CURRENT
INJECTION CURRENT
1 TYPICAL UNIT VS = ±15V
VCM = 0V
current interaction with circuit elements placed at the amplifier’s inputs.
The current noise spectrum of the LTC2058 is shown in Figure 2. The characteristic curve shows no 1/f behavior. As with all zero-drift amplifiers, there is a significant cur- rent noise component at the offset-nulling frequency. This phenomenon is discussed in the Input Bias Current section.
10
IB (nA)
1
0.1
0.01
25°C MAX IB SPEC
It is important to note that the current noise is not equal to √2qIB A/√Hz. This formula is relevant for base current in bipolar transistors and diode currents; but for most
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
2058 F03
How the various input bias currents behave and contribute to error depends on the nature of the source impedance. For the input bias currents specified in the electrical tables, the source impedances are high value resistors bypassed with shunt filter capacitance. Figure 4 shows the effec- tive DC error as an input referred current error (output DC voltage error divided by gain and then by the source resistance) as a function of the filter capacitance. Note that the effective DC error decreases as the capacitance
increases. The added external capacitance (CEXT) also reduces the input current noise as shown in Figure 2.
Another function of the input capacitance is to reduce the effects of charge injection. The charge injection based current has a frequency component at the chopping fre- quencyanditsharmonics. Intimedomainthesefrequency components appear as current pulses (appearing at regular intervals related to the chopping frequency). When these small current pulses interact with source impedances or gain setting resistors, the resulting voltage spikes are amplified by the closed loop gain. For higher source imped- ances, this may cause the 100kHz chopping frequency to be visible in the output spectrum, which is a phenomenon known as clock feedthrough. To prevent excessive clock
200
VS = ±15V
EFFECTIVE IB (pA)
150
100
50
0
0 50 100 150 200
CEXT (pF)
feedthrough, keep gain-setting resistors and source im- pedances as low as possible. When DC highly resistive source impedance is required, the capacitor across the source impedance reduces the AC impedance, reducing the amplitude of the input voltage spikes. Another way to reduce clock injection effects is to bandwidth limit after the op amp output.
Injection currents from the two inputs are of equal magni- tude but opposite direction. Therefore, input bias current effects on offset voltage due to injection currents will not be canceled by placing matched impedances at both inputs.
Above 50°C, leakage of the ESD protection diodes begins to dominate the input bias current and continues to increase exponentially at elevated temperatures. Unlike injection current, leakage currents are in the same direction for both inputs. Therefore, the output error due to leakage currents can be mitigated by matching the source impedances seen by the two inputs. Keep in mind that if the source- impedance-matching technique is employed to cancel the effect of the leakage currents, below 50°C there is an
offset voltage error of 2IB x R due to the charge-injection currents. If IB = 100pA and R = 10k, the error is 2µV.
In order to achieve accuracy on the microvolt level, ther- mocouple effects must be considered. Any connection of dissimilar metals forms a thermoelectric junction and generates a small temperature-dependent voltage. Also known as the Seebeck Effect, these thermal EMFs can be the dominant error source in low drift circuits.
Connectors, switches, relay contacts, sockets, resistors, and solder are all candidates for significant thermal EMF generation. Even junctions of copper wire from different manufacturers can generate thermal EMFs of 200nV/°C,
–
1M
+
CEXT
TEST CIRCUIT
2058 F04a
which is 8 times the maximum drift specification of the LTC2058. Figure 5 and Figure 6 illustrate the potential magnitude of these voltages and their sensitivity to tem- perature.
2058 F04b
3.0
2.8
MICROVOLTS REFERRED TO 25°C
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.800
0.600
0.400
0.200
0
25
30 35
TEMPERATURE (°C)
40 45
2058 F05
In order to minimize thermocouple-induced errors, atten- tion must be given to circuit board layout and component selection. It is good practice to minimize the number of junctions in the amplifier’s input signal path and avoid con- nectors, sockets, switches, and relays whenever possible. If such components are required, they should be selected for low thermal EMF characteristics. Furthermore, the number, type, and layout of junctions should be matched for both inputs with respect to thermal gradients on the circuit board. Doing so may involve deliberately introducing dummy junctions to offset unavoidable junctions.
Air currents can also lead to thermal gradients and cause
THERMALLY PRODUCED VOLTAGE IN MICROVOLTS
100
SLOPE ≈ 1.5µV/°C BELOW 25°C
significant noise in measurement systems. It is important to prevent airflow across sensitive circuits. Doing so will often reduce thermocouple noise substantially.
A summary of techniques can be found in Figure 7.
50
64% SN/36% Pb
0
60% Cd/40% SN
Leakage currents into high impedance signal nodes can easily degrade measurement accuracy of sub-nanoamp
–50
–100
0
SLOPE ≈ 160nV/°C BELOW 25°C
10 20 30 40 50
signals. High voltage and high temperature applications are especially susceptible to these issues. Quality insula- tion materials should be used, and insulating surfaces should be cleaned to remove fluxes and other residues. For humid environments, surface coating may be neces-
sary to provide a moisture barrier.
SOLDER-COPPER JUNCTION DIFFERENTIAL TEMPERATURE SOURCE: NEW ELECTRONICS 02-06-77
2058 F06
HEAT SOURCE/ POWER DISSIPATOR
THERMAL GRADIENT
**
VIN
RELAY
#
VTHERMAL
– +
–IN LTC2058
RF§
R
RG §
† L
+IN
VTHERMAL
– +
** RG ‡
RF
* MATCHING RELAY NC
* CUT SLOTS IN PCB FOR THERMAL ISOLATION.
** INTRODUCE DUMMY JUNCTIONS AND COMPONENTS TO OFFSET UNAVOIDABLE JUNCTIONS OR CANCEL THERMAL EMFs.
† ALIGN INPUTS SYMMETRICALLY WITH RESPECT TO THERMAL GRADIENTS.
‡ INTRODUCE DUMMY TRACES AND COMPONENTS FOR SYMMETRICAL THERMAL HEAT SINKING.
§ LOADS AND FEEDBACK CAN DISSIPATE POWER AND GENERATE THERMAL GRADIENTS. BE AWARE OF THEIR THERMAL EFFECTS.
# COVER CIRCUIT TO PREVENT AIR CURRENTS FROM CREATING THERMAL GRADIENTS.
2057 F07
Board leakage can be minimized by encircling the input connections with a guard ring operated at a potential very close to that of the inputs. The ring must be tied to a low impedance node. For inverting configurations, the guard ring should be tied to the potential of the positive input (+IN). For noninverting configurations, the guard ring
should be tied to the potential of the negative input (–IN). In order for this technique to be effective, the guard ring must not be covered by solder mask. Ringing both sides of the printed circuit board may be required. See Figure 8a and Figure 8b for examples of proper layout.
RF**
SD
SDCOM
V–
V+
OUTA
OUTB
GRD
GRD
V–
RG
–INA
–INB
+INB
+INA *
§
HIGH- Z SENSOR
LEAKAGE CURRENT
GUARD RING (NO SOLDER MASK OVER GUARD RING)
ALL RESISTORS 0603
* MINIMIZE SPACING TO MAXIMIZE THE CLEARANCE BETWEEN THE EXPOSED GUARD RING AND THE EXPOSED PAD
** VERROR = ILEAK RG; RG << ZSENSOR
§ NO LEAKAGE CURRENT, V+IN = VGRD
RF
RG V+
–
VBIAS
ISENSOR
ZSENSOR
†
GUARD RING
1/2 LTC2058
+
V– ALTERNATIVE
R´F
VOUT
ALTERNATIVE GUARD RING DRIVE CIRCUIT IF RG MUST BE HIGH IMPEDANCE.
HIGH-Z SENSOR
† LEAKAGE CURRENT
GUARD RING
DRIVE
R´G
RF R'F ; R'G RG RG R'G
2058 F08a
VBIAS LEAKAGE CURRENT
HIGH- Z RF
HIGH- Z SENSOR
SD
V–
OUTA GRD
–INA *
+INA
§
SDCOM
V+
OUTB
V–
GRD
+INB
–INB
LOW IMPEDANCE NODE ABSORBS LEAKAGE CURRENT (GROUND)
GUARD RING
(NO SOLDER MASK OVER GUARD RING)
ALL RESISTORS 0603
§ NO LEAKAGE CURRENT, V–IN = VGRD
*MINIMIZE SPACING TO MAXIMIZE THE CLEARANCE BETWEEN THE EXPOSED GUARD RING AND THE EXPOSED PAD.
VBIAS
HIGH-Z SENSOR ISENSOR
GUARD RING RF
V+
–
ZSENSOR
LEAKAGE CURRENT
1/2 LTC2058
+
VOUT
V–
LEAKAGE CURRENT IS ABSORBED BY GROUND INSTEAD OF CAUSING A MEASUREMENT ERROR.
2058 F08b
For low leakage applications, the LTC2058 is available in an MSE12 package with a special pinout that facilitates the layout of guard ring structures. The pins adjacent to
V+
IOVERLOAD –
the inputs have no internal connection, allowing a guard
RIN
1k
½ LTC2058
OUT
ring to be routed through them.
Since the LTC2058 is capable of operating at 36V total supply, care should be taken with respect to power dis- sipation in the amplifier. When driving heavy loads at high voltages, use the JA of the package to estimate the resulting die-temperature rise and take measures to ensure that the resulting junction temperature does not exceed specified limits. PCB metallization andheatsinking should also be considered when high power dissipation is expected. The LTC2058 is packaged in thermally-enhanced S8E and MSE12 packages. These packages feature lower
package thermal resistances compared to their standard counterparts and exposed pads to facilitate heat sinking. The exposed bottom pad must be soldered to the PCB and due to its internal connection to V– it is required to connect the exposed pad to V–. For more efficient heat sinking, it is recommended that the exposed pad have as much PCB metal connected to it as reasonably available. Thermal information for all packages can be found in the Pin Configuration section.
Absolute maximum ratings should not be exceeded. Avoid driving the input and output pins beyond the rails, espe- cially at supply voltages approaching 40V. The inputs of LTC2058 are internally protected by ESD diodes (see
VIN +
V–
RIN LIMITS IOVERLOAD TO <10mA
FOR VIN < 10V OUTSIDE OF THE SUPPLY RAILS.
2058 F09
The current limiting resistance should not be so high as to add noise and error voltages from interaction with input bias currents. Resistances up to 2k will not significantly impact noise or precision. Use the Figure 10 and Figure 11 (I-V Characteristics of the internal ESD diodes) to help determine the appropriate value of the resistor.
In harsh environments, reliability can be enhanced further with protection circuitry as illustrated in Figure 12. This circuit utilizes low-leakage diodes (Nexperia BAV199) to protect the input. R2 protects the external diodes, and R1 is added to limit the current which would get to the internal diodes. In this circuit R1 can be small as the applied volt- age is already reduced by the external protection diodes.
In high temperature applications where the leakage cur- rents of the internal ESD diodes dominate the input bias current, the circuit may benefit from adding an input bias cancellation resistor in the feedback path (see Typical Application Section: Input Bias Current).
10
8 125°C
25°C
6 –40°C
4
INPUT CURRENT (mA)
2
0
–2
–4
–6
–8
–10
–5 –4 –3 –2 –1 0 1 2 3 4 5
DIFFERENTIAL INPUT VOLTAGE (V)
2058 F10
20
15
INPUT CURRENT (mA)
10
5
0
–5
–10
FORWARD BIASING
ESD PROTECTION DIODE BETWEEN INPUT AND V+
FORWARD BIASING
ESD PROTECTION DIODE BETWEEN INPUT AND V –
125°C
Shutdown control is accomplished using a separate logic reference input (SDCOM) and a shutdown pin (SD). This method allows for low voltage digital control logic to oper- ate independently of the amplifier’s high voltage supply rails. A summary of control logic and operating ranges is shown in Table 1 and Table 2.
SHUTDOWN PIN CONDITION | AMPLIFIER STATE |
SD = Float, SDCOM = Float | ON |
SD – SDCOM ≥ 2V | ON |
SD – SDCOM ≤ 0.8V | OFF |
–15 25°C
–40°C
–20
0 0.2 0.4 0.6 0.8 1
INPUT VOLTAGE BEYOND SUPPLY (V)
2058 F11
V+
MIN | MAX | |
SD – SDCOM | –0.2V | 5.2V |
SDCOM | V– | V+ –2V |
SD | V– | V+ |
VIN
D1B
R2 R1
D1A
BAS199
–
½ LTC2058
+
V–
2058 F12
If the shutdown feature is not required, SD and SDCOM may be left floating. Internal circuitry will automatically keep the amplifier in the ON state.
For operation in noisy environments, a capacitor between SD and SDCOM is recommended to prevent noise from changing the shutdown state.
The LTC2058 in the MSE12 package features a shutdown mode for low power applications. In the OFF state, both amplifiers are shut off and draw less than 9μA of supply current per amplifier. Also in the OFF stage, both outputs present high impedances to external circuitry.
Keep in mind that during the OFF state, even with the amplifier output being high impedance, the output may still be modulated by the input signal through the input differential clamp and the feedback resistor. (Refer to the block diagram for the location of the differential clamp). Also depending on the resistor values, significant current may still be drawn from the input source.
When there is a danger of SD and SDCOM being pulled beyond the supply rails, resistance in series with the shut- down pins is recommended to limit current.
ISENSE
VSENSE
10Q
28V
+
10
AMPLIFIER OUTPUT SATURATES WITH DIODE SHORTED | ||||||||||
DIODE NOT SHORTED DIODE SHORTED IDEAL TRANSFER FUNCTION | ||||||||||
9
1N4148 8
VOUT (mV)
OR EQUIVALENT 7
+
RSENSE
1/2 LTC2058
–
OPTIONAL
VOUT 6
5
–
1k
10Ω
SHORT 4
2058 TA02a 3
2
VOUT = 101 • RSENSE • ISENSE
1
0
0 10 20 30 40 50 60 70 80 90 100
VSENSE (µV)
2058 TA02b
4CM CARBON MONOXIDE SENSOR
5V CITY TECHNOLOGY 5V
70nA/ppm CO TYPICAL
1/2 LTC2058 CE
WE RLOAD, 5Q
1/2 LTC2058
VOUT
TYPICAL GAIN:
–5V
C1 RE
100nF
–5V
2.5mV/ppm CO MAX OUTPUT:
5V AT 2000ppmCO
R1, 15k R2, 15k
SPLIT RAIL SUPPLY REQUIRED 4CM COUNTER ELECTRODE (CE)
SELF-BIASES BELOW WE POTENTIAL VWE – VCE = –0.3V TO –0.4 TYPICAL
PJFET J177
R4 1M
V+
C2, 10nF
R3, 35.7k
2058 TA03
+
R5
1/2 LTC2058
–
R2
R1
+
R5
1/2 LTC2058
–
R2 R4
VIN
R2
+
R1 LTC2057
–
8 + R4
R5
AV =
R1 1 • R3 1
VOUT
1/2 LTC2058 R3
–
R2
R1
+
R5
1/2 LTC2058
–
R2
2058 TA04
R1
DC TO 10Hz NOISE = 200nVP-P , en = 9nV/√Hz , in = √N • 1pA/√Hz, IB < N • 100pA (MAX)
√N √N
WHERE N IS THE NUMBER OF PARALLELED INPUT AMPLIFIERS.
FOR N = 4, DC TO 10Hz NOISE = 100nVP-P, en = 4.5nV/√Hz, in = 2pA/√Hz, IB < 100pA (MAX).
R5 SHOULD BE A FEW HUNDRED OHMS TO ISOLATE AMPLIFIER OUTPUTS WITHOUT CONTRIBUTING SIGNIFICANTLY TO NOISE OR IB-INDUCED ERROR.
R2
R1 1 >> √N FOR OUTPUT AMPLIFIER NOISE TO BE INSIGNIFICANT.
10nF
TYPE K
+ (YELLOW)
249k
1%
1k 1%
–
15V
8 M9
9
M3
15V
7
VCC
– (RED)
1k 1/2 LTC2058
1%
+
10 M1 1
LT1991A
6
OUT
VOUT = 10mV/°C
VCM
COUPLE THERMALLY
100k
22Q
0.1µF
–15V
THERMOCOUPLE TEMP OF
–200°C TO 1250°C
GIVES –2V TO 12.5V VOUT
P1
2 P3
3 P9
VEE
4
–15V
REF
5
LT1025
ASSUMING 40µV/°C TEMPCO. CHECK ACTUAL TEMPCO TABLE.
VO
VIN
V+
2058 TA05
GND
R–
499k V–
VCM = V– + 0.1V TO V+ – 1.5V (SMALL SIGNAL) CMRR = 122dB (0.02°C ERROR PER VOLT)
SOPRAY 5W VOC = 21V ISC = 0.5A
PV PANEL
R1 1M
R2 100k
C1
1pF
R3, 5Q 2W
SW1 SW2 RSENSE
1Q, 2W
C2 2.5m
D2 R8
D 200Q
D1
5V SUPPLY
VPV
VBR: 2.5V TO 5V
1/2 LTC2058 1/2 LTC2058
1N4148
IPV
R4, 2k R6, 1k
R5, 2k R7, 3k
2058 TA06a
350
315
280
CURRENT (mA)
245
210
175
140
105
70
35
0
CURRENT
POWER
5.0
4.5
4.0
3.5
POWER (W)
3.0
2.5
2.0
1.5
1.0
0.5
0
1 3 5 7 9 11 13 15 17 19 21
VOLTAGE (V)
2058 TA06b
(Reference LTC DWG # 05-08-1857 Rev C)
.189 – .197
.050
(1.27) BSC
.045 .005
(1.143 0.127)
(4.801 – 5.004)
NOTE 3
.005 (0.13) MAX
8 7 6 5
.245
.089
.160 .005
.228 – .244
.080 – .099
.150 – .157
(6.22) MIN
(2.26) (4.06 0.127) REF
(5.791 – 6.197)
(2.032 – 2.530) (3.810 – 3.988)
NOTE 3
.030 .005
(0.76 0.127) .118
1 2 3 4
.118 – .139
(2.997 – 3.550)
TYP
(2.99) REF
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020 45
(0.254 – 0.508)
.053 – .069 4 5
(1.346 – 1.752)
.008 – .010
(0.203 – 0.254)
0– 8 TYP
.004 – .010 0.0 – 0.005
(0.101 – 0.254) (0.0 – 0.130)
NOTE:
.016 – .050
(0.406 – 1.270)
INCHES
.014 – .019
(0.355 – 0.483) TYP
.050
(1.270) BSC
S8E 1015 REV C
DIMENSIONS IN (MILLIMETERS)
DRAWING NOT TO SCALE
THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010" (0.254mm)
STANDARD LEAD STANDOFF IS 4mils TO 10mils (DATE CODE BEFORE 542)
LOWER LEAD STANDOFF IS 0mils TO 5mils (DATE CODE AFTER 542)
(Reference LTC DWG # 05-08-1666 Rev G)
2.845 0.102
(.112 .004)
0.889 0.127 (.035 .005)
BOTTOM VIEW OF EXPOSED PAD OPTION
2.845 0.102
(.112 .004)
1 6
0.35
REF
5.10
(.201) MIN
1.651 0.102
(.065 .004)
3.20 – 3.45
(.126 – .136)
1.651 0.102
(.065 .004)
REF DETAIL “B”
12 7
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE. FOR REFERENCE ONLY
0.42 0.038 (.0165 .0015)
TYP
0.65
(.0256) BSC
4.039 0.102
(.159 .004)
(NOTE 3)
NO MEASUREMENT PURPOSE
0.406 0.076
RECOMMENDED SOLDER PAD LAYOUT
12 11 10 9 8 7
(.016 .003) REF
0.254
DETAIL “A”
(.010) 0 – 6 TYP
GAUGE PLANE
4.90 0.152
(.193 .006)
3.00 0.102 (.118 .004)
(NOTE 4)
0.53 0.152 (.021 .006)
0.18
DETAIL “A”
1.10 (.043)
1 2 3 4 5 6
0.86 (.034)
(.007)
MAX
REF
SEATING PLANE
0.22 – 0.38
0.1016 0.0508
NOTE:
DIMENSIONS IN MILLIMETER/(INCH)
DRAWING NOT TO SCALE
(.009 – .015) TYP
0.650
(.0256) BSC
(.004 .002)
MSOP (MSE12) 0213 REV G
DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license Fisogrrmanoterdebiny fiomrpmlicaattiioonn owrwotwhe.arwniasleougn.cdeormany patent or patent rights of Analog Devices.
Rev 0
27
1k
8V TO 36V
4.7µF
750Q
5.62k
8V TO 12.6V
47nF
0.1µF 0.1µF
1/2 LTC2058
LT6202
2Q VOUT1
47µF
1k
8V TO 13.2V
VIN
SHDN
VOUTF VOUTS
10k
4.7µF
750Q
5.62k
8V TO 12.6V
0.1µF
47nF
0.1µF
LTC6655-5
2.7µF
10µF (FILM)
10µF (FILM)
1/2 LTC2058 LT6202
2Q VOUT2
47µF
2058 TA07
PART NUMBER | DESCRIPTION | COMMENTS |
High Voltage, Low Noise, Zero Drift Amplifier | 4µV VOS, 4.75V to 60V VS, 1mA IS, RR Output | |
Zero-Drift Operational Amplifier | 3µV VOS, 2.7V to 12V VS, 1.5mA IS, RR Output | |
Dual/Quad, Zero-Drift Operational Amplifier | 3µV VOS, 2.7V to 12V VS, 1.5mA IS, RR Output | |
Precision, Rail-to-Rail, Zero-Drift, Resistor-Programmable Instrumentation Amplifier | 10µV VOS, 2.7V to 11V VS, 1.3mA IS, RRIO | |
Micropower, Single/Dual, Zero-Drift Operational Amplifier | 5µV VOS, 2.7V to 12V VS, 0.2mA IS, RRIO | |
Precision, Low Drift, Low Noise, Buffered Reference | 5ppm/°C, 0.05% Initial Accuracy, 2.1ppmP-P Noise | |
Precision, Wide Supply, High Output Drive, Low Noise Reference | 10ppm/°C, 0.05% Initial Accuracy, 1.6ppmP-P Noise | |
0.25ppm Noise, Low Drift, Precision, Buffered Reference Family | 2ppm/°C, 0.025% Initial Accuracy, 0.25ppmP-P Noise | |
Dual/Quad, 76V Over-The-Top® Input Operational Amplifier | 50µV VOS, 3V to 50V VS, 0.335mA IS, RRIO | |
140V Operational Amplifier | 50pA IB, 1.6mV VOS, 9.5V to 140V VS, 4.5mA IS, RR Output | |
Quad Matched Resistor Network | ±0.01%, ±0.2ppm/°C Matching |
28
Rev 0
D16898-0-5/18(0)
For more information www.analog.com ANALOG DEVICES, INC. 2018
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