LT1122

Fast Settling, JFET Input Operational Amplifier

FEATURES DESCRIPTION

n 100% Tested Settling Time 340ns Typ to 1mV at Sum Node, 10V Step 540ns Max Tested with Fixed Feedback Capacitor

n Slew Rate 60V/µs Min

n Gain-Bandwidth Product 14MHz

n Power Bandwidth (20VP-P) 1.2 MHz n Unity-Gain Stable; Phase Margin 60° n Input Offset Voltage 600µV Max

n Input Bias Current 25°C 75pA Max 70°C 600pA Max


APPLICATIONS

n Fast 12-Bit D/A Output Amplifiers

n High Speed Buffers

n Fast Sample-and-Hold Amplifiers

n High Speed Integrators

n Voltage to Frequency Converters

n Active Filters

n Log Amplifiers

n Peak Detectors

The LT®1122 JFET input operational amplifier combines high speed and precision performance.

A unique poly-gate JFET process minimizes gate series resistance and gate-to-drain capacitance, facilitating wide bandwidth performance, without degrading JFET transis- tor matching.

It slews at 80V/µs and settles in 340ns. The LT1122 is internally compensated to be unity-gain stable, yet it has a bandwidth of 14MHz at a supply current of only 7mA. Its speed makes the LT1122 an ideal choice for fast settling 12-bit data conversion and acquisition systems.

The LT1122 offset voltage of 120µV, and voltage gain of 500,000 also support the 12-bit accurate applications.

The input bias current of 10pA and offset current of 4pA combined with its speed allow the LT1122 to be used in such applications as high speed sample and hold ampli- fiers, peak detectors, and integrators.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and C-Load is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.


TYPICAL APPLICATION

12-Bit Voltage Output D/A Converter Large-Scale Response



0mA TO 2mA OR 4mA

+

CF


2

LT1122 6

+

3


VOUT

5V/DIV

0V TO 10V


  1. BIT CURRENT OUTPUT D/A CONVERTER CF = 5pF TO 17pF

    (DEPENDING ON D/A CONVERTER USED)


    LT1122•TA01


    200ns/DIV AV = –1


    1122 TA07


    ABSOLUTE MAXIMUM RATINGS


    (Note 1)

    Supply Voltage ...................................................... ± 20V

    Differential Input Voltage ....................................... ± 40V Input Voltage.......................................................... ± 20V

    Output Short Circuit Duration .......................... Indefinite

    Lead Temperature (Soldering, 10 sec.).................. 300°C

    Operating Temperature Range

    LT1122AM/BM/CM/DM (OBSOLETE).. –55°C to 125°C LT1122AC/BC/CC/DC/CS/DS ................. –40°C to 85°C

    Storage Temperature Range

    All Devices .......................................... –65°C to 150°C


    PIN CONFIGURATION



    TOP VIEW


    TOP VIEW

    VOS 1 8 SPEED BOOST/

    TRIM OVERCOMP

    –IN 2 7 V+

    +IN 3 6 OUT

    V4 5 VOS TRIM

    S8 PACKAGE

    8-LEAD PLASTIC SO

    TJMAX = 150°C, JA = 190°C/W

    VOS 1 8 SPEED BOOST/

    TRIM OVERCOMP

    –IN 2 7 V+

    +IN 3 6 OUT

    V4 5 VOS TRIM

    N8 PACKAGE

    8-LEAD PDIP

    TJMAX = 150°C, JA = 130°C/W

    OBSOLETE PACKAGE

    J8 PACKAGE 8-LEAD HERMETIC DIP

    TJMAX = 175°C, JA = 100°C/W


    ORDER INFORMATION


    LEAD FREE FINISH

    TAPE AND REEL

    PART MARKING

    PACKAGE DESCRIPTION

    TEMPERATURE RANGE

    LT1122ACN8#PBF

    LT1122ACN8#TRPBF

    LT1122ACN8

    8-Lead Plastic DIP

    –40°C to 85°C

    LT1122BCN8#PBF

    LT1122BCN8#TRPBF

    LT1122BCN8

    8-Lead Plastic DIP

    –40°C to 85°C

    LT1122CCN8#PBF

    LT1122CCN8#TRPBF

    LT1122CCN8

    8-Lead Plastic DIP

    –40°C to 85°C

    LT1122DCN8#PBF

    LT1122DCN8#TRPBF

    LT1122DCN8

    8-Lead Plastic DIP

    –40°C to 85°C

    LT1122CS8#PBF

    LT1122CS8#TRPBF

    1122C

    8-Lead Plastic SO

    –40°C to 85°C

    LT1122DS8#PBF

    LT1122DS8#TRPBF

    1122D

    8-Lead Plastic SO

    –40°C to 85°C

    OBSOLETE PACKAGE

    LT1122AMJ8#PBF

    LT1122AMJ8#TRPBF

    LT1122AMJ8

    8-Lead Hermetic DIP

    –55°C to 125°C

    LT1122BMJ8#PBF

    LT1122BMJ8#TRPBF

    LT1122BMJ8

    8-Lead Hermetic DIP

    –55°C to 125°C

    LT1122CMJ8#PBF

    LT1122CMJ8#TRPBF

    LT1122CMJ8

    8-Lead Hermetic DIP

    –55°C to 125°C

    LT1122DMJ8#PBF

    LT1122DMJ8#TRPBF

    LT1122DMJ8

    8-Lead Hermetic DIP

    –55°C to 125°C

    LT1122ACJ8#PBF

    LT1122ACJ8#TRPBF

    LT1122ACJ8

    8-Lead Hermetic DIP

    –40°C to 85°C

    LT1122BCJ8#PBF

    LT1122BCJ8#TRPBF

    LT1122BCJ8

    8-Lead Hermetic DIP

    –40°C to 85°C

    LT1122CCJ8#PBF

    LT1122CCJ8#TRPBF

    LT1122CCJ8

    8-Lead Hermetic DIP

    –40°C to 85°C

    LT1122DCJ8#PBF

    LT1122DCJ8#TRPBF

    LT1122DCJ8

    8-Lead Hermetic DIP

    –40°C to 85°C

    Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts.

    For more information on lead free part markings, go to: http://www.linear.com/leadfree/

    For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/


    ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V unless otherwise noted. (Note 2)



    SYMBOL


    PARAMETER


    CONDITIONS


    LT1122AM/BM LT1122AC/BC

    MIN TYP MAX

    LT1122CM/DM LT1122CC/DC LT1122CS/DS

    MIN TYP MAX


    UNITS

    VOS

    Input Offset Voltage



    120

    600


    130

    900

    µV

    IOS

    Input Offset Current



    4

    40


    5

    50

    pA

    IB

    Input Bias Current



    10

    75


    12

    100

    pA


    Input Resistance Differential Common Mode


    VCM = –10V to 8V VCM = 8V to 11V


    1012

    1012

    1011


    1012

    1012

    1011


    Ω Ω Ω


    Input Capacitance


    4

    4

    pF

    SR

    Slew Rate

    AV = – 1

    60

    80


    50

    75


    V/µs


    Settling Time (Note 2)

    10V to 0V, – 10V to 0V

    100% Tested: A- and C-Grades to 1mV at Sum Node B- and D-Grades to 1mV at Sum Node

    All Grades to 0.5mV at Sum Node



    340

    350

    450


    540



    350

    360

    470


    590


    ns ns ns

    GBW

    Gain-Bandwidth Product Power Bandwidth


    VOUT = 20VP-P

    14

    1.2

    13

    1.1

    MHz MHz

    AVOL

    Large-Signal Voltage Gain

    VOUT = ±10V, RL = 2kΩ VOUT = ±10V, RL = 600Ω

    180

    130

    500

    250


    150

    110

    450

    220


    V/mV V/mV

    CMRR

    Common-Mode Rejection Ratio

    VCM = ±10V

    83

    99


    80

    98


    dB


    Input Voltage Range

    (Note 4)

    ±10.5

    ±11


    ±10.5

    ±11


    V

    PSRR

    Power Supply Rejection Ratio

    VS = ±10V to ±18V

    86

    103


    82

    101


    dB


    Input Noise Voltage

    0.1Hz to 10Hz

    3.0

    3.3

    µVP-P


    Input Noise Voltage Density

    fO = 100Hz

    fO = 10kHz

    25

    14

    27

    15

    nV/√Hz nV/√Hz


    Input Noise Current Density

    fO = 100Hz, fO = 10kHz

    2

    2

    fA/√Hz

    VOUT

    Output Voltage Swing

    RL = 2kΩ RL = 600Ω

    ±12

    ±11.5

    ±12.5

    ±12


    ±12

    ±11.5

    ±12.5

    ±12


    V V

    IS

    Supply Current



    7.5

    10


    7.8

    11

    mA


    Minimum Supply Voltage

    (Note 5)

    ±5

    ±5

    V


    Offset Adjustment Range

    RPOT ≥ 10k, Wiper to V+

    ±4

    ±10


    ±4

    ±10


    mV


    ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at 0°C ≤ TA ≤ 70°C. VS = ±15V, VCM = 0V. (Note 2)


    SYMBOL


    PARAMETER


    CONDITIONS


    LT1122AC/BC MIN TYP MAX

    LT1122CC/DC LT1122CS/DS

    MIN TYP MAX


    UNITS

    VOS

    Input Offset Voltage


    l


    350

    1400


    400

    2000

    µV


    Average Temperature Coefficient of Input Offset Voltage


    l


    5

    18


    6

    25

    µV/°C

    IOS

    Input Offset Current


    l


    12

    150


    15

    200

    pA

    IB

    Input Bias Current


    l


    80

    600


    90

    800

    pA

    AVOL

    Large-Signal Voltage Gain

    VOUT = ±10V, RL ≥ 2kΩ

    l

    120

    380


    100

    340


    V/mV

    CMRR

    Common-Mode Rejection Ratio

    VCM = ±10V

    l

    82

    98


    78

    96


    dB

    PSRR

    Power Supply Rejection Ratio

    VS = ±10V to ±17V

    l

    84

    101


    80

    99


    dB


    Input Voltage Range


    l

    ±10

    ±10.8


    ±10

    ±10.8


    V

    VOUT

    Output Voltage Swing

    RL = 2kΩ

    l

    ±11.5

    ±12.4


    ±11.5

    ±12.4


    V

    SR

    Slew Rate

    AV = –1

    l

    50

    70


    40

    65


    V/µs

    The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at –55°C ≤ TA ≤ 125°C. VS = ±15V, VCM = 0V. (Note 2)


    SYMBOL


    PARAMETER


    CONDITIONS

    LT1122AM/BM

    MIN TYP MAX

    LT1122CS/DS

    MIN TYP MAX


    UNITS

    VOS

    Input Offset Voltage


    l

    650 2400

    800 3400

    µV


    Average Temperature Coefficient of Input Offset Voltage


    l

    6 18

    7 25

    µV/°C

    IOS

    Input Offset Current


    l

    0.5 6

    0.6 9

    nA

    IB

    Input Bias Current


    l

    6 25

    7 35

    nA

    AVOL

    Large-Signal Voltage Gain

    VOUT = ±10V, RL ≥ 2kΩ

    l

    70 230

    60 200

    V/mV

    CMRR

    Common-Mode Rejection Ratio

    VCM = ±10V

    l

    80 97

    76 94

    dB

    PSRR

    Power Supply Rejection Ratio

    VS = ±10V to ±17V

    l

    83 100

    78 98

    dB


    Input Voltage Range


    l

    ±10 ±10.5

    ±10 ±10.5

    V

    VOUT

    Output Voltage Swing

    RL = 2kΩ

    l

    ±11.3 ±12.1

    ±11.3 ±12.1

    V

    SR

    Slew Rate

    AV = –1

    l

    45 60

    35 55

    V/µs

    The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at –40°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V. (Note 6)


    SYMBOL


    PARAMETER


    CONDITIONS

    LT1122AM/BM

    MIN TYP MAX

    LT1122CS/DS

    MIN TYP MAX


    UNITS

    VOS

    Input Offset Voltage


    l

    450 1900

    500 2700

    µV


    Average Temperature Coefficient of Input Offset Voltage


    l

    6 20

    7 28

    µV/°C

    IOS

    Input Offset Current


    l

    30 600

    40 900

    pA

    IB

    Input Bias Current


    l

    230 2000

    260 2700

    pA

    AVOL

    Large-Signal Voltage Gain

    VOUT = ±10V, RL ≥ 2kΩ

    l

    95 340

    80 300

    V/mV

    CMRR

    Common-Mode Rejection Ratio

    VCM = ±10V

    l

    80 98

    76 96

    dB

    PSRR

    Power Supply Rejection Ratio

    VS = ±10V to ±17V

    l

    83 100

    78 98

    dB


    Input Voltage Range


    l

    ±10 ±10.6

    ±10 ±10.6

    V

    VOUT

    Output Voltage Swing

    RL = 2kΩ

    l

    ±11.3 ±12.2

    ±11.3 ±12.2

    V

    SR

    Slew Rate

    AV = –1

    l

    45 60

    35 60

    V/µs


    ELECTRICAL CHARACTERISTICS

    Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

    Note 2: The LT1122 is measured in an automated tester in less than one second after application of power. Depending on the package used, power dissipation, heat sinking, and air flow conditions, the fully warmed up chip temperature can be 10°C to 50°C higher than the ambient temperature.

    Note 3: Settling time is 100% tested for A- and C-grades using the settling time test circuit shown. This test is not included in quality assurance sample testing.


    Note 4: Input voltage range functionality is assured by testing offset voltage at the input voltage range limits to a maximum of 4mV

    (A, B grades), to 5.7mV (C, D grades).

    Note 5: Minimum supply voltage is tested by measuring offset voltage to 7mV maximum at ±5V supplies.

    Note 6: The LT1122 is not tested and not quality-assurance-sampled at –40°C and at 85°C. These specifications are guaranteed by design,

    correlation and/or inference from –55°C, 0°C, 25°C, 70°C and/or 125°C tests.


    Settling Time Test Fixture


    DEVICE UNDER TEST

    5pF



    10V (REGULATED)


    51Q


    7

    1

    4 HA5002

    2


    15V


    8 51Q


    2k

    1% 2

    2k 1%


    15V

    7

    LT1122 6

    4 6 1

    74LS00 5

    GROUND ALL

    OTHER INPUTS 2

    16 5

    15

    –15V

    VIN

    3 +


    5.1k*

    1%


    4


    –15V


    5.1k

    1%

    TTL 1 3

    IN 2

    3


    4

    LTC201A


    5


    6


    7

    14 (MEASURE INPUT PULSE HERE)


    13


    12


    11


    10



    15V


    0.1µF

    8


    –10V (REGULATED)


    +

    1µF TANT

    9


    NO CONNECTION ON PINS 10, 11, 12, 14, AND 15


    1k

    SETTLING TIME OUTPUT


    15V

    7 + 3

    6

    LT1223

    2


    15V


    51Q 8 1

    2


    7


    HA5002


    5


    4 51Q


    SUMMING NODE OUTPUT


    0.1µF


    –15V


    +

    1µF TANT


    TYPICAL SUPPLY BYPASSING FOR EACH AMP/BUFFER

    (20 TIMES SUM NODE OUTPUT)

    1N5712

    –15V

    4

    1.5k –15V

    79Q


    *THIS RESISTOR CAN BE ADJUSTED TO NULL OUT ALL OFFSETS AT THE SETTLING TIME OUTPUT. THE AUTOMATED TESTER USES A SEPARATE AUTOZERO CIRCUIT.


    1N5712


    LT1122•TA02


    TYPICAL PERFORMANCE CHARACTERISTICS


    Settling Time

    (Input from –10V to 0V)

    Settling Time

    (Input from 10V to 0V)

    Settling Time

    (Input from 0V to 10V)


    1mV/DIV AT SUM NODE

    1mV/DIV AT SUM NODE

    1mV/DIV AT SUM NODE

    100ns/DIV 1122 G01

    100ns/DIV 1122 G02

    100ns/DIV 1122 G03


    Settling Time

    (Input from 0V to –10V) Large-Signal Response

    Undistorted Output Swing vs Frequency

    VS = ±15V TA = 25°C

    30


    1mV/DIV AT SUM NODE

    PEAK-TO-PEAK OUTPUT SWING (V)

    25


    5V/DIV

    20


    15



    100ns/DIV 1122 G04


    AV = 1


    200ns/DIV

    10

    1122 G05 5

    0

    100k

    1M 10M 100M FREQUENCY (Hz)

    1122 TPC01


    120


    100


    80


    GAIN (dB)

    60


    40


    20


    0


    –20


    –40


    Voltage Gain vs Frequency Gain, Phase vs Frequency








    VS = ±15V TA = 25°C

























































    20


    GAIN (dB)

    10


    VS = ±15V TA = 25°C CL = 15pF

    0


    10


    80


    100


    120


    140


    160


    180


    200


    120


    COMMON-MODE REJECTION RATIO (dB)

    100


    PHASE SHIFT (DEGREES)

    80


    60


    40


    20


    0


    Common-Mode Rejection vs Frequency






    VS = ±15V TA = 25°C































    1 10 100 1k 10k 100k 1M 10M 100M 1M

    10M

    100M

    100

    1k 10k

    100k

    1M 10M

    100M

    FREQUENCY (Hz)


    1122 TPC02

    FREQUENCY (Hz)


    1122 TPC03

    FREQUENCY (Hz)


    1122 TPC04


    TYPICAL PERFORMANCE CHARACTERISTICS


    Distribution of Input Offset Voltage

    Input Bias and Offset Currents Over Temperature

    Bias and Offset Currents Over the Common-Mode Range

    800


    NUMBER OF UNITS

    600


    400


    200


    0


    3370 UNITS TESTED IN ALL PACKAGES


    VS = ±15V TA = 25°C

    (NOT WARMED UP)

    100k

    INPUT BIAS AND OFFSET CURRENTS (pA)

    30k 10k 3k 1k 300

    100

    30

    10

    3

    1

    VS = ±15V VCM = 0V


    BIAS CURRENT


    RENT

    OFFSET CUR

    120


    INPUT BIAS AND OFFSET CURRENT (pA)

    100


    80


    60


    40


    20


    0


    VS = ±15V TA = 25°C

    (NOT-WARMED UP)


    OFFSET CURRENT


    BIAS CURRENT

    –900

    –500 –100 100 500

    900

    0 25 50 75 100 125

    15 10 5 0

    5 10 15

    INPUT OFFSET VOLTAGE (µV)

    CHIP TEMPERATURE (°C)

    COMMON-MODE INPUT VOLTAGE (V)


    1122 TPC05


    1122 TPC06


    1122 TPC07


    250

    Warm-Up Drift Noise Spectrum 0.1Hz to 10Hz Noise

















































































    1000

    VS = ±15V

    TA = 25°C



























































































    VS = ±15V


    CHANGE IN OFFSET VOLTAGE (µV)

    200


    150


    100


    50

    TA = 25°C

    SO PACKAGE


    N PACKAGE J PACKAGE


    VOLTAGE NOISE DENSITY (nV/√Hz)

    NOISE VOLTAGE (1µV/DIV)

    100


    IN STILL AIR (SO PACKAGE SOLDERED ONTO BOARD)

    1

    0 1 2 3

    10

    1 3 10


    30 100 300 1k 3k


    10k


    0 2 4 6


    8 10

    TIME AFTER POWER ON (MINUTES)

    1122 TPC08

    FREQUENCY (Hz)


    1122 TPC09

    TIME (SECONDS)


    Intermodulation Distortion


    1122 TPC10


    TOTAL HARMONIC DISTORTION + NOISE (%)

    0.1

    Total Harmonic Distortion + Noise vs Frequency Inverting Gain


    TA = 25°C VS = ±15V

    ZL = 5k//15pF


    0.1

    Total Harmonic Distortion + Noise vs Frequency Noninverting Gain


    INTERMODULATION DISTORTION (IMD) (%)

    0.1

    (CCIF Method) vs Frequency LT1122 and LF156*

    VS = ±15V TA = 25°C AV = –10


    0.01


    0.001


    0.0001

    VO = 7V RMS


    AV = –50


    AV = –10


    AV = –1


    0.01


    0.001


    0.0001


    AV = 10


    AV =1


    AV = 50


    TA = 25°C VS = ±15V

    ZL = 5k//15pF

    VO = 7V RMS


    0.01


    0.001


    0.0001

    VO = 7V RMS

    ZL = 5k//15pF

    LF156


    LT1122

    20 100 1k

    FREQUENCY (Hz)

    10k 20k

    20 100 1k

    TOTAL HARMONIC DISTORTION + NOISE (%)

    FREQUENCY (Hz)

    10k 20k

    3k 10k 20k

    FREQUENCY (Hz)


    1122 TPC11


    1122 TPC12

    *SEE LT1115 DATA SHEET FOR DEFINITION

    OF CCIF TESTING 1122 TPC13


    APPLICATIONS INFORMATION

    Settling Time Measurements

    Settling time test circuits shown on some competitive devices’ data sheets require:

    1. A“flat top” pulse generator. Unfortunately, flat top pulse generators are not commercially available.

    2. A variable feedback capacitor around the device under test. This capacitor varies over a four-to-one range. Presumably, as each op amp is measured for settling time, the capacitor is fine tuned to optimize settling time for that particular device.

    3. A small inductor load to optimize settling.


    The power supply connections to the LT1122 must maintain a low impedance to ground over a bandwidth of 20MHz. This is especially important when driving a significant resistive or capacitive load, since all current delivered to the load comes from the power supplies. Multiple high quality bypass capacitors are recommended for each power supply line in any critical application. A 0.1µF ceramic and a 1µF electrolytic capacitor, as shown, placed as close as possible to the amplifier (with short lead lengths to power supply common) will assure adequate high frequency bypassing, in most applications.

    V+

    The LT1122’s settling time is 100% tested in the test circuit shown. No “flat top” pulse generator is required. The test circuit can be readily constructed, using commercially available ICs. Of course, standard high frequency board construction techniques should be followed. All LT1122s are measured with a constant feedback capacitor. No fine


    7

    2

    LT1122

    3 +

    4

    +

    1µF 0.1µF


    6


    +

    1µF 0.1µF

    tuning is required.

    V


    1122 TA03

    Speed Boost/Overcompensation Terminal

    Pin 8 of the LT1122 can be used to change the input stage operating current of the device. Shorting Pin 8 to the posi- tive supply (Pin 7) increases slew rate and bandwidth by about 25%, but at the expense of a reduction in phase margin by approximately 18 degrees. Unity-gain capacitive load handling decreases from typically 500pF to 100pF.

    Conversely, connecting a 15k resistor from Pin 8 to ground pulls 1mA out of Pin 8 (with V+ = 15V). This reduces slew rate and bandwidth by 25%. Phase margin and capacitive load handling improve; the latter typically increasing to 800pF.

    High Speed Operation

    When the feedback around the op amp is resistive (RF), a pole will be created with RF, the source resistance and capacitance (RS, CS), and the amplifier input capacitance (CIN ≈ 4pF). In low closed-loop gain configurations and with RS and RF in the kilohm range, this pole can create excess phase shift and even oscillation. A small capaci- tor (CF) in parallel with RF eliminates this problem. With RS (CS + CIN) = RFCF, the effect of the feedback pole is completely removed.

    CF


    RF


    As with most high speed amplifiers, care should be taken with supply decoupling, lead dress and component placement.


    RS CS

    CIN

    +

    OUTPUT


    1122 TA04


    TYPICAL APPLICATIONS

    Quartz Stabilized Oscillator With 9ppm Distortion


    –15V


    OUTPUT


    4.7k






    560k

    430pF


    50k

    DISTORTION TRIM

    4kHz JCUT


    47k


    +

    LT1122


    LT1010

    LT1004 2.5V


    4.7k 5k


    4.7k


    MOUNT IN CLOSE PROXIMITY


    OUTPUT AMPLITUDE TRIM


    15V

    LT1006

    +


    +

    10µF


    470W



    LT1122

    +


    –15V


    2k


    1/4 LTC201


    15V

    15V


    1M 560k


    Q1 2N3904


    GROUND CRYSTAL CASE


    = VACTEC VTL5C10 OR CLAIREX CLM410

    100k

    = 1N4148



    1122 TA05


    N Package

    8-Lead PDIP (Narrow .300 Inch)

    (Reference LTC DWG # 05-08-1510 Rev I)





    255 .015*

    477 0.381)

    (10.160) MAX


    8


    7


    6


    5












    1


    2


    3


    4


    . (6.

    .400*


    .300 – .325

    (7.620 – 8.255)

    .045 – .065

    (1.143 – 1.651)

    .130 .005

    (3.302 0.127)




    NOTE:


    .008 – .015

    (0.203 – 0.381)

    –.015

    .325 +.035

    –0.381

    8.255 +0.889

    INCHES

    .065

    (1.651) TYP


    .100 (2.54)

    BSC


    .120

    (3.048) MIN

    .018 .003

    (0.457 0.076)


    .020

    (0.508) MIN

    N8 REV I 0711

    1. DIMENSIONS ARE MILLIMETERS

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)


PACKAGE DESCRIPTION

.045 – .065

NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143 – 1.651) OR TIN PLATE LEADS

.200

(5.080) MAX

1 2 3 4

.220 – .310

(5.588 – 7.874)

.025

(0.635) RAD TYP

6 5

.023 – .045

(0.584 – 1.143) HALF LEAD OPTION

.045 – .068

(1.143 – 1.650) FULL LEAD OPTION

.300 BSC (7.62 BSC)

8 7

MAX

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.


J8 Package

3-Lead CERDIP (Narrow .300 Inch, Hermetic)

(Reference LTC DWG # 05-08-1110)


CORNER LEADS OPTION (4 PLCS)

.005

(0.127) MIN

.405 (10.287)


.015 – .060

(0.381 – 1.524)


.008 – .018

(0.203 – 0.457)

0° – 15°



OBSOLETE PACKAGE



For more information www.linear.com/LT1122

1122fb

.125

3.175

MIN


J8 0801

.100

(2.54) BSC

.014 – .026

(0.360 – 0.660)

11


S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610 Rev G)



.050 BSC


.045 .005

.189 – .197

(4.801 – 5.004)

NOTE 3

8 7 6 5



.245

MIN


.160 .005


.228 – .244

(5.791 – 6.197)


.150 – .157

(3.810 – 3.988)

NOTE 3


.030 .005

TYP

RECOMMENDED SOLDER PAD LAYOUT


.010 – .020 45

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)


0– 8 TYP


1 2 3 4


.053 – .069

(1.346 – 1.752)


.004 – .010

(0.101 – 0.254)



NOTE:

.016 – .050

(0.406 – 1.270)

INCHES


.014 – .019

(0.355 – 0.483) TYP


.050

(1.270) BSC

  1. DIMENSIONS IN (MILLIMETERS)

  2. DRAWING NOT TO SCALE

  3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

  4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE


SO8 REV G 0212


REVISION HISTORY (Revision history begins at Rev B)


REV

DATE

DESCRIPTION

PAGE NUMBER

B

02/14

Updated data sheet to current standards. New Order Information Table, Package Descriptions

2, 10-12



Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnecFtioornmofoitrseciirncfuoitrsmasadtieosncriwbewdwh.elrineienawr.icllonmot/inLTfr1in1g2e2on existing patent rights.

1122fb

13


TYPICAL APPLICATION


Wide-Band, Filtered, Full Wave Rectifier


200k

1%


20k


100k


200k

1%

1µF


50k


VIN


20k 1%

1%


LT1122

+

1% 1k

LT1122

+


EOUT DC


OUTPUT DC = RMS VALUE OF INPUT BANDWIDTH WITH 10VP-P INPUT = 2MHz


1122 TA06


RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT1022

High Speed Precision JFET Op Amp

23V/µs Min Slew Rate, 250µV VOS

LT1055/LT1056

Precision High Speed JFET Op Amps

16V/µs Slew Rate, 150µV VOS

LT1464

1MHz C-Load™ Stable JFET Op Amp

Capacitive Loads Up to 10nF

LTC®6244

50MHz Low Noise CMOS Op Amp

1pA IB, 100µV Max VOS, 1.5µVP-P, 0.1Hz to 10Hz Noise



14

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 950F3o5r -m7o4r1e7information www.linear.com/LT1122 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT1122

1122fb

LT 0214 REV B • PRINTED IN USA


LINEAR TECHNOLOGY CORPORATION 1991

Mouser Electronics


Authorized Distributor


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