Published February 12, 2026
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Non-Bijunctive Permutation Collapse: AltiVec vec_perm Enables Single-Cycle Attention Path Selection for LLM Inference
Description
We demonstrate that IBM AltiVec's vec_perm instruction performs non-bijective permutations — operations architecturally impossible on modern x86 (AVX-512) and ARM (NEON) SIMD units, which enforce bijective shuffles.
Key results:
- 27–96x operation advantage over x86/ARM for combined prune+amplify attention operations
- 8.81x inference speedup (16.74 to 147.54 t/s) on IBM POWER8 S824 with TinyLlama 1.1B
- 30+ permutation patterns benchmarked: hierarchical collapse, multi-head attention, sparse pruning, fractal transforms
- Hebbian learning connection: hardware-native winner-take-all path selection
Integrated into llama.cpp. POWER8's 128 vector registers and SMT8 (128 threads) make it uniquely capable for non-bijunctive AI inference.
Notes
Priority: November 2024 (initial vec_perm research), December 2025 (POWER8 integration).
Predates DeepSeek Engram (arXiv:2601.07372) by 27+ days.
Source code: https://github.com/Scottcjn/ram-coffers
Video evidence: https://youtu.be/T_o39s7r0iE (Dec 17, 2025)
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Additional details
Related works
- Is supplemented by
- Software: https://github.com/Scottcjn/ram-coffers (URL)
- References
- Publication: 10.5281/zenodo.18321905 (DOI)
- Publication: 10.5281/zenodo.18623592 (DOI)