Published June 17, 2025 | Version v1
Conference paper Open

A Novel Design Variation of a Monolithically Integrated SiC Circuit Breaker

Creators

  • 1. ROR icon Friedrich-Alexander-Universität Erlangen-Nürnberg
  • 2. ROR icon Fraunhofer Institute for Integrated Systems and Device Technology

Description

This paper provides a thorough design study of a two-pole solid-state circuit breaker (SSCB) device for 900 V DC applications supported by quasi‐static two-dimensional TCAD simulations. Building on the work of Boettcher et al. using 4H‐SiC JFET technology with monolithic integration of an n‐channel JFET (nJFET) and a p‐channel JFET (pJFET), the proposed design replaces the horizontal nJFET with a vertical structure [1-3]. This change eliminates the need for a second epitaxial layer and reduces the number of ion implantation steps from six to three, thereby simplifying the manufacturing process. Numerical TCAD simulations reveal that the novel SSCB design enables independent tuning of threshold and breakdown voltage. In the pJFET, adjustments in channel depth and doping concentration allow the blocking voltage window to be enhanced from 450 V to over 800 V, while maintaining a breakdown voltage of approx. 900 V. These findings indicate that the proposed SSCB design offers improved performance and fabrication efficiency for high voltage DC applications.

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Additional details

Funding

European Commission
FastLane – Boosting the European Value Chain for Sustainable Power Electronics 101139788

References

  • N. Boettcher and T. Erlbacher, "A Monolithically Integrated SiC Circuit Breaker," IEEE Electron Device Lett., vol. 42, no. 10, pp. 1516–1519, 2021, doi: 10.1109/LED.2021.3102935.
  • N. Boettcher, T. Takamori, K. Wada, W. Saito, S.-I. Nishizawa, and T. Erlbacher, "Fabrication Aspects and Switching Performance of a Self-Sensing 800 V SiC Circuit Breaker Device," IEEE Int. Symp. on Power Semicond. Devices and ICs (ISPSD), Vancouver, Canada, 2022, pp. 261-264, doi: 10.1109/ISPSD49238.2022.9813628.
  • N. Boettcher and T. Erlbacher, "Design Considerations on a Monolithically Integrated, Self Controlled and Regenerative 900 V SiC Circuit Breaker," IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia), Suita, Japan, 2020, pp. 1–6, doi: 10.1109/WiPDAAsia49671.2020.9360279.
  • R. Rodrigues, Y. Du, A. Antoniazzi, and P. Cairoli, "A Review of Solid-State Circuit Breakers," IEEE Trans. Power Electron., vol. 36, no. 1, pp. 364–377, 2021, doi: 10.1109/TPEL.2020.3003358.
  • N. Boettcher, T. Takamaori, K. Wada, W. Saito, S.-I. Nishizawa, and T. Erlabcher, "Short circuit performance and current limiting mode of a monolithically integrated SiC circuit breaker for DC applications up to 800 V," European Conference on Power Electronics and Applications (EPE 2022 ECCE Europe), Hannover Germany, 2022.
  • T. Takamori, K. Wada, N. Boettcher, T. Erlbacher, W. Saito, and S.-I. Nishizawa, " Adjustable Current Limiting Function with a Monolithically Integrated SiC Circuit Breaker Device," IEEE Trans. on Industry Applications, vol. 59, iss. 5, pp. 6427-6435, 2023, doi: 10.1109/TIA.2023.3288856.
  • N. Boettcher, M. Rommel, and T. Erlbacher, "Analytical Modelling of the Quasi-Static Operation of a Monolithically Integrated 4H-SiC Circuit Breaker Device," Solid State Phenomena (SSP), vol. 360, pp. 111–118, 2024, doi: 10.4028/p-EkvC4B.
  • K. Sakai, N. Boettcher, M. Szabo, S. Beuer, and M. Rommel, "Fast Estimation of the Lateral Fidelity of Ion Implantation in 4H-SiC through Calibration to JFET Transfer Characteristics in TCAD," Solid State Phenomena (SSP), vol. 358, pp. 133–140, 2024, doi: 10.4028/p-4Rj3jY.
  • J. Chang, A. K. Kapoor, L. F. Register, and S. K. Banerjee, "Analytical Model of Short-Channel Double-Gate JFETs," IEEE Trans. Electron Devices, vol. 57, no. 8, pp. 1846–1855, 2010, doi: 10.1109/TED.2010.2051193.