Published September 17, 2024 | Version v1
Preprint Open

Roadmap on Low-power Electronics

Creators

  • 1. ROR icon Rice University
  • 2. ROR icon University of California, Berkeley
  • 3. ROR icon Georgia Institute of Technology
  • 4. ROR icon Taiwan Semiconductor Manufacturing Company (United States)
  • 5. Intel Corp
  • 6. Intel Corp.
  • 7. ROR icon Harvard University
  • 8. ROR icon National Tsing Hua University
  • 9. ROR icon Taiwan Semiconductor Manufacturing Company (Taiwan)
  • 10. ROR icon University of Nebraska–Lincoln
  • 11. ROR icon National Yang Ming Chiao Tung University
  • 12. ROR icon Indian Institute of Science Bangalore
  • 13. ROR icon University of Wisconsin–Madison
  • 14. ROR icon Lawrence Berkeley National Laboratory
  • 15. ROR icon University of Arkansas at Fayetteville
  • 16. ROR icon Massachusetts Institute of Technology
  • 17. ROR icon Purdue University West Lafayette
  • 18. ROR icon University of California, Santa Barbara
  • 19. ROR icon The University of Texas at Austin
  • 20. ROR icon IMEC
  • 21. ROR icon Applied Materials (United States)
  • 22. ROR icon SLAC National Accelerator Laboratory

Description

Table of Contents
I. BROAD OVERVIEW: .................................................................................................................................. 3
A ROADMAP FOR LOW POWER COMPUTING: MATERIALS FOR A SUSTAINABLE MICROELECTRONICS FUTURE .......... 3
ENERGY EFFICIENT ELECTRONICS – RESEARCH NEEDS AND OUTLOOK ..................................................................... 8
LOW-POWER HIGH-PERFORMANCE ELECTRONICS ................................................................................................... 12
MAGNETOELECTRIC DEVICES TOWARDS LOW-ENERGY LOGIC ............................................................................... 18
NEUROMORPHIC ENGINEERING –– BIO-INSPIRED AND BIO-MIMICKING COMPUTING PLATFORMS .................. 26
COMPUTING-IN-MEMORY DESIGN AND BENCHMARK .............................................................................................. 29
II. TECHNOLOGY APPROACHES ............................................................................................................... 34
PATHWAYS TO VOLTAGE-CONTROLLED ANTIFERROMAGNETIC SPINTRONICS ........................................................... 34
THE CHALLENGES AND OPPORTUNITIES OF MAGNETO-ELECTRIC MATERIALS AND DEVICES IN MESO TECHNOLOGY
................................................................................................................................................................................. 39
MAGNETOELECTRIC MEMORY DEVICES .................................................................................................................. 44
FERROELECTRIC DEVICES FOR LOW POWER ELECTRONICS ....................................................................................... 50
COMPUTATIONAL MODELING OF FERROELECTRICS: MATERIALS, DEVICES, AND CIRCUITS ....................................... 55
COLD-SOURCE FET .................................................................................................................................................. 60
COMPUTING WITH P-BITS ........................................................................................................................................ 64
NEW STRUCTURES AND MATERIALS FOR SPINTRONICS COMPUTING ....................................................................... 68
III. PROCESSING AND METROLOGY ........................................................................................................ 71
PROCESS AND INTEGRATION CHALLENGES FOR LOW POWER ELECTRONICS .............................................................. 71
FABRICATION AND MANUFACTURING ASPECTS OF FUTURE LOW-POWER ELECTRONIC DEVICES ........................... 78
ULTRAFAST PROBES ................................................................................................................................................. 82
SYNCHROTRON-RADIATION CHARACTERIZATION OF LOW-POWER ELECTRONIC MATERIALS AND DEVICES .......... 85
ADVANCES IN TRANSMISSION ELECTRON MICROSCOPY APPLICABLE TO LOW-POWER DEVICES ............................ 88
CONCLUDING REMARKS ........................................................................................................................... 91

Files

APM23-RM-00896.pdf

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Additional details

Identifiers

Other
APL Mater. 12, 099201 (2024)

Funding

2D-EPL – Graphene Flagship 2D Experimental Pilot Line 952792
European Commission
SPIDER – Computation Systems Based on Hybrid Spin-wave–CMOS Integrated Architectures 101070417
European Commission

Dates

Accepted
2024-09-17
Accepted Manuscript

Software

Repository URL
https://pubs.aip.org/aip/apm/article/12/9/099201/3312945/Roadmap-on-low-power-electronics