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Published July 29, 2024 | Version v1.10.2
Software Open

The NEORV32 RISC-V Processor

Description

What's Changed

  • minor software framework cleanups and optimizations by @stnolting in https://github.com/stnolting/neorv32/pull/940
  • minor rtl cleanups and optimizations by @stnolting in https://github.com/stnolting/neorv32/pull/941
  • minor rtl edits by @stnolting in https://github.com/stnolting/neorv32/pull/948
  • [image_generator] add *.mif memory initialization file format by @stnolting in https://github.com/stnolting/neorv32/pull/949
  • Add option to disable SYSINFO module by @stnolting in https://github.com/stnolting/neorv32/pull/952
  • 🐛 Fix SDI "TX FIFO full" flag by @stnolting in https://github.com/stnolting/neorv32/pull/953
  • [SPI] add programmable chip-select operations by @stnolting in https://github.com/stnolting/neorv32/pull/954
  • Minor SDI edits by @stnolting in https://github.com/stnolting/neorv32/pull/955
  • 🐛 [newlib] fix broken sbrk function by @stnolting in https://github.com/stnolting/neorv32/pull/957
  • [rtl] clean-up simulation-only pragmas by @stnolting in https://github.com/stnolting/neorv32/pull/956
  • 🔒 restrict access to IO modules to privileged (machine-mode) software by @stnolting in https://github.com/stnolting/neorv32/pull/958
  • Minor SW framework edits to fix c++ warnings by @stnolting in https://github.com/stnolting/neorv32/pull/964
  • Make SYSINFO CLK writable by @stnolting in https://github.com/stnolting/neorv32/pull/966

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.10.1...v1.10.2

Notes

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Files

stnolting/neorv32-v1.10.2.zip

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