Published October 1, 2023
| Version v1
Poster
Open
Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs
Description
Building on the power of open-source RISC-V CPU designs at the register-transfer level (RTL) we evaluate the energy efficiency of the state-of-the-art open-source out-of-order (OoO) RISC-V microarchitecture (SonicBOOM) at three different design points of increasing aggressiveness. We measure the contributions of all major hardware structures and identify their power consumption. Our findings can assist microprocessor designers in making informed decisions regarding the microarchitectural trade-offs, enabling the development of more energy-efficient CPUs by focusing on the major power consumption contributors and their performance criticality.
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iiswc2023_chatzopoulos.pdf
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