A Nanoscale Look in the Channel of 4H-SiC Lateral MOSFETs

In this work the field effect mobility measured on lateral n-channel MOSFETs in 4H-SiC with Al implanted body was correlated with the interface trap density measured on MOS capacitors. The test devices were fabricated on samples subjected to different post implantation annealing conditions (i.e. with or without a protective carbon capping layer) and to an identical post-oxidation annealing in N2O. Despite the improved interfacial morphology, a reduction of the peak mobility (from 40 to 24 cm2V-1s-1) was observed using the carbon capping layer. An increase in the density of interface traps was consistently found. Nanoscale measurements of the active dopant concentration in the SiC channel region by cross-sectional scanning capacitance microscopy showed an higher compensation of p-type SiC for the sample processed without the capping layer, which indicates a more efficient incorporation of nitrogen at the SiO2/SiC interface.


Introduction
Despite the excellent physical properties which make silicon carbide (4H-SiC) the most prominent material for future power electronics devices, the available MOSFETs devices have not yet reached the expected optimal performances, due to some scientific issues related to the SiO 2 /SiC interface [1,2]. In particular, while post-oxide-deposition-annealings (POA) of the gate oxide in nitrogen-rich ambient (NO, N 2 O) can be efficient to obtain adequate mobility values in the range of 30-50 cm 2 V -1 s -1 [3][4][5][6], the role of nitrogen remains object of scientific debate. In particular, recent findings suggested that nitrogen atoms are not only embedded in the gate oxide layer but also incorporated in the SiC substrate and introduce shallow donors responsible for the increased conductivity of the MOSFET channel [7,8].
A further issue in vertical 4H-SiC MOSFETs is that the selective p-type doping of the channel region is obtained by Al-ion-implantation followed by high-temperature annealing processes for electrical activation of the implanted-species [9]. Under these annealing conditions, the morphology of the channel region can be severely degraded. Hence, to alleviate this problem the surface can be protected during the post implantation annealing (PIA) using a carbon capping layer [10]. While Haney et al. [11] observed that the use of the capping layer does not significantly affect the channel mobility in a wide PIA range (1200-1800°C), Naik et al. [12] recently reported a reduction of the mobility when the devices are processed with a capping layer.
Recently, Frazzetto et al. observed that Al-implanted lateral MOSFETs processed without a cap during PIA show a higher channel mobility with respect to devices fabricated using a protecting carbon capping layer [13]. In both cases, the temperature dependence of mobility indicated Coulomb scattering by interface charges as the major limitation to carrier transport in the inversion channel. By modeling this temperature behavior, a lower interface charge density was estimated in the case of a rougher interface (no cap) with respect to the smoother one (cap).
In this work the channel mobility measured on 4H-SiC n-channel MOSFETs was correlated with the interface trap density (D it ) measured on MOS capacitors fabricated on n-type regions of the same wafers. The samples were subjected to a post implantation annealing with or without a capping layer, respectively, and to an identical POA in N 2 O. These macroscopic measurements showed an higher mobility and lower D it on the samples processed without cap. Nanoscale measurements of the active doping concentration in the SiC channel region by cross-sectional Scanning Capacitance Microscopy (SCM) showed an higher compensation of the p-type body for the sample processed without cap, which indicates a more efficient incorporation of nitrogen at SiO 2 /SiC interface.

Experimental
The starting material was a n-type (0001) 4H-SiC epitaxial layer 4° off-axis cutting angle toward the <11-20> direction, 8µm-thick with a doping concentration of 1×10 16 cm -3 , grown on heavily doped n + -type 3-inches 4H-SiC substrate. Lateral n-channel MOSFETs (with L= 40 µm and W= 16 µm) were fabricated to determine the field effect channel mobility µ FE . Al implantation was used to create the p-type body region, while the n-type source and drain regions were doped by heavy P-implantation. The implantations were followed by two different doping activation annealings both at 1650°C, either with or without a protective carbon capping layer on the sample surface. AFM analyses (not reported) showed a surface with a significant step bunching in the sample annealed without the cap layer, resulting in a RMS roughness of 1.75 nm, whereas a nearly flat surface (RMS= 0.36 nm) was obtained using the protective cap. For both samples similar values of the roughness have been obtained in the implanted body and un-implanted areas. Then, a 30 nm-thick SiO 2 layer was deposited by plasma enhanced chemical vapor deposition as gate dielectric, followed by a POA at 1150°C in a N 2 O. Nickel silicide was used for Ohmic contacts.. The interface states density D it has been estimated using the conductance method on Metal-Oxide-Semiconductor (MOS) capacitors fabricated on the same wafers of the investigated MOSFETs on the non-implanted n-type regions.
The SCM has been used here to carry out capacitance variation applying an ac bias between the tip and the sample in the 1-10 V peak-to-peak range at 100 kHz; the resonator frequency was in the range 1.0±0.1 GHz [14] mounted on an atomic force microscope Digital Instrument D3100 equipped with the nanoscope V controller.
The capacitance voltage (C-V) and the current voltage (I-V) characteristics of the devices were measured in a Karl-Suss probe station using a Agilent B1500A parameter analyzer.

Results and Discussion
In Fig.1 the drain current (I D ) vs. the drain voltage (V DS ) characteristics at different gate bias (V GS ) values are reported for the MOSFETs processed with and without the protective capping layer. For the same gate bias, a higher drain current is measured in MOSFETs processed without capping layer. From the transfer characteristics in the linear region (at V DS = 200mV) of the I D -V DS curves, the field-effect channel mobility µ FE was determined. The values of the peak mobility determined at room temperature were 40 and 24 cm 2 V -1 s -1 , for the samples processed without and with capping layer, respectively. The rougher sample posses the higher mobility [13].
The fixed charge density (N t ) and the density of interface traps (D it ) were extracted from capacitance voltage (C-V) and conductance measurements on the MOS capacitors. Fig. 2 reports the energy distribution of the interface traps for the two samples. As can be seen, a reduction of the D it value close to the conduction band edge of a factor two was observed in the sample annealed without cap. Furthermore, in the inset in Fig.2, the measured C-V characteristics for the two samples are compared to the calculated ideal C-V curve. The fixed charge density N t estimated from the flat band voltage shift are cm for the samples processed with and without cap, respectively. Indeed, the results demonstrated that both in the MOSFETs [13] and in the MOS capacitors, the total amount of trapped charges at the interface is lower in the sample processed without the carbon capping layer. Recently, Rozen et al. showed an clear correlation between channel mobility and the total interface trapped charge in 4H-SiC MOSFETs [4]. Fig.3 shows how our experimental data of mobility µ FE and total trapped charge densities for the samples processed with and without cap perfectly follow this general trend. Clearly, the above electrical characterization of MOS capacitors revealed that nitrogen treatment leads to a more efficient passivation of interface traps in the sample processed without cap than in the sample processed by cap. Beside interface state passivation, nitrogen incorporation may also affect the doping of the sub-interface SiC region [7]. High resolution scanning capacitance microscopy across the channel region was applied to get a deeper insight into this aspect. Fig. 4 shows the SCM signal vs. depth profiles collected both on the sample processed without and with capping layer in the 40 nm 4H-SiC region under the SiO 2 /SiC interface. The two profiles are almost  ) coincident for depths higher than ∼20 nm, while they are significantly different in the SiC interfacial region up to ∼15 nm, where the SCM signal in the sample treated without capping layer is lower than in the sample protected with the capping layer. A lower SCM signal indicates a higher compensation of Al acceptors, which is consistent with a more efficient incorporation of substitutional nitrogen atoms in SiC. The peculiar morphology of the annealed SiO 2 /4H-SiC interface in the sample processes without the capping layer can be invoked to explain the better nitrogen incorporation during POA, leading to a more efficient passivation of interface traps and to a higher compensation of interfacial SiC. In fact, for a surface with step bunching, SiO 2 /SiC interface is not only formed on the basal plane (0001), but a significant fraction of the interface area is formed on the (11-2n) facets [15]. Accordingly, a different efficiency of nitrogen incorporation on the (0001) and (11-2n) facets during the POA process could explain the different D it values in the two samples. This observation is coherent with experimental evidences, indicating a lower D it at the SiO 2 /SiC interface with (11)(12)(13)(14)(15)(16)(17)(18)(19)(20) non polar face [16] and a correlation between the amount of incorporated nitrogen with the trend of D it and µ FE in 4H-SiC MOSFETs [4].

Summary
In this paper, a nanoscale structural and electrical characterization of SiO 2 /4H-SiC interfaces within lateral implanted MOSFETs is reported. In particular, irrespective of the interface roughness originating by post-implantation annealing, lower values of D it were measured in the sample with a higher channel mobility and higher surface roughness. A nanoscale SCM analysis showed a localized preferential n-type doping concentration at the SiO 2 /4H-SiC interface correlated with a preferential nitrogen incorporation during the POA on the peculiar morphology of the annealed 4H-SiC surfaces