10.35940/ijrte.A2739.079220
https://zenodo.org/records/5851972
oai:zenodo.org:5851972
K. Ravi Teja
K. Ravi Teja
Department of EEE, Raghu Institute of Technology, Visakhapatnam, India
D.V.N. Anant
D.V.N. Anant
Department of EEE, Raghu Institute of Technology, Visakhapatnam, India
G. Joga Rao
G. Joga Rao
Department of EEE, Raghu Institute of Technology, Visakhapatnam, India
Modeling and Design of Cascaded h-bridge type multi-level Inverters up to Thirty-one level for the Reduction and Performance Improvement
Zenodo
2020
Multi-level Inverters, Sinusoidal pulse width modulation, cascaded H-bridge inverter, total harmonic distortion, selective harmonic reduction
Blue Eyes Intelligence Engineering and Sciences Publication(BEIESP)
Blue Eyes Intelligence Engineering and Sciences Publication(BEIESP)
Publisher
2020-07-30
eng
2277-3878
Creative Commons Attribution 4.0 International
Multilevel inverter (MLI) becomes more popular in high voltage DC (HVDC) applications, power electronic converters and drives. This paper describes the simulation of single phase multilevel cascaded H-bridge inverter. Simulation of three level, five level, thirteen level, fifteen, twenty-one, thirty-one level inverters are done in MATLAB/ Simulink. The switching schemes, and topologies are discussed in detail here up to thirty-one levels. This paper discusses the voltage level to achieve sinusoidal waveform & compare different voltage level by increasing the level through simulation. The closed loop space-vector based pulse width modulation technique is adopted for effective controlling and lower harmonic voltage conversion. The comparative results are presented for multilevel inverter up-to thirty-one level which shows the total harmonic distortion (THD) is decreased as the number of voltage level rises.