Presentation Open Access

Complete activation scheme for IP design protection

Brice Colombier; Ugo Mureddu; Marek Laban; Oto Petura; Lilian Bossuet; Viktor Fischer

DataCite XML Export

<?xml version='1.0' encoding='utf-8'?>
<resource xmlns:xsi="" xmlns="" xsi:schemaLocation="">
  <identifier identifierType="DOI">10.5281/zenodo.574260</identifier>
      <creatorName>Brice Colombier</creatorName>
      <affiliation>Hubert Curien Laboratory, University of Lyon</affiliation>
      <creatorName>Ugo Mureddu</creatorName>
      <affiliation>Hubert Curien Laboratory, University of Lyon</affiliation>
      <creatorName>Marek Laban</creatorName>
      <affiliation>Department of Electronics and Multimedia Communications, Technical University of Kosice</affiliation>
      <creatorName>Oto Petura</creatorName>
      <affiliation>Hubert Curien Laboratory, University of Lyon</affiliation>
      <creatorName>Lilian Bossuet</creatorName>
      <affiliation>Hubert Curien Laboratory, University of Lyon</affiliation>
      <creatorName>Viktor Fischer</creatorName>
      <affiliation>Hubert Curien Laboratory, University of Lyon</affiliation>
    <title>Complete activation scheme for IP design protection</title>
    <date dateType="Issued">2017-05-01</date>
  <resourceType resourceTypeGeneral="Text">Presentation</resourceType>
    <alternateIdentifier alternateIdentifierType="url"></alternateIdentifier>
    <relatedIdentifier relatedIdentifierType="URL" relationType="IsPartOf"></relatedIdentifier>
    <rights rightsURI="">Creative Commons Attribution Non Commercial 4.0 International</rights>
    <rights rightsURI="info:eu-repo/semantics/openAccess">Open Access</rights>
    <description descriptionType="Abstract">&lt;p&gt;Intellectual Property (IP) illegal copying is a major threat in today’s integrated circuits industry which is massively based on a design-and-reuse paradigm. In order to fight this threat, a designer must track how many times an IP has been instantiated. Moreover, illegal copies of an IP must be unusable. We propose a hardware/software scheme which allows a designer to remotely activate an IP with minimal area overhead. The software modifies the IP efficiently and can handle very large netlists. Unique identification of hardware instances is achieved by integrating a TERO-PUF along with a lightweight key reconciliation module. A cryptographic core guarantees security and triggers a logic locking/masking module which makes the IP unusable unless the correct encrypted activation word is applied. The hardware side is implemented on several FPGAs.&lt;/p&gt;</description>
      <funderName>European Commission</funderName>
      <funderIdentifier funderIdentifierType="Crossref Funder ID">10.13039/501100000780</funderIdentifier>
      <awardNumber awardURI="info:eu-repo/grantAgreement/EC/H2020/644052/">644052</awardNumber>
All versions This version
Views 66
Downloads 22
Data volume 328.1 kB328.1 kB
Unique views 66
Unique downloads 22


Cite as