571740
doi
10.5281/zenodo.571740
oai:zenodo.org:571740
user-hector
user-eu
Filippo Melzani
STMicroelectronics Italy
Vittorio Zaccaria
Politecnico di Milano
Symbolic Analysis of Higher-Order Side Channel Countermeasures
Elia Bisi
‎University of Warwick
doi:10.1109/TC.2016.2635650
info:eu-repo/semantics/openAccess
Creative Commons Attribution Non Commercial 4.0 International
https://creativecommons.org/licenses/by-nc/4.0/legalcode
Embedded systems security
cryptographic implementations
side channel analysis
higher order differential analysis
<p>In this paper, we deal with the problem of efficiently assessing the higher order vulnerability of a hardware cryptographic circuit. Our main concern is to provide methods that allow a circuit designer to detect early in the design cycle if the implementation of a Boolean-additive masking countermeasure does not hold up to the required protection order. To achieve this goal, we promote the search for vulnerabilities from a statistical problem to a purely symbolical one and then provide a method for reasoning about this new symbolical interpretation. Eventually we show, with a synthetic example, how the proposed conceptual tool can be used for exploring the vulnerability space of a cryptographic primitive.</p>
Zenodo
2016-12-05
info:eu-repo/semantics/article
800089
user-hector
user-eu
award_title=HARDWARE ENABLED CRYPTO AND RANDOMNESS; award_number=644052; award_identifiers_scheme=url; award_identifiers_identifier=https://cordis.europa.eu/projects/644052; funder_id=00k4n6c32; funder_name=European Commission;
1579538632.169772
521983
md5:b01cedae0009e1822709ddd7c790cd2a
https://zenodo.org/records/571740/files/HECTOR-Symbolic-Analysis-of-Higher-Order-author-version-2017.pdf
public
10.1109/TC.2016.2635650
Is previous version of
doi
isVersionOf
doi
IEEE Transactions on Computers
2016-12-05