Journal article Open Access

Implementation of GA with Position Based Crossover-PX Technique for Size Optimization of BDD Mapped Adder Circuits

M. Balal Siddiqui; M. T. Beg; S. N. Ahmad


MARC21 XML Export

<?xml version='1.0' encoding='UTF-8'?>
<record xmlns="http://www.loc.gov/MARC21/slim">
  <leader>00000nam##2200000uu#4500</leader>
  <datafield tag="041" ind1=" " ind2=" ">
    <subfield code="a">eng</subfield>
  </datafield>
  <datafield tag="653" ind1=" " ind2=" ">
    <subfield code="a">Adder, BDD, Binary Decision Diagram, Optimization, Variable Ordering.</subfield>
  </datafield>
  <controlfield tag="005">20211026134845.0</controlfield>
  <controlfield tag="001">5595679</controlfield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">Department of Electronics &amp; Communication  Engineering, Jamia Millia Islamia, New Delhi, India</subfield>
    <subfield code="a">M. T. Beg</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">Department of Electronics &amp; Communication  Engineering, Jamia Millia Islamia, New Delhi, India</subfield>
    <subfield code="a">S. N. Ahmad</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">Publisher</subfield>
    <subfield code="4">spn</subfield>
    <subfield code="a">Blue Eyes Intelligence Engineering  &amp; Sciences Publication (BEIESP)</subfield>
  </datafield>
  <datafield tag="856" ind1="4" ind2=" ">
    <subfield code="s">493730</subfield>
    <subfield code="z">md5:9fbcdbf2a9a6e6ef13887c1169ae5ea2</subfield>
    <subfield code="u">https://zenodo.org/record/5595679/files/C6358029320.pdf</subfield>
  </datafield>
  <datafield tag="542" ind1=" " ind2=" ">
    <subfield code="l">open</subfield>
  </datafield>
  <datafield tag="260" ind1=" " ind2=" ">
    <subfield code="c">2020-02-29</subfield>
  </datafield>
  <datafield tag="909" ind1="C" ind2="O">
    <subfield code="p">openaire</subfield>
    <subfield code="o">oai:zenodo.org:5595679</subfield>
  </datafield>
  <datafield tag="909" ind1="C" ind2="4">
    <subfield code="c">4215-4218</subfield>
    <subfield code="n">3</subfield>
    <subfield code="p">International Journal of Engineering and Advanced Technology (IJEAT)</subfield>
    <subfield code="v">9</subfield>
  </datafield>
  <datafield tag="100" ind1=" " ind2=" ">
    <subfield code="u">Department of Electronics &amp; Communication  Engineering, Jamia Millia Islamia, New Delhi, India</subfield>
    <subfield code="a">M. Balal Siddiqui</subfield>
  </datafield>
  <datafield tag="245" ind1=" " ind2=" ">
    <subfield code="a">Implementation of GA with Position Based Crossover-PX Technique for Size Optimization  of BDD Mapped Adder Circuits</subfield>
  </datafield>
  <datafield tag="540" ind1=" " ind2=" ">
    <subfield code="u">https://creativecommons.org/licenses/by/4.0/legalcode</subfield>
    <subfield code="a">Creative Commons Attribution 4.0 International</subfield>
  </datafield>
  <datafield tag="650" ind1="1" ind2="7">
    <subfield code="a">cc-by</subfield>
    <subfield code="2">opendefinition.org</subfield>
  </datafield>
  <datafield tag="650" ind1="1" ind2=" ">
    <subfield code="a">ISSN</subfield>
    <subfield code="0">(issn)2249-8958</subfield>
  </datafield>
  <datafield tag="650" ind1="1" ind2=" ">
    <subfield code="a">Retrieval Number</subfield>
    <subfield code="0">(handle)C6358029320/2020©BEIESP</subfield>
  </datafield>
  <datafield tag="520" ind1=" " ind2=" ">
    <subfield code="a">&lt;p&gt;Binary Decision Diagrams or BDD are data structure used to represent single and multi-output digital circuits. BDD mapped adder circuits are used to represent different adder functions in a digital system. Optimization of adder circuits are done by optimizing the corresponding BDDs. In this work the optimization of BDD Mapped adder circuits are proposed by using genetic algorithm with position-based crossover-PX technique. The main feature of position-based crossover technique is that it is suitable for order-based solution formation. We compared our result with other existing variable order method available in BDD manipulation tool BuDDy-2.4. The result is obtained for Full Adder circuits of 1 to 8-bit size. Experimental results show the improvement of the proposed work over other techniques. The result is quite significant for large circuits i.e. full adder circuit having larger bit size.&lt;/p&gt;</subfield>
  </datafield>
  <datafield tag="773" ind1=" " ind2=" ">
    <subfield code="n">issn</subfield>
    <subfield code="i">isCitedBy</subfield>
    <subfield code="a">2249-8958</subfield>
  </datafield>
  <datafield tag="024" ind1=" " ind2=" ">
    <subfield code="a">10.35940/ijeat.C6358.029320</subfield>
    <subfield code="2">doi</subfield>
  </datafield>
  <datafield tag="980" ind1=" " ind2=" ">
    <subfield code="a">publication</subfield>
    <subfield code="b">article</subfield>
  </datafield>
</record>
13
16
views
downloads
Views 13
Downloads 16
Data volume 7.9 MB
Unique views 13
Unique downloads 16

Share

Cite as