February 29, 2020 Journal article Open Access

M. Balal Siddiqui; M. T. Beg; S. N. Ahmad

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  <identifier identifierType="URL">https://zenodo.org/record/5595679</identifier>
  <creators>
    <creator>
      <creatorName>M. Balal Siddiqui</creatorName>
      <affiliation>Department of Electronics &amp; Communication  Engineering, Jamia Millia Islamia, New Delhi, India</affiliation>
    </creator>
    <creator>
      <creatorName>M. T. Beg</creatorName>
      <affiliation>Department of Electronics &amp; Communication  Engineering, Jamia Millia Islamia, New Delhi, India</affiliation>
    </creator>
    <creator>
      <creatorName>S. N. Ahmad</creatorName>
      <affiliation>Department of Electronics &amp; Communication  Engineering, Jamia Millia Islamia, New Delhi, India</affiliation>
    </creator>
  </creators>
  <titles>
    <title>Implementation of GA with Position Based Crossover-PX Technique for Size Optimization  of BDD Mapped Adder Circuits</title>
  </titles>
  <publisher>Zenodo</publisher>
  <publicationYear>2020</publicationYear>
  <subjects>
    <subject>Adder, BDD, Binary Decision Diagram, Optimization, Variable Ordering.</subject>
    <subject subjectScheme="issn">2249-8958</subject>
    <subject subjectScheme="handle">C6358029320/2020©BEIESP</subject>
  </subjects>
  <contributors>
    <contributor contributorType="Sponsor">
      <contributorName>Blue Eyes Intelligence Engineering  &amp; Sciences Publication (BEIESP)</contributorName>
      <affiliation>Publisher</affiliation>
    </contributor>
  </contributors>
  <dates>
    <date dateType="Issued">2020-02-29</date>
  </dates>
  <language>en</language>
  <resourceType resourceTypeGeneral="JournalArticle"/>
  <alternateIdentifiers>
    <alternateIdentifier alternateIdentifierType="url">https://zenodo.org/record/5595679</alternateIdentifier>
  </alternateIdentifiers>
  <relatedIdentifiers>
    <relatedIdentifier relatedIdentifierType="ISSN" relationType="IsCitedBy" resourceTypeGeneral="JournalArticle">2249-8958</relatedIdentifier>
    <relatedIdentifier relatedIdentifierType="DOI" relationType="IsIdenticalTo">10.35940/ijeat.C6358.029320</relatedIdentifier>
  </relatedIdentifiers>
  <rightsList>
    <rights rightsURI="https://creativecommons.org/licenses/by/4.0/legalcode">Creative Commons Attribution 4.0 International</rights>
    <rights rightsURI="info:eu-repo/semantics/openAccess">Open Access</rights>
  </rightsList>
  <descriptions>
    <description descriptionType="Abstract">&lt;p&gt;Binary Decision Diagrams or BDD are data structure used to represent single and multi-output digital circuits. BDD mapped adder circuits are used to represent different adder functions in a digital system. Optimization of adder circuits are done by optimizing the corresponding BDDs. In this work the optimization of BDD Mapped adder circuits are proposed by using genetic algorithm with position-based crossover-PX technique. The main feature of position-based crossover technique is that it is suitable for order-based solution formation. We compared our result with other existing variable order method available in BDD manipulation tool BuDDy-2.4. The result is obtained for Full Adder circuits of 1 to 8-bit size. Experimental results show the improvement of the proposed work over other techniques. The result is quite significant for large circuits i.e. full adder circuit having larger bit size.&lt;/p&gt;</description>
  </descriptions>
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