Published June 7, 2015
| Version v1
Conference paper
Open
Resource usage templates and signatures for COTS multicore processors
Creators
- 1. Universitat Politècnica de Catalunya, Spain and Barcelona Supercomputing Center, Spain
- 2. Barcelona Supercomputing Center, Spain
- 3. University of Padua, Italy
- 4. Barcelona Supercomputing Center, Spain and Spanish National Research Council (IIIA-CSIC), Spain
Description
Upper bounding the execution time of tasks running on multicore processors is a hard challenge. This is especially so with commercial-off-the-shelf (COTS) hardware that conceals its internal operation. The main difficulty stems from the contention effects on access to hardware shared resources (e.g., buses) which cause task's timing behavior to depend on the load that co-runner tasks place on them. This dependence reduces time composability and constrains incremental verification. In this paper we introduce the concepts of resource-usage signatures and templates, to abstract the potential contention caused and incurred by tasks running on a multicore. We propose an approach that employs resource-usage signatures and templates to enable the analysis of individual tasks largely in isolation, with low integration costs, producing execution time estimates per task that are easily composable throughout the whole system integration process. We evaluate the proposal on a 4-core NGMP-like multicore architecture.
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Additional details
Related works
- Is part of
- 10.1145/2744769.2744901 (DOI)
- 978-1-4503-3520-1 (ISBN)
- Is supplement to
- 10.5281/zenodo.60438 (DOI)
Funding
References
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