Conference paper Open Access

Iterating Von Neumann’s Post-Processing under Hardware Constraints

Rozic, Vladimir; Yang, Bohan; Dehaene, Wim; Verbauwhede, Ingrid


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    "description": "<p>In this paper we present a design methodology and hardware implementations of lightweight post-processing modules for debiasing random bit sequences. This work is based on the iterated Von Neumann procedure (IVN). We present a method to maximize the efficiency of IVN for applications with area and throughput constraints. The resulting hardware modules can be applied for post-processing raw numbers in random number generators.<br>\n\u00a0</p>", 
    "license": {
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    "title": "Iterating Von Neumann\u2019s Post-Processing under Hardware Constraints", 
    "notes": "H2020 644052 / HECTOR", 
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    "publication_date": "2016-05-03", 
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        "affiliation": "KU Leuven", 
        "name": "Rozic, Vladimir"
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        "name": "Yang, Bohan"
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