A BEOL Compatible, 2-Terminals, Ferroelectric Analog Non-Volatile Memory

A Ferroelectric Analog Non-Volatile Memory based on a WOx electrode and ferroelectric HfZrO$_4$ layer is fabricated at a low thermal budget (~375$^\circ$C), enabling BEOL processes and CMOS integration. The devices show suitable properties for integration in crossbar arrays and neural network inference: analog potentiation/depression with constant field or constant pulse width schemes, cycle to cycle and device to device variation<10%, ON/OFF ratio up to 10 and good linearity. The physical mechanisms behind the resistive switching and conduction mechanisms are discussed.


I. INTRODUCTION
Bio-inspired analog hardware accelerators performing the synaptic function in neuromorphic computing are being developed, based on memristors: trimmable resistances from which the value can vary reversibly upon an external stimulus, in a persistent way.The choice of ferroelectric materials is attractive as the polarization can be changed by the application of an external electric field and is remnant.The growth of epitaxial thin films allowed the demonstration of ferroelectric memristors [1], however, integrating such films on CMOS remains challenging and expensive, requiring flip-chip or wafer bonding techniques.The discovery of ferroelectricity in hafnium oxide enabled the demonstration of ferroelectric memristors in the Front-and Back-End-Of-Line (BEOL) [2], [3] through techniques allowing crystallization in the ferroelectric phase with a low thermal budget [4].Ferroelectric Tunnel Junctions (FTJs) possess only two terminals and are a desirable approach for crossbar array fabrication.An FTJ consists of a ferroelectric layer separating two different electrodes.Upon polarization reversal, the energy profile and thus the transport probability of a carrier across the junction is modified.Their fabrication is challenging as the ferroelectric layer must be thick enough to stabilize ferroelectricity in multiple configurations, but thin enough to allow electric conduction.In this work, we use an oxide semiconducting electrode, WOx.We demonstrate the fabrication of an FTJ showing analog resistive switching in the BEOL with low thermal budget (~375˚C) and low-cost materials (Hf, Zr, W).

II. BEOL COMPATIBLE FABRICATION
An asymmetric Metal (M) / Ferroelectric (FE) / semiconductor (SC) / Metal (M) (Fig. 1) layer stack was deposited by Atomic Layer Deposition at 300-350˚C.The semiconducting layer is WO3-x, a metal oxide with n-type semi-conducting properties due to the presence of oxygen vacancies.The ferroelectric layer is HfZrO4 (HZO), it is capped by metallic TiN to favor the crystallization of HZO in the ferroelectric phase [5] by a ms-flash lamp annealing (ms-FLA) technique: the sample is heated to a moderate temperature of 375˚C, then a 20 ms long flash of 70 J/cm 2 in energy is applied to the surface.The Id-Vg characteristics of Pand N-MOS (130 nm) test transistors were not affected by such treatment.W is sputtered on-top and capacitors are then defined by reactive-ion etching of the top electrode (W/TiN).Here, we demonstrate for the first time the fabrication of HZO, ferroelectric, analog non-volatile memories at a thermal budget of ~375˚C.X-Ray Diffraction (Fig. 1) confirm the crystallization in the orthorhombic (o-) or tetragonal (t-) phase of HZO, the absence of monoclinic phase, the polycrystalline nature of the films.Junctions do not require wake-up and Dynamic Hysteresis Measurement (DHM) on a 120 µm diameter junction shows that no breakdown is observed after 10 10 switching cycles with triangular pulses of +/-2V.

III. A FERROELECTRIC MEMRISTOR
In this section the resistive memory characteristics of the junction are described.First, a pulse of amplitude Vwrite and duration twidth is applied across the junction to align the ferroelectric domains with the applied field.The polarization screening in the M and SC layers occurs over a distance inversely proportional to the carrier density in these two layers, and hence, the energy profile as well as the conductance of the junction is modified.Subsequently, an I(V) sweep in the range +/-300 mV measures the resistance.

A. DC characterization
The device characteristics are highly nonlinear with voltage.The ON/OFF, defined as the ratio of the currents measured in the Low Resistive State, LRS (after applying -1.6 V) and the High Resistive State, HRS (after applying +2.4 V) is >10 for Vread=100 mV.The LRS, HRS and intermediate states can be reversibly reached and in a remnant way.In the LRS, the polarization points towards the SC (in accumulation mode) and a large coercive field (1.6 MV.cm -1 ) is necessary to switch the ferroelectric domains.In the HRS, the ferroelectric field-effect depletes the SC layer.The poor screening in FE/SC junctions, when the SC is depleted, is usually responsible for the destabilization of the polarization in FTJs.In this work, the metal oxide electrode plays a role in the stabilization of the HRS and allows a large memory window of 1.4 V, as discussed in §IV.A.

B. Pulse characterization
Weight update potentiation (depression) is then demonstrated by sending sequences of negative (positive) pulses of 50 µs and increasing amplitude (Fig. 2), showing good repeatability from cycle to cycle.
The memristors also demonstrate constant field weight update, by increasing the pulse duration (Fig. 3).Contrary to previous work [2] the ON/OFF is not drastically reduced compared to the increasing amplitude scheme.In Fig. 4 the normalized conductance is fitted by a σ0(1-e -Count/A ) function were A is the fit parameter [6].Interestingly linearity is opposite for both schemes (sharp potentiation at constant Vampl vs sharp depression at constant twidth) showing that symmetry can be tuned using a hybrid scheme by increasing both pulse width and amplitude.

C. Potential integration in a cross-bar array for inference
On top of the low-thermal budget fabrication, the devices show a retention of >10 days and are stable against heating >45˚C (Fig. 5).They show a small device to device variation (σ=0.1 in the HRS) and scalability: current density (J) characteristics overlap for capacitors of various sizes.Thanks to the high resistance, the energy of the pulse during writing is < 1 pJ.The non-linearity is high (I(V)/I(V/2)>40 for V>0.5 V) which allows built-in self-selection (limited sneak paths in absence of selectors) in a writing scheme were Vwrite/2 is applied to unselected rows [7].The integration of the junctions in crossbars is limited by their high resistance: extrapolation to sub-micrometric devices leads to currents <pA.This is circumvented by reducing the HZO thickness: in a related work a 10 4 higher conductance in the HRS is obtained with 4.5 nm thick HZO based junctions.

IV. DISCUSSION
In order to provide guidelines for the optimization of the ferroelectric memristors for crossbar array fabrication, the physical mechanisms controlling the memory (in particular the stability of the HRS), the conductance and the nonlinearity (conduction mechanisms) are explored.

A. Role of the metal oxide electrode
The stability of the polarization in the HRS and the dependence of the resistive switching on the pulse duration are discussed in terms of oxygen exchange between the ferroelectric and the metal oxide layer.Changing the metal oxide thickness while keeping HZO thickness constant has minor effect on the HRS and LRS, showing that the resistance is dominated by the HZO layer and indicating that the resistive switching is mainly due to ferroelectric switching.However, the dependence of the resistive switching on the pulse duration (Fig. 3) indicates that other than purely ferroelectric effects play a role in the switching mechanism.We anticipate a resistance change through field driven migration of oxygen from the SC to the FE layer, allowing oxygen vacancies in the SC layer able to screen the polarization.This is supported by the observation of a strongly reduced ON/OFF when using TiO2 as SC (allowing little oxygen exchange).

B. Conduction mechanisms
Devices are tested under temperature cycling (Fig. 5).The ON/OFF is not affected by the temperature, but the resistance decreases upon heating.Such dependence and simulations discard direct tunneling as being the dominant mechanism in these junctions.Log(J/V) is constant at small fields (Ohmic regime, 0~100 mV) and linear with V 0.5 at higher fields (Poole-Frenkel regime, 200~300 mV).Physical parameters are extracted from the variation of the parameters of the linear regressions with the temperature.In the Poole-Frenkel regime and in the Ohmic regime a small energy barrier of 0.1~0.2eV is measured, pointing toward conduction via oxygen vacancies in the HZO layer.The oxygen content in HZO is controlled by the growth and annealing conditions and is an additional knob (with the thickness) to tune the conductance of the junctions.

V. CONCLUSION
The ferroelectric analog non-volatile memory technology presented in this works shows characteristics comparable to other technologies (Table 1).The low-thermal budget process, makes it a promising candidate for the fabrication of crossbar arrays for deep-neural networks accelerators.The devices show analog potentiation/depression with constant field or constant pulse width schemes, which makes them especially interesting for inference where such schemes are easily implemented.This first generation of BEOL, ferroelectric 2terminals memristors shows non-linearity of (1.9/-4), ON/OFF ratio up to 10 and cycle to cycle and device to device variation <10%.The future optimization of the devices (with thinner HZO layer) is led by the understanding of the memory and conduction mechanisms, with focus on oxygen exchange between the electrode and the ferroelectric layer as well as conduction mediated by oxygen vacancies though the dielectric.