10.1109/ISVLSI49217.2020.00076
https://zenodo.org/records/4545664
oai:zenodo.org:4545664
Rodriguez Condia, Josie Esteban
Josie Esteban
Rodriguez Condia
0000-0001-5957-5624
Politecnico di Torino
Goncalves, Marcio M.
Marcio M.
Goncalves
Federal University of Rio Grande do Sul
Azambuja, Jose Rodrigo
Jose Rodrigo
Azambuja
Federal University of Rio Grande do Sul
Sonza Reorda, Matteo
Matteo
Sonza Reorda
Politecnico di Torino
Sterpone, Luca
Luca
Sterpone
Politecnico di Torino
Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets
Zenodo
2020
Fault tolerance
graphics processing units
pipeline registers
single event upsets
2020-08-04
eng
https://zenodo.org/communities/eu
1
Creative Commons Attribution 4.0 International
Open access version of the manuscript presented at the ISVLSI2020 conference
European Commission
10.13039/501100000780
722325
Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems Design