Conference paper Open Access

A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs

Rodriguez Condia, Josie Esteban; Narducci, Pierpaolo; Sonza Reorda, Matteo; Sterpone, Luca


JSON-LD (schema.org) Export

{
  "inLanguage": {
    "alternateName": "eng", 
    "@type": "Language", 
    "name": "English"
  }, 
  "description": "<p>Open access version of the manuscript presented at DDECS2020 conference</p>", 
  "license": "https://creativecommons.org/licenses/by/4.0/legalcode", 
  "creator": [
    {
      "affiliation": "Politecnico di Torino", 
      "@id": "https://orcid.org/0000-0001-5957-5624", 
      "@type": "Person", 
      "name": "Rodriguez Condia, Josie Esteban"
    }, 
    {
      "affiliation": "Politecnico di Torino", 
      "@type": "Person", 
      "name": "Narducci, Pierpaolo"
    }, 
    {
      "affiliation": "Politecnico di Torino", 
      "@type": "Person", 
      "name": "Sonza Reorda, Matteo"
    }, 
    {
      "affiliation": "Politecnico di Torino", 
      "@type": "Person", 
      "name": "Sterpone, Luca"
    }
  ], 
  "headline": "A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs", 
  "image": "https://zenodo.org/static/img/logos/zenodo-gradient-round.svg", 
  "datePublished": "2020-05-19", 
  "url": "https://zenodo.org/record/4545632", 
  "version": "1", 
  "keywords": [
    "Duplication with Comparison (DWC)", 
    "Fault detection", 
    "General Purpose Graphics Processing Units (GPGPUs)", 
    "Graphics Processors"
  ], 
  "@context": "https://schema.org/", 
  "identifier": "https://doi.org/10.1109/DDECS50862.2020.9095665", 
  "@id": "https://doi.org/10.1109/DDECS50862.2020.9095665", 
  "@type": "ScholarlyArticle", 
  "name": "A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs"
}
11
15
views
downloads
Views 11
Downloads 15
Data volume 15.1 MB
Unique views 11
Unique downloads 15

Share

Cite as