OFET Preparation by Lithography and Thin Film Depositions Process

The length of the channel OFET based thin film is determined during preparation takes place using the technique of lithography and mask during the metal deposition process. The lithography technique is the basic process steps in the manufacture of semiconductor devices. Lithography is the process of moving geometric shapes mask pattern to a thin film of material that is sensitive to light. The pattern of geometric shapes on a mask has specifications, as follows: long-distance source and drain channels varied, i.e. 100 μm, the width of the source and drain are made permanent. Bottom contact OFET structure has been created using a combination of lithography and thin film deposition processes.


Introduction
OFET (Organi field effect transistor) is a field effect transistor using an organic semiconductor material in the channel. An analytical model has been proposed by [1] for organic based thin film transistors. The main principle of the model is based on the channel length. OFET can be made either by using vacuum evaporation, by casting a polymer solution or a small molecule, or by a mechanical transfering of organic single crystal layer to the substrate. These devices have been developed for lower cost, broader electronic products, and environmentally friendly electronics. The performance of OFET continuously been improved to lead to the application in the field of industries. With a large potential as future electronic components, e.g. very cheap and can be a smart card candidate, the polymer can be processed by solvent method (solution process) that can be used to substitute the expensive silicon technology [2].
OFET based on copper phthalocyanine (CuPc) is a type of transistor in which the semiconductor material is an organic material or polymer. However, when it is compared to other types of inorganic transistors, OFET charge carrier mobility, in general, is still very low ranging between 10 -5 -10 2 cm 2 V -1 s -1 [3]. OFET has been made with various forms of devices. The most common structure is the bottom gate with the drain and source electrodes above as shown in Figure 1. This structure is similar to the thin-film transistor (TFT) using a silicon thermal deposition of SiO 2 as the gate dielectric organic polymers. Such as polymethylmethacrylate (PMMA), it can also be used as a dielectric [4].
In this reseach, the electrical and morphological configuration of OFET bottom contact (BC) using organic molecules is studied, i.e. phthalocyanines to form the active layer. Phthalocyanine is naturally stable at high temperature and suitable for thin film deposition by sublimation heat. On the other hand, CuPc is a semiconductor with high conductivity and can be used as an active ingredient for gas sensor devices [5]. This study suggests a single-stage LED of electrical circuits. This concept adopts a flyback converter operating in boundary conduction mode (BCM). Proposed circuit is simpler compact with minimum components involving in electrical circuits [6].
Based on research conducted by Triyana et al. [7], the CuPc material has LUMO (Lowest Unoccupied Molecular Orbital) energy is 3.5 eV, while the HOMO (Highest Occupied Molecular Orbital) energy is 5.2 eV. The results showed that the valuable gap energy is 1.7 eV meaning that it almost becomes a potential candidate for organic semiconductor materials. The difference in the HOMO-LUMO orbital energy of 1.7 eV will conduct a reflection, that let electrons excitate. Thus the material sensitivity to other parts tends to be stronger. Therefore, CuPc semiconductor has a higher sensitivity to the other materials. Besides, the CuPc has special quality in the development of quantum computing that let electron exist in a quantum superposition state [8].
The purpose of this study was to provide additional information about the OFET device associated with the phthalocyanine material as a substitute for inorganic semiconductors. OFET material is an organic semiconductor, CuPc. OFET is a transistor that uses an organic semiconductor material, wherein the connection between the organic semiconducting metal is influenced by the effect of an electric field. The pioneer of OFET polythiophene films were produced at the end of 1970. This enables a fabrication of thin films organic molecules (order of micrometers) with a smaller distance. OFET has more benefit compared to the FET transistor of inorganic materials, i.e. environmentally friendly, easy fabrication, energy efficient operation and it can be operated at room temperature.
At this time, the thin film as a gas sensor application with more practical and high sensitivity is continuously developed, e.g. CuPc. This thin films is expected having optimum performance at room temperature as a gas sensor device. Gas detection is based on the oxidation-reduction events that occur between the surface of a thin film to the gas.

Design and Principle of Operation
OFET very similar to the inorganic field effect transistor (FET), especially concerning the design and functionality [9][10][11]. These devices consist of three electrodes, source (S), drain (D) and gate (G), the gate dielectric as a gate insulator of a semiconductor material and organic material that forms the active layer. Organic materials such as organic molecules [9][10][11] and polymer [12][13][14] can be used as the active layer.
OFET performance depends on the current settings and the electric field. OFET is called unipolar junction transistor (UJT) because of the way it works based on the flow of majority carriers. Current flows from D to S is controlled by a gate voltage (V G ). When no voltage V G , the drain current (I D ) is very low, and the transistor is normal again. When V G increases, the charge carriers accumulate on the surface of the semiconductor and the insulator. Then, when the current I D increases, the charge carrier will be higher, and the transistor relapses on. This brief description is the working principle of OFET. OFET based on Organic semiconductors (OSC) and operates via a reversible second electric field application [15]. Both side of the electric field is an electric field which occurs between S and D vertically, and between G and organic semiconductor. G electric field induces a charge carrier layer at the interface of the dielectric and the dielectric of the OSC (called channel). Two basic parameters of the device are channel length L (the distance between the contact electrodes S and D) and W (the channel width of organic layer). In Figure 1 shows the schematic OFET of top contact configuration as shown in Figure 1a and bottom contact as shown in Figure 1b. The difference between the two configurations lies in the position of the metal source and drain electrodes. The position of the metal source and drain electrodes over

Method
This study uses an organic material, CuPc powder, as the active material in the OFET preparation. CuPc thin film was grown on the substrate Si/SiO 2 by using vacuum evaporation method. Thin film growth process using vacuum evaporation method includes several stages, i.e. evaporation and lithography.
Preparation of OFET-based thin film CuPc was done by growing contact bottom structure. First, the substrate Si/SiO 2 was cleaned with ethanol in the ultrasonic cleaner, then carried the electrode deposition source/drain on a layer of SiO 2 using a pure gold material with lithography method. Furthermore, CuPc deposed thin film.
Second, thin film growth technique as follows: cutting the substrate size (1.5 mm x 4.1 mm) and the distance between S to D is 100 μm, then the substrate was washed by using ultrasonic cleaner Parmer core models. CuPc material, 200 mg, was inserted into the bell-jar. Furthermore, the substrate that has been cleaned was mounted on the right holder on top of the boot which already contains CuPc. Then vacuuming until the pressure drops to 8x10 -4 Pa (about 4 hours). The evaporation process was done by providing a steady current of 45 A until the time limit specified.
Third, mechanical lithography was done by: coating photoresist using a spinner, then process preheating (to increase the adhesion between the resist to the layer below, the alignment, and irradiation using a mask aligner), then lithography, and the last is aging (postbake) to strengthen the resist. After lithography then the next step is etching. The purpose of etching to open the layer in places that are not covered by the resist. Resist that there should be discarded as useless and would contaminate the next process using a resist stripper. two reversible electric field application [15]. Both sides of the field is a field between the source/drain vertically and between the gate and semiconductor.
Gate field induces a charge carrier layer on the dielectric and the OSC dielectric interface, which is called a channel. The amount of channel capacitance depends on the dielectric and the gate field. Mobility in the OSC describes continuous transfer electrons to the material and collect in the channel induced by the electric field drain. I-V characterization of thin films based OFET CuPc is as follows. Electrodes from the S connected to a grounded, while the G and D each connected with a bias retreat. To determine the output characteristic graph of OFET, the need for robust measurement I D from source to drain by varying V D for each value of the gate voltage.

Result and Discussion
Lithography process of OFET fabrications based thin film of CuPc on a SiO 2 substrate to form an electrode source, drain and gate can be seen in Figure 2 and 3. The prepared OFET can be seen in Figure 4. The OFET is placed on the PCB using a gold wire and silver paste to facilitate experimentation.  Characterization of I-V semiconductor contacts indicates the relationship between the current through the electronic device and the voltage at the terminals. Characteristics to determine the basic parameters of the device and modeling the behavior of the circuit [16]. Besides, the I-V characteristics of the active component connect two electrodes for predicting the properties of conductivity and mobility. OFET characterization the results as shown in Figure  5. The voltage V G is varied, ie: -3 V; -1.5 V; 0 V; 1.5 V. OFET characteristic curve in Figure 5 shows that the V D increasing causes the I D increasing and it will saturate, as described in Ohm's law. If V D increased, depletion region will continue to rise until the conditions of a cut-off voltage (V P ). While the V D at the V P , it is called the cut-off failure. The maximum of OFET is achieved when V G = 0 V and V D >│V P │. At the cutoff area, I D has a fixed value though and V D increases, so OFET can no longer respond. OFET as gas sensor device will detect gas only in the active region, where the changing in the I D will change the V D . On the characteristics of OFET with a channel length of 100 μm, an active region V D is 1.2 V to 9.2 V and the I D is 1x10 -10 A until 1.28x10 -9 A. While the OFET saturation region is at V D = 9.2 V, and this is an area cut off.
In Figure 5 the I DS plotted as a function of V DS for a variety of different V GS voltage applied to the electrodes, which serves as a gateway. Saturation region and the linear is agreed by the increasing voltage V DS . At the time of the low-voltage V DS , the current I DS follow Ohm's law and is proportional to the V DS . Therefore, the V DS increases, the voltage that is measured relative to the source. This occurs during the changing of voltage channels from 0 to V DS . Thus the voltage between the gate and points along the channel decreases from V GS at the source V DS -V GS at the end of the drain.
While the channel is no longer uniform since the end of the source and drain ends have different effects. The influence of the most dominant channel increases the resistance becomes larger with the increasing of V D . Thus the output characteristic curve (I DS -V DS ) are not continuous as a straight line, but a non-linear curve, in this state is known as the pinch-off of the conductive channel transistor. It can be said that the observation of the situation is due to the saturation of I DS pinch-off of the channel [17]. Figure 5 shows that the drain current is effectively influenced by the gate voltage. OFET I DS increased by a negative gate voltage. These data indicate that the field effect device with the operation of the p-type accumulation mode. The characteristics of a transistor are their linear region and the saturation of the curve V DS to I DS . Based on Figure 5, the results did not reveal any current in a saturation state. This can be caused by the threshold voltage (V T ) OFET that is too large or unable to reach the drain and gate voltages what will make the conduction path between the drain and source. While the tendency linear region is almost similar to the current characteristics of the diodes. This can be caused by a considerable difference between the work function of the drain and source electrode-work function CuPc. Work function difference is large enough leading to the connection between electrode and CuPc non-ohmic contact or forming the junction between electrode and C U P C .
Like the transistor, FET sensor has three electrodes, where the active layer will interact with the others that can change the electrical properties of this layer. In the active layer, the material used is a p-type or n-type semiconductor. While the electrode G can be mounted on a semiconductor or directly on the dielectric layer. Because this gate electrode only takes the role of the electric field in the active layer, the voltage applied to the electrodes G will affect the current D-S. The more negative gate voltage is given, the greater D-S current flowing. G is given negative voltage as charge carriers in the active layer, polaron (hole). Polaron in the active layer will be attracted by the negative G-voltage side to the active layer adjacent to the dielectric layer. Then polaron will flow from the electrodes D or current D-S. If the gate voltage is fixed and the voltage of the D-S increased continuously, then the I DS of the FET sensor will at Efforts to improve the characteristics of OFET is to use a hole transport process and utilizing semiconductor devices with a constant channel width and the channel length is varied between 100 μm to 300 μm. The channel OFET length affects the semiconductor hole transport. Here, the channel length increases the work function of the semiconductor. It can be concluded that the increased mobility of the charge carriers is caused by the shortening of the channel length.
At the time of OFET channel length is reduced, the device showed similar behavior with a long observation channel MOSFET, despite of the fact that charge transport and the operation of different devices regarding to organic structure. Study the effects of long-channel OFET shows the ratio of channel length to the thickness of the gate insulator and the electric field used for the prediction of induction conditions. Some cases, the number of channel length ratio with the thickness of the gate insulator does not show an accurate indicator, and it is advisable to do research to determine the effects of the events of the physical length of the channel.

Conclusions
The OFET was successfully prepared on a SiO 2 substrate with a length of 100 μm by using lithography technique and thin film deposition. The results showed that the I-V drainsource current was influenced by changing in gate voltage. The greater V GS increased the I DS . The characterization indicated that the active region of the channel length 100 μm was 1x10 -10 A -1.28x10 -9 A. While the OFET saturation region was at V D greater than 9.2 V, and this was cut off area.