High speed graphene-silicon electro-absorption modulators for the O-band and C-band

In the past few years, graphene has drawn interest for applications in optoelectronic devices. Due to its extraordinary properties, i.e. wide optical bandwidth, tunable absorption, high carrier mobility, and CMOS compatibility, it is a candidate to improve current state-of-the-art high-speed optoelectronic devices, such as modulators. In this work, we present a model that describes the DC and high-speed behaviour of single-layer graphene-oxide-silicon electro-absorption modulators (EAM). We compare the theoretical analysis with experimental results, and we find that p-doped graphene combined with p-doped silicon enables high-speed operation at low DC bias. Using this configuration, we demonstrate 75 μm long TM EAMs operating in the O-band and in the C-band. The O-band EAM exhibits 3.1 dB extinction ratio (ER) and 16.0 GHz 3 dB bandwidth at 1 V DC bias. With the C-band EAM we achieve 6.5 dB ER and 14.2 GHz 3 dB bandwidth at 0 V DC bias. Open eye diagrams up to 50 Gbit s−1 are measured using 2.5 Vpp and −0.5 V DC bias at a wavelength of 1560 nm.


Introduction
Electro-optical modulators are key components in optical communication systems. Important requirements for modulators are low insertion loss (IL), high extinction ratio (ER), high operation speed and low energy consumption.
In the past few years, graphene, a two-dimensional network of sp 2 -hybridised carbon atoms, has attracted a lot of interest due to its unique optoelectronic properties. [1][2][3] Graphene is a zero bandgap material, with an optical bandwidth from visible to infrared (up to 180 nm in the C-band). 4,5) It absorbs 2.3% of the perpendicularly incident light, which can be enhanced further by integrating graphene on a waveguide to increase the interaction length between light and graphene. Grapheneʼs absorption can be easily tuned through capacitive charging by applying an electric field, 2) and has therefore the potential to enable active optoelectronic functionality onto passive optical waveguides, such as Si and low-loss SiN waveguides. 6) In addition, graphene is CMOS compatible and can be integrated into CMOS processes in the back end of line. These properties, together with the high carrier mobility (e.g. more than 300 000 cm 2 V −1 s −1 with hBN encapsulation 7) ), make graphene a candidate for applications in high-speed optoelectronic devices, such as photodetectors [8][9][10][11][12][13] and modulators. 4,5,[13][14][15][16][17][18][19][20][21] High-speed graphene modulators have been reported in literature in single-layer graphene (SLG) 4,5,15,19) or doublelayer graphene (DLG) 13,14,20,21) configuration on top of the waveguide. DLG modulators are based on a graphene-oxidegraphene capacitor, while SLG modulators are based on a graphene-oxide-silicon (GOS) capacitor. Due to the presence of two graphene layers, DLG modulators offer potential for higher ER than SLG modulators, but they suffer from higher IL. In addition, SLG modulators have a simpler fabrication process compared to DLG modulators, requiring the transfer of only one graphene layer. A DLG ring modulator with 30 GHz 3 dB frequency response and open eye diagrams at 22 Gbit s −1 was demonstrated by reducing the capacitance of the device using a 65 nm thick Al 2 O 3 as spacer between the two graphene layers. 14) However, employing a thick Al 2 O 3 comes at the expense of the high drive voltage (7.5 V pp ) and high DC bias (−30 V) necessary to operate the device. In addition, the device has limited optical bandwidth, due to the resonant nature of the ring modulator. A more recent work reports a 120 μm long DLG electro-absorption modulator (EAM), built on top of a silicon waveguide with a 20 nm thick SiN spacer between the two graphene layers, exhibiting 20 dB IL and 3 dB ER for 9 V pp . 21) The device shows 29 GHz 3 dB frequency response and open eye diagrams at 50 Gbit s −1 using 3.5 V pp , at a high DC bias of 8 V. Among SLG modulators, in 5) a broadband SLG EAM with a n-doped Si waveguide was demonstrated, achieving a 3 dB frequency response of 5.9 GHz and open eye diagrams at 10 Gbit s −1 using 2.5 V pp at 1.75 V DC bias in the wavelength range between 1530 and 1565 nm. In, 15) a 50 μm long SLG EAM with a p-doped Si waveguide was demonstrated, exhibiting an improved 3 dB frequency response of 16 GHz at 0 V DC bias and open eye diagrams up to 25 Gbit s −1 using 2.5 V pp at 2 V DC bias.
In this paper, we present a theoretical model that describes the DC and high-speed performance of SLG EAMs. The model is used to identify the optimal combination of graphene doping and silicon waveguide doping, in order to optimise the DC performance and the total device RC for high-speed operation around 0 V DC bias. We compare experimental results from three samples, fabricated by transferring graphene on waveguides with different type and level of silicon doping, to corroborate the theoretical analysis. After transfer, graphene on waveguides exhibits p-doping behaviour. We employ a thin SiO 2 layer with a thickness of 5 nm as spacer between graphene and Si, in order to achieve a low operating bias. The best static and high-speed performance is obtained on TM SLG EAMs fabricated with p-doped silicon waveguides. Oband and C-band operation with more than 14 GHz 3 dB frequency response is demonstrated across a total wavelength range of 140 nm. On a 75 μm long O-band TM SLG EAM, we achieve 4.0 dB IL, 3.1 dB ER using 8 V pp and 16.0 GHz 3 dB frequency response at 1 V DC bias at 1300 nm wavelength. In the C-band, we demonstrate a 75 μm long broadband SLG EAM with 4.2 dB IL, 6.5 dB ER using 8 V pp and 14.2 GHz 3 dB frequency response at 0 V DC bias and 1560 nm wavelength. Open eye diagrams are obtained up to 50 Gbit s −1 at 1560 nm wavelength for the first time on a SLG EAM, using 2.5 V pp and −0.5 V DC bias, thus showing potential for graphene integration in high-speed photonics applications.

Device design and fabrication
The SLG-silicon EAM is based on a 220 nm thick silicon (Si) waveguide, fabricated on a silicon-on-insulator (SOI) wafer with 2 μm buried oxide in imec's 200 mm Si photonics platform [ Fig. 1(a)]. 22) The waveguide is partially etched on one side, creating a rib structure that allows to contact the Si waveguide through the 70 nm thick slab layer. The waveguide is embedded in SiO 2 to ensure a planar surface for the subsequent graphene transfer. Three separate doping levels ( ++ ++ n p or for the contact region, n p or slab slab for the slab region, n p or wg wg for the waveguide region) are used to minimise the Si contact and sheet resistance, without significantly increasing the waveguide loss. After Si waveguide patterning, a chemical-mechanical planarisation step is performed to planarise the waveguides. Through thermal oxide growth the desired SiO 2 thickness of 5 nm is obtained on top of the Si waveguide. After wafer dicing, subsequent processing is performed at coupon level in a cleanroom lab environment. Graphene grown by chemical vapour deposition is transferred on top of the Si waveguides. Both growth and transfer processes were carried out by Graphenea (www. graphenea.com. Subsequently,graphene is patterned to cover part of the Si waveguide and to define the length of the EAM. Contacts are made to graphene (50 nm Pd) and to the doped Si (10 nm Ti/20 nm Pt/50 nm Au) based on a standard lift-off process. These contact metals were selected to minimise the contact resistance to graphene and to Si respectively. 23) The contacts are placed 2 μm away from the waveguide and therefore have no impact on transmission loss. The graphene and silicon contacts are used to apply an electric field across the device, which modulates the Fermi level in graphene.

Device modeling
3.1. Static electro-optical behaviour of the SLG EAM The static electro-optical behaviour of the SLG EAM is defined by the relation between the absorption and graphene's Fermi level μ. Graphene's absorption is derived from the 2D complex optical conductivity ( ) s w m G T , , , g , calculated from the Kubo formula. 2) This formula takes into account interband and intraband transitions, and it depends on the angular frequency ω, the charged particle scattering rate ℏΓ, the temperature T, and most importantly graphene's Fermi level μ. The latter can be shifted by sweeping the voltage V g across the GOS capacitor, 2) according to where q is the elementary charge, ℏ is the reduced Planck constant, v F is the Fermi velocity of carriers in graphene and C GOS is the capacitance of the GOS capacitor. The Fermi level μ is the sum of two contributions: ( ) m m m = + D . 2 0 μ 0 is the initial Fermi level position due to the fixed number of charges n 0 (graphene's intrinsic doping), and Δμ is the Fermi level shift caused by the number of charges n s accumulated on graphene when we apply V g across the capacitor.
The static electro-optical behaviour of the SLG EAM as a function of applied voltage is mainly affected by two parameters: graphene's intrinsic doping (n 0 ) and the scattering rate ℏΓ. The intrinsic doping n 0 affects the position of minimum transmission as a function of applied voltage. Figure 2(a) shows the simulation, performed using Lumerical MODE Solutions, of the optical transmission as a function of gate voltage for a TE SLG EAM with 5 nm thick SiO 2 and 500 nm wide waveguide operating at 1560 nm, for neutral (n 0 = 0 cm −2 ) and p-doped ( =´n 12 10 cm 0 12 2 ) graphene, for scattering rate ℏΓ = 15 meV. For neutral graphene, the minimum is at 0 V, therefore switching between high transmission (on-state) and low transmission (off-state) requires ∼3.5 or ∼−4 V DC bias. For p-doped graphene, the minimum transmission point is shifted to negative bias. In this case, switching occurs between −2 and 2 V, which is compatible with current CMOS technology. The scattering rate ℏΓ, which is inversely proportional to the mobility μ, 24) affects the ER of the modulator. As shown in Fig. 2(b), a lower scattering  rate, implying higher graphene quality, results in higher ER for a given V pp because graphene can reach full transparency. For example, a 75 μm long SLG EAM would show 0.5 dB higher ER for ℏΓ = 0.43 eV compared to ℏΓ=30 eV. In real applications, graphene's scattering rate is often more than 10 meV, 24) resulting in a reduced ER and increased IL.

RC limited high-speed behaviour of the SLG EAM
The 3 dB frequency response of a SLG EAM is limited by the RC constant of the device, and can be explained using the equivalent electrical circuit in Fig. 1(b). 3.2.1. Device resistance. The device total resistance (R tot ) is the sum of graphene's contact and sheet resistance (R graC and R gra ) and the Si contact and sheet resistance (R SiC and R Si ). Graphene's resistance is affected by the scattering rate ℏΓ, which is proportional to the impurity density n*, caused by local potential fluctuations and electron/hole puddles on the graphene layer. 25,26) Higher scattering rate corresponds to lower mobility and therefore higher resistance. When the mobility is higher (lower ℏΓ and n*), the peak in graphene's resistance corresponding to the neutrality point is higher. As a consequence, the resistance experiences a more abrupt change when the gate voltage is increased or decreased to move away from the neutrality point. 24) The values of R graC and R gra at a fixed DC voltage bias are also affected by graphene's intrinsic doping n 0 . For n 0 = 0, graphene's resistance reaches its peak value at 0 V voltage bias, and decreases for increasing (or decreasing) voltage bias. When applying V gate as indicated in Fig. 1(a), p-doped (n-doped) graphene shows a peak value at negative (positive) voltage bias due to the shift of graphene's charge neutrality point [ Fig. 3(a)]. The resistance then decreases as the voltage increases (decreases). In case of pdoped graphene, there is therefore a low resistance region for voltage values around or greater than 0 V. The Si contribution to R tot depends on the doping level of the three Si regions: contact, slab and waveguide areas. To properly estimate how the silicon doping impacts the resistance, we perform a process simulation using Sentaurus TCAD, which accurately emulates the real processing performed in the fab. Afterwards we extract the values of silicon resistance (R Si and R SiC ) for the three doped regions together (contact, slab and waveguide) by performing a transient device simulation at different voltage values. Figure 3(b) shows the values of R tot as a function of gate voltage for a 75 μm long device with p-doped graphene (mobility μ c = 800 cm 2 V −1 s −1 ; R graC = 880 Ω μm and R gra = 340Ω/□at 0 V) and a waveguide width of 500 nm, for p-doped (p wg = 1.9 × 10 18 cm −3 , p slab = 3.2 × 10 19 cm −3 ) and n-doped (n wg = 2.3 × 10 18 cm −3 , n slab = 2.7 × 10 19 cm −3 ) Si. p-doped silicon exhibits higher sheet resistance than n-doped silicon, due to the lower mobility of holes compared to electrons. The variation of R tot with gate voltage is influenced by the voltage-dependent behaviour of R graC (V ) and R gra (V ) only. 3.2.2. GOS capacitance. The total GOS capacitance C GOS is given by the series of graphene's quantum capacitance C q , the oxide capacitance C ox and the Si depletion capacitance C Si : Graphene's quantum capacitance is given by the following equation 27,28) : where μ is graphene's Fermi level as defined in Eq. (2). The quantum capacitance is characterised by a minimum when μ = 0 [Δμ = −μ 0 , according to Eq. (2)] and it increases linearly for | | m > 0 [ Fig. 4(a)]. For intrinsic (undoped) graphene, the Fermi level is at the Dirac point, μ 0 = 0 and therefore C q = 0 for Δμ = 0 [ Fig. 4(b)]. In p-doped (n-doped) graphene, μ 0 < 0 (μ 0 > 0) and, as a consequence, the minimum of C q is located at Δμ = −μ 0 [ Fig. 4(b)]. When graphene is not pristine, the additional impurity carrier density n* should be included in the calculation, The quantum capacitance becomes 26) If we compare C q with C ox calculated for 5 nm of SiO 2 (Fig. 4), we see that the latter is significantly smaller for each value of μ away from the neutrality point. When > n 0 * , the minimum of the quantum capacitance increases and C q becomes significantly higher than C ox for any value of chemical potential, as shown by the dotted lines in Fig. 4. For this reason, when placed in series with C ox , the contribution of C q is minor.
The analytical model used to calculate C GOS as a function of applied voltage V g is based on the MOS capacitor 2 ) and scattering rates ℏΓ = 0.43, 15, 30 meV. When graphene is p-doped the switch between on-and offstate occurs between −2 and 2 V. Higher scattering rate results in lower ER and higher IL. model, 29) with the difference that for the GOS capacitor graphene's quantum capacitance C q is included in the calculation. The voltage is applied on the graphene contact, while the silicon contact is grounded. In accumulation, when V g < V FB < 0 for p-doped Si and V g > V FB > 0 for n-doped Si, with V FB being the commonly known flatband voltage of a MOS capacitor, 29) the silicon layer is not yet depleted, so the quantities that play a role are C q and C ox . To calculate the amount of charges n s accumulated on the graphene layer for each V g < V FB , we need to solve the following system ⎧ where Q acc is the accumulation charge. The resulting equation for n s is Once the value of n s for each V g is known, we can calculate C q through Eq. (4) and therefore the total accumulation capacitance . Graphene's natural doping n 0 is considered in the calculation as an initial condition and it will automatically affect the position of graphene's charge neutrality point in the final result. In fact, n s and n 0 in Eq. (4) are summed up before applying the absolute value, which is necessary to make a distinction between n-doped (n 0 < 0) and p-doped graphene (n 0 > 0). In inversion (V g > V T > 0 for p-doped Si and V g < V T < 0 for n-doped Si, where V T is threshold voltage 29) ) the silicon layer has reached maximum depletion and the quantities to be considered are C q , C ox and C Si,max . Equation (7) becomes To calculate the total capacitance C GOS,dep in depletion for n-doped Si), a different approach is necessary. The width of the depletion region in silicon W dep has to be calculated for values of the surface potential f s ranging from 0 to f 2 F . From 3 ). P-doped silicon exhibits higher sheet resistance than n-doped silicon. The voltage-dependent behaviour is caused by R graC and R gra .
Throughout the calculation of C GOS , the values of ( ) V n g s , and therefore ( ) m V g , are extracted step by step, and are used to obtain graphene's absorption (and therefore transmission) as a function of the applied voltage V g through Eq. (1), as shown in Fig. 2.
The results of the calculation of C GOS for a GOS capacitor with p-doped silicon ( =´- 2 ) graphene is shown in Fig. 5(b). As expected, graphene's quantum capacitance affects C GOS only where C q reaches its minimum [ Fig. 5(a)]. This effect is clearly visible only when the GOS capacitor is in accumulation mode, and therefore C GOS is higher. As a consequence, reducing C q by reducing the impurity density n* would only have a small effect on C GOS as a whole. In order to decrease C ox , we could use an oxide with a lower permittivity or increase the oxide thickness. However, both solutions would increase the field necessary to accumulate charges on the capacitor plates in the whole range necessary to operate the device. In other words, the lower capacitance would allow to obtain a higher 3 dB frequency response, but the ER for the same voltage range would be significantly reduced. The device capacitance can therefore be optimised by focusing on how C Si changes when varying the type and level of doping, and on how this affects C GOS . Figure 6 shows the calculation of C GOS performed for p-doped graphene ( =´n 12 10 cm 0 12 2 ) for different levels of p-type and n-type silicon doping. The capacitance in accumulation is not affected by the variation in silicon doping level. A reduction in capacitance is achieved in depletion for lower silicon doping, as expected due to the lower silicon depletion capacitance C Si when the silicon doping is decreased. Due to this characteristic MOS behaviour, it is preferable to operate the device in depletion in order to obtain lower capacitance.

Device optimisation
To optimise the SLG EAM for high-speed operation, the 3 dB frequency response of the device has to be maximised. This figure of merit is limited by the device RC constant, therefore the total resistance and capacitance of the device have to be minimised in the desired operating region in order to obtain the lowest possible RC. In fabricated devices, graphene is most often p-doped, due to dangling oxygen bonds in the SiO 2 below and also due to environmental and polymer contamination during processing. 30,31) In terms of static electro-optical performance, as seen in Sect. 3.1, this means that the switching between on and off states takes place in the region between −2 and 2 V voltage bias. This region corresponds to the low resistance region in case of pdoped graphene, as shown in Fig. 3. In order to have low capacitance in the same voltage range, p-doped Si is preferable because it allows to operate the device in depletion for voltage bias higher than 0 V. As a result, when p-doped graphene is combined with p-doped silicon, the total RC is reduced in the region between 0 and 2 V. Likewise, in case of n-doped graphene, the situation would be reversed and the best choice would be a device with n-doped silicon operating at low reverse bias. This is better visualised in the example in 2 ) and a waveguide width of 500 nm, for p-doped and n-doped Si (doping values in Table I). Using these values of C GOS and values of R tot from Fig. 3(b), the 3 dB frequency response is then extracted by simulating the electrical equivalent circuit in Fig. 1(b). Even though p-doped silicon exhibits higher sheet resistance than n-doped silicon, the considerably lower GOS capacitance of the EAM with p-doped silicon in the 0-2 V region allows to achieve a twofold improvement in 3 dB frequency response at 0 V [ Fig. 7(b)].
Patterning graphene under the contact area, e.g. with holes, to increase the edge contact perimeter between graphene and the metal can lead to a significant reduction in graphene's contact resistance. 32 further improved up to 23 and 31 GHz for L device = 75 μm and L device = 25 μm respectively.

Experimental results and discussion
In the first part of this experimental section, we compare the performance of four  Table II). Sample A was fabricated with n-doped Si, with average carrier concentrations of n slab = 2.5 × 10 18 cm −3 and n wg = 1.2 × 10 18 cm −3 for the slab and the waveguide regions respectively. Sample B was fabricated using higher n-doping in the Si slab and waveguide regions than sample A (n slab = 2.7 × 10 19 cm −3 and n wg = 2.3 × 10 18 cm −3 ), with the purpose of reducing the total parasitic resistance without significantly impacting the GOS capacitance. Sample C was fabricated using pdoped Si ( p slab = 3.2 × 10 19 cm −3 and p wg = 1.9 × 10 18 cm −3 ). The characterisation of the samples was carried out under ambient conditions. The three samples were first characterised by performing unbiased fiber-to-fiber transmission measurements on SLG EAMs with waveguides optimised for TE mode propagation (TE waveguides, W wg = 500 nm) and with four different device lengths (L device = 25, 40, 50 and 75 μm). The transmission scales linearly with the device length, and the extracted average and standard deviation values of absorption are 0.08 ± 0.01, 0.08 ± 0.01 and 0.05 ± 0.01 dB μm −1 for samples A, B and C respectively.
We then performed biased fiber-to-fiber transmission measurements on the same EAMs, by sweeping the wavelength from 1510 to 1600 nm, while applying a DC bias ranging from −4 to 4 V. Figure 8(a) shows the extracted ER versus device length (L device ) for the three samples at the peak transmission wavelength of 1560 nm. The values of ER scale  3 ). P-doped Si allows to operate the SLG EAM in depletion in the operating region of interest (0-2 V), thus achieving more than double f 3dB compared to n-doped Si.  linearly with the device length, reaching up to 2.6 dB for Samples A and C and 3.8 dB for sample B for L device = 75 μm. An example of the extracted transmission as a function of DC bias at 1560 nm for L device = 75 μm is reported in Fig. 8(b). All three samples show minimum transmission of the modulation curve located at reverse bias. which indicates p-type doping in graphene. Sample B exhibits lower p-type graphene doping than the other two samples, which translates into the minimum transmission being shifted towards lower reverse bias. As a consequence, when the reverse bias on sample B is increased, graphene approaches again transparency, resulting in a more symmetrical transmission curve compared to the other two samples. The average and standard deviation values of modulation efficiency ( = L ME ER device ) across the four devices at 1560 nm are 0.03 ± 0.01, 0.05 ± 0.01 and 0.04 ± 0.01 dB μm −1 for samples A, B and C respectively. The higher modulation in sample B is attributed to higher mobility in graphene compared to the other two samples. This is confirmed by the values of graphene's mobility extracted from transfer length measurements (TLM) of graphene's electrical test structures fabricated on the same sample ( 1 for sample C). The lower p-type graphene doping and the higher graphene mobility in sample B are attributed to sample-to-sample variations of graphene's properties, caused by uncontrolled variations in processing conditions.
The electro-optical S 21 frequency response of the modulators was measured between 100 MHz and 30 GHz at DC bias ranging from 0 to 2 V with a vector network analyser, using −8 dBm RF power and a 50 Ω load resistor. Figure 9(a) compares the extracted 3 dB frequency response ( f 3dB ) of the three samples as a function of DC bias for L device = 75 μm. Figures 9(b) and 9(c) compare the extracted R tot and C GOS from the fitting of the S 11 frequency response measured on the three samples, performed using the equivalent electrical circuit shown in Fig. 1(b). Among the n-doped samples, sample B exhibits the highest 3 dB frequency response at any forward voltage bias, with a maximum value of 8.9 GHz at 0 V DC bias for L device = 75 μm. The decrease in R tot (20% at 0 V DC bias) achieved in sample B with the higher doping in the slab and waveguide regions, counteracts the slight increase in C GOS caused by the higher waveguide doping (13% at 0 V DC bias). This allows to improve the f 3dB from sample A to sample B at any forward voltage bias, e.g. with a gain of 2 GHz (29%) at 0 V DC bias (Table III) (Table III). Even though the Si sheet resistance is higher, the lower C GOS obtained by operating the device in depletion mode instead of accumulation mode allows to significantly reduce the total RC constant, and thus enhance the 3 dB frequency response at any forward voltage bias. The values of f 3dB decrease with higher device length, due to the increase in the total RC constant related to the 50 Ω load resistor (Table III).

Performance comparison of C-band TE and TM SLG EAMs
Despite the high 3 dB frequency response achieved with the sample with p-doped Si (sample C), the ER of the SLG EAMs remains limited when using TE-polarised light, with values ranging from 0.9 dB for L device = 25 μm-2.6 dB for L device = 75 μm. The performance with TE-polarised light can be improved by using an optimised waveguide thickness. 33,34) However, in our case this approach is not possible due to specific waveguide height requirements of the fab used to fabricate the substrate. Using waveguides optimised for TM mode propagation (TM waveguides) can increase the ER for a given device length, due to the bigger overlap between the TM optical mode and the graphene layer compared to TE when the waveguide thickness is 220 nm [see inset of Fig. 10(a)]. To maximise the overlap with graphene but still ensure mode confinement in the waveguide, we use a waveguide width of 750 nm. 5) Unbiased transmission measurements performed on sample C (p-doped Si) from 1510 to 1600 nm on SLG EAMs with TM waveguides, equivalent to the ones performed on TE waveguides, showed that graphene's absorption is 0.09 ± 0.01 dB μm −1 , which is 2.3 times higher than the 0.04 ± 0.01 dB μm −1 measured on TE waveguides, in agreement with the value of 2.2 extracted from Lumerical MODE simulations. The ME of the four SLG EAMs is consistent across the measured C-band spectrum for both TE and TM devices [ Fig. 10(b)]. The drawback in using TM waveguides comes from the wider waveguide width, which leads to higher sheet resistance and GOS capacitance, resulting in a 1.1-1.5 times lower 3 dB frequency response compared to TE waveguides (Fig. 11). Nevertheless, due to the low C GOS

Performance of O-band TM SLG EAMs
To demonstrate the broadband operation of graphene devices, we measured TM graphene-Si EAMs fabricated on sample C with exactly the same processing steps and cross section, but designed to operate in the O-band. We characterised four devices, with same lengths as the TM C-band devices demonstrated earlier (L device = 25, 40, 50 and 75 μm) and waveguide width of 380 nm. Fiber-to-fiber transmission measurements from 1260 to 1330 nm, resulted in an average absorption across the four devices of 0.10 ± 0.01 dB μm −1 . The biased transmission measurements were performed sweeping the DC bias from −4 to 4 V and the wavelength from 1270 to 1320 nm. The average and standard deviation values of ME at the peak of the fiber grating couplers (1300 nm) across the four devices are 0.041 ± 0.005 dB μm −1 . The lower modulation efficiency compared to C-band TM devices is due to the higher energy of the photons in the O-band. As a consequence, it's necessary to apply a higher voltage in order to achieve full transparency in graphene, which may result in oxide breakdown. The extracted ME of the four TM O-band SLG EAMs is consistent across the O-band spectrum, as shown in Fig. 12 Fig. 12(b)].

Large signal high-speed performance
A summary of the performance of the C-band TE, C-band TM and O-band TM SLG EAMs on sample C is reported in     Table IV for L device = 75 μm. The FOM is defined as ER/IL and should therefore be as high as possible. The C-band TM EAM represents the best compromise between IL and ER, as shown by the high value of FOM, while also exhibiting a 3 dB frequency response of 14 GHz. Eye diagrams were measured on the C-band SLG EAM with p-doped Si (sample C), TM waveguide and L device = 75 μm at 1560 nm using 2 23 -1 PRBS, 2.5 V pp , 14 dBm input optical power and a 50 Ω terminated probe. Open eye diagrams were generated from 5 Gb s −1 up to 50 Gbit s −1 , thus demonstrating potential for high-speed data transmission using graphene technology. Examples at 10, 25 and 50 Gbit s −1 are shown in Fig. 13(a). The large-signal ER and the signal-to-noise ratio (SNR) are reported in Fig. 13 ) of the SLG EAM is calculated to be ∼112 fJ, while the static power consumption is < 10 −8 mW, due to the low leakage current flowing through the GOS capacitor (< 10 pA).

Conclusion
In this paper we analysed the DC and high-speed performance of SLG-silicon EAMs. Three samples were fabricated by transferring p-doped graphene on Si waveguides with different type and level of silicon doping. By means of a theoretical model, the influence of the waveguide doping on the total parasitic resistance and capacitance of SLG-silicon EAMs was discussed and compared to experimental results from the three samples. We found that the best static and high-speed performance is obtained on SLG EAMs fabricated using p-doped silicon waveguides. We demonstrated high-speed performance on SLG EAMs in the O-band and in the C-band, for a total wavelength range of 140 nm. On a 75 μm long O-band TM SLG EAM, we achieved 3.1 dB ER and 16.0 GHz 3 dB frequency response at 1 V DC bias at 1300 nm wavelength. In the C-band, we demonstrated a 75 μm long broadband SLG EAM with 6.5 dB ER and   14.2 GHz 3 dB frequency response at 0 V DC bias at 1560 nm wavelength. Open eye diagrams were obtained up to 50 Gbit s −1 using 2.5 V pp and −0.5 V DC bias at 1560 nm, thus showing potential for the integration of SLG modulators in high-speed integrated photonics.