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# HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions

Vittoriano Muttillo; Luigi Pomante; Patricia Balbastre; Josè Simò; Alfons Crespo

### Dublin Core Export

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<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd">
<dc:creator>Vittoriano Muttillo</dc:creator>
<dc:creator>Luigi Pomante</dc:creator>
<dc:creator>Patricia Balbastre</dc:creator>
<dc:creator>Josè Simò</dc:creator>
<dc:creator>Alfons Crespo</dc:creator>
<dc:date>2019-10-21</dc:date>
<dc:date>info:eu-repo/date/embargoEnd/2021-10-21</dc:date>
<dc:description>Heterogeneous parallel devices are becoming widely diffused in the embedded systems application field since they allow to improve time performances and other orthogonal metrics (e.g., cost, power, size, etc.) at the same time. In such a context, the introduction of safety requirements, as dictated by the relevant standards (i.e., DO-178 B/C and RTCA/DO-254 in airborne systems, ARINC 653 for avionics software, ISO-26262 in automotive domain, etc.) while considering shared resources on a heterogeneous parallel HW platform, adds further challenges to industrial and academic research. This kind of platforms that execute tasks with different levels of criticality are commonly called mixed-criticality embedded systems. So, the main problem in their management is to ensure that low criticality tasks do not interfere with high criticality ones. The final goal is to allow several applications to interact and coexist on the same platform. For this, the exploitation of virtualization technologies (i.e., hypervisors) allows to guarantee isolation and to satisfy certification requirements but introduces scheduling overhead and new HW/SW partitioning challenges. In such a scenario, this work focuses on a framework for modeling, analysis, and validation of mixed-criticality and real-time systems based on an existing "Model-Based Electronic System Level HW/SW Co-Design" methodology. The main contribution of this work is the integration of the considered framework with Xamber tool in order to provide systems implementations by exploiting a design space exploration able to consider Xtratum-based SW partitions.</dc:description>
<dc:identifier>https://zenodo.org/record/3605531</dc:identifier>
<dc:identifier>10.1109/DSD.2019.00085</dc:identifier>
<dc:identifier>oai:zenodo.org:3605531</dc:identifier>
<dc:language>eng</dc:language>
<dc:relation>info:eu-repo/grantAgreement/EC/H2020/737475/</dc:relation>
<dc:relation>info:eu-repo/grantAgreement/EC/H2020/783162/</dc:relation>
<dc:relation>info:eu-repo/grantAgreement/EC/H2020/737494/</dc:relation>
<dc:rights>info:eu-repo/semantics/embargoedAccess</dc:rights>
<dc:subject>HW/SW Co-Design</dc:subject>
<dc:subject>Heterogeneous Parallel Systems</dc:subject>
<dc:subject>Design Space Exploration</dc:subject>
<dc:subject>Mixed-Criticality</dc:subject>
<dc:subject>Hypervisor</dc:subject>
<dc:title>HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions</dc:title>
<dc:type>info:eu-repo/semantics/preprint</dc:type>
<dc:type>publication-preprint</dc:type>
</oai_dc:dc>

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