Conference paper Open Access

# Cooperative Arithmetic-Aware Approximation Techniques for Energy-Efficient Multipliers

Leon, Vasileios; Asimakopoulos, Konstantinos; Xydis, Sotirios; Soudris, Dimitrios; Pekmestzi, Kiamal

### Citation Style Language JSON Export

{
"DOI": "10.1145/3316781.3317793",
"author": [
{
"family": "Leon, Vasileios"
},
{
"family": "Asimakopoulos, Konstantinos"
},
{
"family": "Xydis, Sotirios"
},
{
"family": "Soudris, Dimitrios"
},
{
"family": "Pekmestzi, Kiamal"
}
],
"issued": {
"date-parts": [
[
2019,
7,
1
]
]
},
"abstract": "<p>Approximate computing appears as an emerging and promising solution for energy-efficient system designs, exploiting the inherent error-tolerant nature of various applications. In this paper, targeting multiplication circuits, i.e., the energy-hungry counterpart of hardware accelerators, an extensive exploration of the error--energy trade-off, when combining arithmetic-level approximation techniques, is performed for the first time. Arithmetic-aware approximations deliver significant energy reductions, while allowing to control the error values with discipline by setting accordingly a configuration parameter. Inspired from the promising results of prior works with one configuration parameter, we propose 5 hybrid design families for approximate and energy-friendly hardware multipliers, consisting of two independent parameters to tune the approximation levels. Interestingly, the resolution of the state-of-the-art Pareto diagram is improved, giving the flexibility to achieve better energy gains for a specific error constraint imposed by the system. Moreover, we outperform prior works in the field of approximate multipliers by up to 60% energy reduction, and thus, we define the new Pareto front.</p>",
"title": "Cooperative Arithmetic-Aware Approximation Techniques for Energy-Efficient Multipliers",
"type": "paper-conference",
"id": "3472504"
}
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