Journal article Open Access

Verilog-A model of ferroelectric memristors dedicated to neuromorphic design

Charly Meyer; André Chanthbouala; Sören Boyn; Jean Tomas; Vincent Garcia; Manuel Bibes; Stephane Fusil; Julie Grollier; Sylvain Saighi


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    <subfield code="u">Unité Mixte de Physique, CNRS, Thales, Univ. Paris Sud, Université Paris-Saclay, Palaiseau, 91767, France</subfield>
    <subfield code="a">Julie Grollier</subfield>
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    <subfield code="u">Laboratoire IMS, UMR CNRS 5218, University of Bordeaux, Talence, F-33405, France</subfield>
    <subfield code="a">Sylvain Saighi</subfield>
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    <subfield code="u">Laboratoire IMS, UMR CNRS 5218, University of Bordeaux, Talence, F-33405, France</subfield>
    <subfield code="a">Charly Meyer</subfield>
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    <subfield code="a">Verilog-A model of ferroelectric memristors dedicated to neuromorphic design</subfield>
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    <subfield code="a">&lt;p&gt;Artificial neural networks (ANN) are well known for performing Recognition, Data mining and Synthesis (RMS) tasks. However, the most famous ANNs are software implemented on computers that never take into account the power consumption management. Chip designers are aiming at low-power consumption by developing the neuromorphic engineering field. The goal is to design and produce neuralinspired architectures allowing energy-efficient computation systems. One decade ago, neuromorphic engineering had a renewal of interest, in particular due to the unveiled memristive devices. Indeed, memristors own all the features necessary in order to play the role of plastic synapses in ANNs. Among all memristive technologies, ferroelectric devices present an important advantage for low power systems: their high resistance which implies low current. In this paper, we will present a Verilog-A model of ferroelectric memristors. This model is based on measurements and therefore takes into account the variability of devices in terms of RON, ROFF and switching characteristics. This realistic model will be helpful for designing neuromorphic systems based on these devices. Finally, we will present some Cadence simulations of learning in small neural networks composed of CMOS neurons and memristive synapses.&lt;/p&gt;</subfield>
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