November 22, 2018 Conference paper Open Access

Sterpone, Luca; Azimi, Sarah; Bozzoli, Ludovica; Du, Boyang; Lange, Thomas; Glorieux, Maximilien; Alexandrescu, Dan; Polo, Cesar Boatella; Codinachs, David Merodio

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  <dc:creator>Sterpone, Luca</dc:creator>
  <dc:creator>Azimi, Sarah</dc:creator>
  <dc:creator>Bozzoli, Ludovica</dc:creator>
  <dc:creator>Du, Boyang</dc:creator>
  <dc:creator>Lange, Thomas</dc:creator>
  <dc:creator>Glorieux, Maximilien</dc:creator>
  <dc:creator>Alexandrescu, Dan</dc:creator>
  <dc:creator>Polo, Cesar Boatella</dc:creator>
  <dc:creator>Codinachs, David Merodio</dc:creator>
  <dc:date>2018-11-22</dc:date>
  <dc:description>SRAM-based FPGA devices manufactured in FinFET technologies provide performances and characteristics suitable for avionics and aerospace applications. The estimation of error rate sensitivity to harsh environments is a major concern for enabling their usage on such application fields. In this paper, we propose a new estimation approach able to consider the radiation effects on the configuration memory and logic layer of FPGAs, providing a comprehensive Application Error Rate probability estimation. Experimental results provide a comparison between radiation test campaigns, which demonstrates the feasibility of the proposed solution.</dc:description>
  <dc:description>This work was supported as part of the RESCUE project that has received funding from the European Union's Horizon
2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement No. 722325 and by the European Space Agency under contract No. 4000116569.</dc:description>
  <dc:identifier>https://zenodo.org/record/3362341</dc:identifier>
  <dc:identifier>10.1109/AHS.2018.8541474</dc:identifier>
  <dc:identifier>oai:zenodo.org:3362341</dc:identifier>
  <dc:language>eng</dc:language>
  <dc:relation>info:eu-repo/grantAgreement/EC/H2020/722325/</dc:relation>
  <dc:rights>info:eu-repo/semantics/openAccess</dc:rights>
  <dc:rights>https://creativecommons.org/licenses/by-nc-nd/4.0/legalcode</dc:rights>
  <dc:title>A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs</dc:title>
  <dc:type>info:eu-repo/semantics/conferencePaper</dc:type>
  <dc:type>publication-conferencepaper</dc:type>
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