Conference paper Open Access
Sterpone, Luca;
Azimi, Sarah;
Bozzoli, Ludovica;
Du, Boyang;
Lange, Thomas;
Glorieux, Maximilien;
Alexandrescu, Dan;
Polo, Cesar Boatella;
Codinachs, David Merodio
{ "inLanguage": { "alternateName": "eng", "@type": "Language", "name": "English" }, "description": "<p>SRAM-based FPGA devices manufactured in FinFET technologies provide performances and characteristics suitable for avionics and aerospace applications. The estimation of error rate sensitivity to harsh environments is a major concern for enabling their usage on such application fields. In this paper, we propose a new estimation approach able to consider the radiation effects on the configuration memory and logic layer of FPGAs, providing a comprehensive Application Error Rate probability estimation. Experimental results provide a comparison between radiation test campaigns, which demonstrates the feasibility of the proposed solution.</p>", "license": "https://creativecommons.org/licenses/by-nc-nd/4.0/legalcode", "creator": [ { "affiliation": "Politecnico di Torino", "@type": "Person", "name": "Sterpone, Luca" }, { "affiliation": "Politecnico di Torino", "@type": "Person", "name": "Azimi, Sarah" }, { "affiliation": "Politecnico di Torino", "@type": "Person", "name": "Bozzoli, Ludovica" }, { "affiliation": "Politecnico di Torino", "@type": "Person", "name": "Du, Boyang" }, { "affiliation": "iRoC Technologies", "@id": "https://orcid.org/0000-0002-5002-3679", "@type": "Person", "name": "Lange, Thomas" }, { "affiliation": "iRoC Technologies", "@id": "https://orcid.org/0000-0002-6731-0455", "@type": "Person", "name": "Glorieux, Maximilien" }, { "affiliation": "iRoC Technologies", "@id": "https://orcid.org/0000-0002-8294-7534", "@type": "Person", "name": "Alexandrescu, Dan" }, { "affiliation": "European Space Agency", "@type": "Person", "name": "Polo, Cesar Boatella" }, { "affiliation": "European Space Agency", "@type": "Person", "name": "Codinachs, David Merodio" } ], "headline": "A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs", "image": "https://zenodo.org/static/img/logos/zenodo-gradient-round.svg", "datePublished": "2018-11-22", "url": "https://zenodo.org/record/3362341", "@context": "https://schema.org/", "identifier": "https://doi.org/10.1109/AHS.2018.8541474", "@id": "https://doi.org/10.1109/AHS.2018.8541474", "@type": "ScholarlyArticle", "name": "A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs" }
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