10.1088/1361-6501/aa7aba
https://zenodo.org/records/3265687
oai:zenodo.org:3265687
Dongsheng Zhao
Dongsheng Zhao
VSL
Helko van den Brom
Helko van den Brom
VSL
Ernest Houtzager
Ernest Houtzager
VSL
Mitigating voltage lead errors of an AC Josephson voltage standard by impedance matching
Zenodo
2017
AC Josephson voltage standard, impedance matching, simulation, error sources, uncertainty
2017-08-16
Creative Commons Attribution 4.0 International
A pulse-driven AC Josephson voltage standard (ACJVS) generates calculable AC voltage
signals at low temperatures, whereas measurements are performed with a device under test
(DUT) at room temperature. The voltage leads cause the output voltage to show deviations that scale with the frequency squared. Error correction mechanisms investigated so far allow the ACJVS to be operational for frequencies up to 100 kHz. In this paper, calculations are presented to deal with these errors in terms of reflected waves. Impedance matching at the source side of the system, which is loaded with a high-impedance DUT, is proposed as an accurate method to mitigate these errors for frequencies up to 1 MHz. Simulations show that the influence of non-ideal component characteristics, such as the tolerance of the matching resistor, the capacitance of the load input impedance, losses in the voltage leads, non-homogeneity in the voltage leads, a non-ideal on-chip connection and inductors between the Josephson junction array and the voltage leads, can be corrected for using the proposed procedures. The results show that an expanded uncertainty of 12 parts in 106 (k = 2) at 1 MHz and 0.5 part in 106 (k = 2) at 100 kHz is within reach.