Conference paper Open Access

25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s

Weithoffer, Stefan; Abdel Nour, Charbel; Wehn, Norbert; Douillard, Catherine; Berrou, Claude


MARC21 XML Export

<?xml version='1.0' encoding='UTF-8'?>
<record xmlns="http://www.loc.gov/MARC21/slim">
  <leader>00000nam##2200000uu#4500</leader>
  <datafield tag="653" ind1=" " ind2=" ">
    <subfield code="a">Forward Error Correction</subfield>
  </datafield>
  <datafield tag="653" ind1=" " ind2=" ">
    <subfield code="a">Turbo decoder</subfield>
  </datafield>
  <datafield tag="653" ind1=" " ind2=" ">
    <subfield code="a">LTE</subfield>
  </datafield>
  <datafield tag="653" ind1=" " ind2=" ">
    <subfield code="a">High-throughput</subfield>
  </datafield>
  <controlfield tag="005">20191114191012.0</controlfield>
  <controlfield tag="001">2560066</controlfield>
  <datafield tag="711" ind1=" " ind2=" ">
    <subfield code="d">3-7 December 2018</subfield>
    <subfield code="g">ISTC 2018</subfield>
    <subfield code="a">International Symposium on Turbo Codes &amp; Iterative Information Processing 2018</subfield>
    <subfield code="c">Hong Kong</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">IMT Atlantique, Department of Electronics</subfield>
    <subfield code="a">Abdel Nour, Charbel</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">Department of Electrical and Computer Engineering, Technische Universitaet Kaiserslautern</subfield>
    <subfield code="a">Wehn, Norbert</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">IMT Atlantique, Department of Electronics</subfield>
    <subfield code="a">Douillard, Catherine</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="u">IMT Atlantique, Department of Electronics</subfield>
    <subfield code="a">Berrou, Claude</subfield>
  </datafield>
  <datafield tag="856" ind1="4" ind2=" ">
    <subfield code="s">442400</subfield>
    <subfield code="z">md5:78807b3c5a18f97b641170dcb9cb40ad</subfield>
    <subfield code="u">https://zenodo.org/record/2560066/files/25-years-turbo.pdf</subfield>
  </datafield>
  <datafield tag="542" ind1=" " ind2=" ">
    <subfield code="l">open</subfield>
  </datafield>
  <datafield tag="856" ind1="4" ind2=" ">
    <subfield code="y">Conference website</subfield>
    <subfield code="u">http://www.istc2018.org/</subfield>
  </datafield>
  <datafield tag="260" ind1=" " ind2=" ">
    <subfield code="c">2018-12-03</subfield>
  </datafield>
  <datafield tag="909" ind1="C" ind2="O">
    <subfield code="p">user-epic_h2020</subfield>
    <subfield code="o">oai:zenodo.org:2560066</subfield>
  </datafield>
  <datafield tag="100" ind1=" " ind2=" ">
    <subfield code="u">Department of Electrical and Computer Engineering, Technische Universitaet Kaiserslautern</subfield>
    <subfield code="a">Weithoffer, Stefan</subfield>
  </datafield>
  <datafield tag="245" ind1=" " ind2=" ">
    <subfield code="a">25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s</subfield>
  </datafield>
  <datafield tag="980" ind1=" " ind2=" ">
    <subfield code="a">user-epic_h2020</subfield>
  </datafield>
  <datafield tag="536" ind1=" " ind2=" ">
    <subfield code="c">760150</subfield>
    <subfield code="a">Enabling Practical Wireless Tb/s Communications with Next Generation Channel Coding</subfield>
  </datafield>
  <datafield tag="540" ind1=" " ind2=" ">
    <subfield code="u">http://creativecommons.org/licenses/by/4.0/legalcode</subfield>
    <subfield code="a">Creative Commons Attribution 4.0 International</subfield>
  </datafield>
  <datafield tag="650" ind1="1" ind2="7">
    <subfield code="a">cc-by</subfield>
    <subfield code="2">opendefinition.org</subfield>
  </datafield>
  <datafield tag="520" ind1=" " ind2=" ">
    <subfield code="a">&lt;p&gt;In this paper, we demonstrate how the development of parallel hardware architectures for turbo decoding can be continued to achieve a throughput of more than 100 Gb/s. A new, fully pipelined architecture shows better error correcting performance for high code rates than the fully parallel ap-proaches known from the literature. This is demonstrated by comparing both architectures for a frame size K = 128 LTE turbo code and a frame size K = 128 turbo code with parity puncture constrained interleaving. To the best of our knowledge, an investigation of the error correcting performance at high code rates of fully parallel decoders is missing from the literature. Moreover, place &amp;amp; route results for a case study implementation of the new architecture on 28 nm technology show a throughput of 102:4 Gb/s and an area efficiency of 4:34 Gb/s making it superior to reported implementations of other parallel decoder hardware architectures.&lt;/p&gt;</subfield>
  </datafield>
  <datafield tag="024" ind1=" " ind2=" ">
    <subfield code="a">10.1109/ISTC.2018.8625377</subfield>
    <subfield code="2">doi</subfield>
  </datafield>
  <datafield tag="980" ind1=" " ind2=" ">
    <subfield code="a">publication</subfield>
    <subfield code="b">conferencepaper</subfield>
  </datafield>
</record>
47
25
views
downloads
Views 47
Downloads 25
Data volume 11.1 MB
Unique views 39
Unique downloads 23

Share

Cite as