Dataset Open Access

REASSURE (H2020 731591) Dataset FPGA AES128

Davide Bellizia


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<oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd">
  <dc:creator>Davide Bellizia</dc:creator>
  <dc:date>2019-01-16</dc:date>
  <dc:description>This dataset contains 1M of power traces collected on a FPGA hardware implementation of the AES128 block cipher.</dc:description>
  <dc:description>Changelog
- V1.0: first publication of the dataset.
- V1.1: metadata added, files renamed, fix of some typos in the readme file. Data contained in each file merged into a structure, to achieve better compression.</dc:description>
  <dc:identifier>https://zenodo.org/record/2541684</dc:identifier>
  <dc:identifier>10.5281/zenodo.2541684</dc:identifier>
  <dc:identifier>oai:zenodo.org:2541684</dc:identifier>
  <dc:language>eng</dc:language>
  <dc:relation>info:eu-repo/grantAgreement/EC/H2020/731591/</dc:relation>
  <dc:relation>doi:10.5281/zenodo.1451509</dc:relation>
  <dc:rights>info:eu-repo/semantics/openAccess</dc:rights>
  <dc:rights>http://creativecommons.org/licenses/by/4.0/legalcode</dc:rights>
  <dc:subject>reassure</dc:subject>
  <dc:subject>side channel attack</dc:subject>
  <dc:subject>power analysis attack</dc:subject>
  <dc:subject>FPGA</dc:subject>
  <dc:subject>AES</dc:subject>
  <dc:title>REASSURE (H2020 731591) Dataset FPGA AES128</dc:title>
  <dc:type>info:eu-repo/semantics/other</dc:type>
  <dc:type>dataset</dc:type>
</oai_dc:dc>
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