A 100–140 GHz SiGe-BiCMOS sub-harmonic down-converter mixer

This paper demonstrates a wideband, subharmonic down converting mixer using a commercial 130-nm SiGe-BiCMOS technology. The mixer adopts a frequency doubling LO-stage, a differential switched-transconductance RF-stage, on-chip LO and RF baluns, and two emitter-follower buffer-stages. The measured results exhibit a maximum conversion gain up to 2.6 dB over the frequency range of 100 to 140 GHz with a LO power of 5 dBm. The mixer achieves an input referred 1-dB compression point of −7.2 dBm, with a DC power of 46.3 mW, including 26.7 mW for buffer-stages. It demonstrates also up to 12 GHz 3-dB IF bandwidth, which to the authors' best knowledge, is the highest obtained among active sub-harmonic mixers operating above 100 GHz. The chip occupies 0.4 mm2, including pads.


I. INTRODUCTION
The sub-harmonic mixer (SHM) is an attractive candidate for frequency conversion in micro-wave and millimeter-wave transceivers [1]. It requires only a fraction of the local oscillator (LO) frequency compared to a fundamental mixer and increases the LO-to-RF isolation significantly. Unfortunately, most of the high frequency SHMs above 100 GHz have relatively conversion loss, which imposes severe noise figure (NF), gain and linearity requirements on the low noise amplifier and following building blocks of receiver chain [2], [3], [4]. On the other hand, to realize a high gain amplifier at the RF or IF side, usually three to five stages are utilized, where it burdens the power budget of a low power system. Therefore, implementing a millimeter-wave downconverter SHM is challenging with respect to conversion gain, bandwidth, NF and linearity requirements.
Recently, several efforts have been done in literature to develop millimeter-wave SHMs with improved performance. In [5], a transformer-based gm-boosting SHM is presented operating at 79 GHz, where a conversion gain of 1.6 dB and NF of 13 dB is achieved with a LO power of -5 dBm. This technique boosts the RF transconductance without additional power consumption. However, it is not appropriate for operating frequencies above 100 GHz due to the additional loss of transformer network. In [6], a modified Gilbert-cell based on two stacked switching quads is reported for 122 GHz.
This topology shows better conversion gain compared to a Gilbert-cell configuration with parallel transistor pairs, which is adopted in [7] due to its higher operating frequency. However, as the frequency goes up, the maximum conversion gain and accordingly minimum NF occurs by non-quadrature LO signals due to the delay produced in RF path from the emitter to the collector of the switching stage [8]. Hence, a novel hybrid with an arbitrary phase shift is needed in order to provide an optimum LO phase distribution. Furthermore, owing to the several stacked transistors, a larger supply voltage is required to avoid the compression of the output voltage amplitude, which inevitably influences the power consumption of whole circuit. In [4], [9] a two-stage subharmonically base-pumped transconducance mixer is introduced that reaches to a maximum -1 dB and 9 dB conversion gain at D-band and V-band using a -1 dBm and 2 dBm LO power, respectively. This type of mixer utilizes the internal mixing of RF signal with the second-or higher-order harmonics of the LO signal, generated by nonlinearities of transistor itself. It features a better gain performance compared to a passive SHM [10], and a decent NF, however it has rather high conversion loss in sub-harmonic operation and requires a lower base bias along with a typically large driving LO power to fulfil the optimum conduction duty cycle [4]. Therefore, a power hungry IF buffer amplifier is usually exploited at the output, which correspondingly leads to a high power consumption, e.g. 120 mW [4] and 262 mW [9]. This paper presents a high conversion gain and a broadband transconductance SHM based on a bottom-LO frequency doubler to operate at 100 to 140 GHz frequency range. The aim of this work is to benchmark the performance of this topology above 100 GHz in a 130-nm SiGe-BiCMOS technology for the first time. To improve the gain-bandwidth and linearity characteristics of mixer, several techniques and approaches have been employed and followed from different publications.

II. CIRCUIT IMPLEMENTATION
The idea of a transconductace SHM with a bottom-LO frequency doubler was first demonstrated at 930 MHz [11] and is well described in [12]. Unlike a standard Gilbert-cell topology which implements the mixer function by a trans- conductance device followed by current commutating switching; this scheme achieves the same functionality by the switched transconductors. One of the main advantages of this structure is the high LO-to-RF and high LO-to-IF isolation. This is because the LO signal appears in common-mode at both RF and IF ports. Fig. 1 displays the simplified schematic diagram of the designed wideband SHM along with the fabricated chip photo. The SHM is implemented in a single balanced topology, driven by a differential LO-and RF-scheme. It consists of a push-push frequency doubler at LO-stage (Qs1/Qs2) and a differential switched-transconductance RF-stage (Qr1/Qr2). The LO-stage converts input differential LO voltage into current, which controls the transconductances of the RF-stage efficiently at twice the LO frequency. Consequently, two outof-phase subharmonic IF components (fIF=fRF-2fLO) are produced and conveyed to the output through resistive loads. It is worthy to note that the mixing core operates in a fundamental mode, where it has a better conversion gain than that in a sub-harmonic mode [4].
The output buffer-stage provides a 50 Ω matching over a broad bandwidth and enhance the RF-to-IF isolation at the output ports.
Both mixer core and buffers are biased with current sources, regulated by a reference current. Subsequently, a high current or a low current can be injected into the circuit, which accordingly offers a high linearity or moderate linearity operation. Regarding low break-down voltage of transistors, two series resistors of 150 Ω, (RE1/RE2), are placed at the collector of output current sources to prevent any damage under high current levels.
In order to achieve a wideband RF operation, Marchand baluns with broadside coupled lines are applied at both RF and LO ports [13]. A further improvement is done on baluns by removing the ground layer (M4) under the signal lines resulting to more compact layout and lower insertion loss [14]. Fig. 2 exhibits the simulated performance of each balun in terms of phase and amplitude imbalance, while the minimum loss is -1.3 dB and -2 dB, for RF and LO signals, respectively. As is seen in RF balun, the amplitude imbalance is better than 0.4 dB and the maximum phase difference is 3 degree. The LO balun also shows a maximum amplitude imbalance of 0.8 dB with a phase difference of 4 degree.
The high frequency RF signal is applied through a shunt spiral inductor (L1/L2) accompanied by a series line (TL1/TL2) to transform the low input impedance of transistor base to a higher value [3]. To do this, custom inductors are designed with one-turn symmetric structure on M6, where the simulated value of each inductor is about 20 pH with the maximum quality factor of 12.9 at 173 GHz, and the self-resonance frequency of 355 GHz.
To increase the LO swing across the emitter terminal of the RF transistors, a tuning-out series line (TL3) is adopted between RF and LO stages, implementing a π-network [15]. This network provides a higher conversion gain at lower LO powers and slightly enhances the RF-bandwidth of the mixer. Finally, the collector loads (RC1/RC2) incorporate 150 Ω resistors to provide a broadband IF response under a low supply voltage.
All passive components are simulated with a 2.5D planar EM-simulator using Sonnet/Cadence interface. The high frequency signal pads are also shielded from the substrate by a grounded layer and its capacitance is included in the simulation results.  III. EXPERIMENTAL RESULTS A SHM circuit is designed and fabricated in a 130-nm SiGe-BiCMOS process. This technology features high speed npn HBTs with maximum ft/fmax of 250 GHz/370 GHz and BVCEO = 1.5 V. As shown in Fig. 1 (b), the chip occupies 600 µm × 670 µm, while the active area including RF and LO baluns is only 500 µm × 430 µm. To characterize the mixer performance, on-wafer measurements are carried out. The RF signal is generated and calibrated using a Keysight N5242A microwave network analyzer from 10 MHz to 26.5 GHz and a N5262BW08, WR 8.0 based frequency converter to extend the frequency range from 90 to 140 GHz. The LO signal is provided from an Agilent E8257D, 250 KHz to 67 GHz PSG signal generator. A Rohde and Schwartz spectrum analyzer is used to measure the IF signal. Fig. 3 shows the measured conversion gain, input referred P1dB, and the total power consumption of circuit as a function of collector current in the mixer core (Icc-mixer), while the LOpower is fixed at 5 dBm. As can be seen, the conversion gain enhances with increasing the collector current of mixer core, which is controlled by a reference voltage (Vref) until it reaches to maximum value of 2.4 dB at Icc-mixer = 6.2 mA. Consequently, the input P1dB also improves and the total power consumption rapidly growths due to the high current levels of buffer-stages, where a -2.2 dBm input power at a 1-dB compression point is achieved with a power dissipation of 58.4 mW.
The variation of mixer conversion gain versus LO power is shown in Fig. 4 at a LO frequency of 57.5 GHz, RF frequency of 113 GHz and IF frequency of 2 GHz. A good agreement is obtained between simulation and measurement results. It demonstrates a positive gain from LO input power of +1 dBm. The LO frequency is swept from 46 to 68 GHz with an input power of 5 dBm, while the IF frequency is fixed at 2 GHz. As shown in Fig. 5, an RF frequency range from 98 to 140 GHz is achieved with a conversion gain of -0.4 to 2.6 dB, which represents more than 40 GHz 3-dB bandwidth. The 2LO-to-RF isolation is better than 45 dB over the entire bandwidth.
The measured IF response at LO frequency equal to 61 GHz is shown in Fig. 6. The results indicate a flat conversion gain, and 3-dB IF bandwidth is 12 GHz from 1 to 13 GHz. This is the widest IF bandwidth among silicon-based active sub-harmonic mixers operating above 100 GHz. Finally, Fig. 7 describes the output power at 2 GHz versus input power at RF frequency of 113 GHz. It can be seen, the circuit has a 1-dB compression at -7.2 dBm input power. The total power consumption is only 46.3 mW.
The simulated single-side band NF of the mixer is below 16 dB over the entire IF bandwidth, which is decent enough to be preceded by an LNA with a moderate NF.
In Table I, the performance of the presented SHM and other published results in the literature are listed. It can be seen that our SHM achieves competitive conversion gain, and record IF bandwidth with a good linearity.

IV. CONCLUSIONS
A wideband sub-harmonic bottom-LO down converting transconductance SHM is designed and presented in a 130-nm SiGe-BiCMOS process for F-band applications. This mixer features a high conversion gain up to 2.6 dB over the frequency range of 100 to 140 GHz with a LO power of 5 dBm. It demonstrates a good linearity and a wide IF bandwidth among the above 100 GHz active mixers. In addition, the SHM shows a port-to-port isolation better than 45 dB and a relatively small chip size.