Conference paper Open Access
Implementing RLWE-based Schemes Using an RSA Co-Processor
Albrecht, Martin R.; Hanser, Christian; Höller, Andrea; Pöppelmann, Thomas; Virdia, Fernando; Wallner, Andreas
We repurpose existing RSA/ECC co-processors for (ideal) lattice-based cryptography by exploiting the availability of fast long integer multiplication. Such co-processors are deployed in smart cards in passports and identity cards, secured microcontrollers and hardware
security modules (HSM). In particular, we demonstrate an implementation of a variant of the Module-LWE-based Kyber Key Encapsulation Mechanism (KEM) that is tailored for optimal performance on a commercially available smart card chip (SLE 78). To benefit from the RSA/ECC co-processor we use Kronecker substitution in combination with schoolbook and Karatsuba polynomial multiplication. Moreover, we speed-up symmetric operations in our Kyber variant using the AES co-processor to implement a PRNG and a SHA-256 co-processor to realise hash functions. This allows us to execute CCA-secure Kyber768 key generation in 79.6ms, encapsulation in 102.4 ms and decapsulation in 132.7 ms.
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01-Learning-errors-RSA-Co-Processors.pdf
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- Publication date:
- October 16, 2018
- DOI:
-
- Keyword(s):
- learning with errors smart card implementation
- Grants:
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European Commission:
- FutureTPM - Future Proofing the Connected World: A Quantum-Resistant Trusted Platform Module (779391)
- Communities:
- License (for files):
- Creative Commons Attribution 4.0 International