USE OF FIBER-OPTICS FOR REAL-TIME CONTROL AND DATA ACQUISITION

We have demonstrated the practical use of commercially available fiber-optic components for high-speed control of and readout from a small prototype of an electronics data acquisition system for a high-energy physics detector. This is the SVX microvertex detector system being readied for CDF. The fiber-optic components include the AMD TAXI parallel/serial transmitter and receiver sets, and Hewlett-Packard HFBR 1414 optical transmitters and HFBR 241 6 receivers. The SVX chip is controlled by a 12-bit field, which is updated via the optical fiber every clock cycle. Digital data are generated by the SVX every cycle and returned to the host system via a separate fiber. In this demonstration, the cycle time was set to -200 nsec; extension to 100 nsec is planned. The prototype test system set up at the Lawrence Berkeley Laboratory is described, and performance results are given. The expansion of this prototype system to the operation of a full scale microvertex physics detector front end system is also discussed.


INTRODUCTION
Recent advances in electro-optic technology can be used to advantage in real time control and data acquisition systems at the new accelerators and storage rings, and for the increasingly complex high energy physics detectors at the particle colliders in particular.Indeed, in the future, application of electro-optic methods will become a necessity.
The use of optical fibers as a transmission medium in large high-energy physics detectors is highly attractive for several reasons.Optical fibers can support data transmission at high rates.They neither pickup nor radiate electromagnetic noise, in contrast to multiconductor strip cable.They are also of inherently low mass, reducing particle interactions in them to a minimum.
In the last few years, a large spectrum of components for effecting communication via fiber optics has appeared in the marketplace.Most of these have been developed with intercomputer communication in mind.In this paper, we describe a system we have developed for using some of these new components to achieve real-time, high-speed control of an SVX integrated circuit chip and to acquire the data from the chip.The expansion of this prototype system to the operation, via fiber optics, of a full-scale physics detector front-end system is also described.

THE SVX CHIP: A TEST CASE
The SVX detector is a 36000 channel Silicon microstrip vertex detector designed to surround the pF collision region inside the Collider Detector at Fermilab (CDF).The SVX integrated circuit chip[ 13 is an integral part of that detector; each SVX chip acquires data from 128 strips on a microstrip detector.In our opinion, the SVX chip is a good present-day example of the future in high-energy physics instrumentation--i.e., the trend toward components of increasing complexity that are physically located entirely on the detector structure, and are normally not accessible once the detector is assembled.

U.S. Government work not protected by U.S.
Copyright executed upon the SVX chip include: downloading of a chip ID number into an SVX chip register; an analog refresh cycle; an analog signal acquisition and storage cycle; and a readout phase.During the readout phase, the analog value stored in each of the 128 channels can be output, along with two digital numbers: the channel number and the chip ID.
All of the above operations are controlled by a set of 12 digital signals which are externally generated by the system controller--e.g., host computer.Typically sets of these control signals--vectors--will be generated every 100-200 nanoseconds (governed by the Master Clock frequency), In an actual high energy collider application, the system controller will C I ock U / be located at least 10 meters away from the collision region.SimiIar distances will be involved at other accelerator or storage ring applications.A transmission medium must therefore be chosen that will conduct control and data signals, bidirectionally, between the host and the SVX chips, and do this with minimum susceptibility to cross-talk to/from other parts of the detector.The purpose of this work is to demonstrate the practicality of using fiber optic cables as the transmission medium.

PROTOTYPE FIBER-OPTIC LINK
A block diagram of the prototype system is shown in Figure 1 and the SDA.The SRS module is a programmable sequencer that generates multi-bit digital vectors, designed especially for controlling sophisticated integrated circuits.
Our small piece of detector electronics consists, in this prototype stage, of a single SVX integrated circuit chip.Although a single SVX chip--i.e., 128 channels worth--is shown, the expansion to a system of 10 or 12 chips is straightforward, because the SVX chips are designed such that several can be interfaced to a common bus system.

A. The Fiber
Single graded-index glass fibers of core (cladding) diameter 100 ( 140) pm (type HP HFBR AXSO10) were used in conjunction with optical transmitters (type HP HFBR 1414) and optical receivers (type HP 2416) [3].The transmitter contains a GaAlAs LED which emits light of wavelength 820 nm.The 60 nm wide spectrum of the emitter introduces chromatic dispersion in the fiber; however, this is not a limitation for the 10 m length of fiber link required for the SVX read-out.The optical receiver is an analog light-to-voltage converter, whose frequency response is dc to 125 Mhz.
Our tests were made with fibers that were 10m long.The time taken for a signal to propagate along this length of fiber, including the delays from the optical transmitter and receiver, was measured to be 66 ns.

B. Data Multiplexing
Since the fibers are inherently bit-serial links, and this application requires transmission of multi-bit parallel vectors, means must be provided to effect parallel-to-serial conversion and vice-versa.For our prototype system, we decided to utilize the power of the "Taxi" chip set--the 7968 transmitter and the 7969 receiver manufactured by AMD[4]--since the data field sizes and speeds of operation supported by this chip set are ideal for the SVX application.The 7968 is basically a parallel-serial multiplexer.We use it in the mode where it accepts as parallel inputs either a 10-bit 'data' vector or a two-bit 'command' vector.One or the other of these vectors is clocked into the 7968 every Master Clock cycle, and encoded into a 12-bit serial frame.The frames are then transmitted along the fiber, and eventually received as serial input data by a 7969 receiver.
The 7969 recovers the encoded data, restores it to parallel form, and outputs it as either a 10-bit 'data' vector or a two-bit 'command' vector.The Taxi pair, therefore, effectively provides a capability to transmit two types (command and data) of multi-bit digital vectors from one location to another.The conversion from parallel to serial, and viceversa is transparent to the user.

C. Basic Operation of the Prototype System
Sequences of 12-bit vectors are generated by a CAMAC-based programmable sequence generator, the SRS module[2].These are impressed on the 'data' and 'command' inputs of a 7968 transmitter.The vectors are generated at a rate controlled by the Master Clock.The same clock controls the rate at which the vectors are serialized into frames and sent onto the fiber towards the 7969 receiver.
During the readout phase, data which are generated by the SVX chip are transmitted back to the host system -exemplified by an SDA data acquisition module [2] in this case --via a return chain consisting of another Taxi pair.

D. Some Operational Details
Below we discuss several aspects of the operation in more detail:

l J Svnchronization
In a Taxi link, both bit and frame (byte) synchronization must be achieved and maintained to provide continuous, accurate communication.In essence the receiver must know precisely when to sample the incoming signal to extract bits (bit synchronization), and which bit is the start of a frame (frame synchronization).Bit synchronization is automatically supplied by the Taxi receiver, via use of its phase locked loop.Frame synchronization is established by sending a uniquely coded frame called a "sync" frame.Control software in the SRS is used to command the sending of sync frames, at frequent intervals, over the entire fiber-optic system.* a Master Clock This is a pipelined system.That is, the SVX output data resulting from a given control vector issued by the SRS arrive at the SDA after four parallelherial or seriaVparalle1 conversions in the various Taxi chips.To stabilize the latency inherent in this chain--i.e., to insure a constant round-tip delay--the Master Clock is used to synchronize all the processes, at both ends of the fibers.In this system, the Master Clock is located in the SRS module.Pulses from this Master Clock are supplied to all Taxi transmitters and receivers in the system.In a final version, these pulses would be transmitted to the remote Taxi chips via a separate fiber.
A phase adjusting circuit was necessary at some TAXI chips to compensate for delays in the optic links.
2 Convenience of "Command" and "Data"

Fields
Taxi chips have the facility to send and receive two classes of information, which are designated "command" and "data".Depending on the state of externally applied control signals at the Taxi transmitter, either command or data information is transmitted in a given frame; command has the higher priority.Command and data frames are uniquely identified by the Taxi receiver; their data are output on separate pins.
The Taxi chips have 12 logical single-bit input/output ports, which can be designated by the user, within certain limitations, as command or data ports.This is an excellent match to the SVX chip, where a total of 12 signals suffices to provide complete sequential control of the chip and to read out the entire data field of a particular event.In applying the Taxi chips to the SVX application, we have found it convenient to assign 10 ports as 'data' and two as 'command'.The latter two are used to convey signals (such as Read Enable and Write Enable) that change state relatively infrequently.

J Rate of Vector Transmission
With our Master Clock frequency set to lOMhz, the frame rate would be The Taxi chips employ a 5B/6B plus 5B/6B NRZI encoding in which each half of a 10 bit data word is encoded into a 6 bit symbol.This fiber optic data link would therefore have a serial link speed of 120 Mbaud, close to the maximum rated speed of the components.Because of the 5B/6B encoding this would result in a maximum useful data transmission rate of 100 Mbitdsec.To date all tests have been made at a Master Clock frequency of 5 MHz (data rate of 50 Mbits/sec).

DETECTOR
In the full-scale CDF-SVX detector, the smart VLSI SVX chips are mounted on board the detector itself.Groups of 12 SVX chips are organized into 'wedges'; there are 24 wedges in all.The 12 chips of each wedge are interfaced onto a single, local, bidirectional bus structure.The SVX chips in each wedge will respond to common control signals.However, during readout, the data on each wedge's bus are independently acquired.
It is anticipated that, during the first phase of operation of this detector, each wedge will be separately linked to the control and dataacquisition electronics, located outside the collision hall, by standard multi-conductor strip cable.*In the Taxi transmitter, both data and command inputs are ignored when its strobe input is inhibited.In this situation, the transmitter sends a sync frame.In our application, the configuration "both command bits zero" in the control software cccurs fairly frequently.This configuration is used to advantage to provide strobe inhibits and therefore transmission of sync frames on the down link at frequent intervals.At the receiving end, receipt of a sync frame clears to zero the Taxi receiver's command output pins.When both the latter are zero and the output data strobe of the receiver is not pulsed, the strobe to the return link Taxi transmitter is inhibited, forcing transmission of a sync frame on the return fiber link.In this way all receivers in the entire fiber link are frame synchronized.

A. Advantages of Fiber Optics
Schemes using multi-conductor strip cables are inherently prone to cross-coupling.In such a system it is difficult to entirely eliminate crosscoupling to and from the SVX system to other parts of the CDF detector.
The copper in the strip cable link presents material in the path of produced particles, creating undesirable background.For example, photons produced in the pjj collisions will convert in this material, creating a background of electron-positron pairs.Also, charged particles of physical interest in the event analysis will traverse the link material and undergo multiple Coulomb scattering, deteriorating the track-matching resolution between the SVX detector and the outer tracking detectors.The rms multiple scattering angle is 5 times greater and the area exposed 20 times greater for strip cable relative to fibers.
It should be noted, however, that not all the copper can be eliminated.There are inevitably copper conductors to convey electrical power to the SVX detector.
Given the above considerations, we are motivated to consider how our prototype system could be extended to constitute a fiberoptic read-out system for the full-scale CDF-SVX detector.

B . The Expanded System
Figure 2 shows a possibk scheme for one D A T A ACQUISITION AREA wedge; the complete SVX detector will encompass 24 wedges.The basic idea is as follows.Control signals from the SRS would be transmitted via fiber to all SVX wedges.Data from the individual wedges would be transmitted by separate return fibers, one for each wedge.The single Master Clock, accessible from the data acquisition area, would be used to synchronize timing between all transmitters and receivers in the entire scheme, just as in the prototype system.
It should be noted that in this scheme one has separate control fibers to each wedge.There would be 24 bundle modular units, each comprising 4 fibers, linking the data acquisition electronics to the SVX detector.Each bundle would link to a separate wedge.The advantage of this scheme is that each bundle-wedge unit will be independent of the others and will have its own control link.The 4 fibers will carry code on the "analog data" fiber.Alternatively, the transmission of analog information on the fiber could be investigated, with the ADC then in the SDA.

C. Radiation Effects
In designing a system for fiber readout of detectors surrounding the collision region in a collider experiment, it will be necessary to assess the effects of the hostile radiation environment on the fibers and chips.This assessment is beyond the scope of the present work.

CONCLUSION
We have demonstrated the use of commercially available optical fibers and multiplexer/demultiplexer chips for a real-time control and data acquisition application in highenergy physics.
Using current electro-optic technology at 820 nm, we have demonstrated read-out of smart VLSI chips for use with on-board frontend electronics of silicon microstrip detectors.
In particular, we have shown that data readout via fiber-optic links for the full-scale CDF-SVX detector appears feasible, with marked advantages over using standard multi-conductor strip cable.

FUTURE OUTLOOK
We wish to emphasize here the verypromising potential for application of fiberoptic read-out and decision making electrooptics for real time systems at detectors at the future colliders, for example at the SSC and LHC.Although these will necessarily involve a large number of signal elements and require high-rate capability, the methods described here involving signal transmission rates of -100 Mbits/sec will find useful application.We anticipate similar systems operating at 100 times this speed will also be needed.In addition, we envisage extensive application of bi-directional, multi-wavelength, signal transmission along fibers as a key element in developing rapid, primary level, event triggers.
The SVX chip contains 128 channels of analog and digital circuitry to acquire particlerelated signals from a silicon microstrip *This work was supported by the Director, Office of Energy Research, Office of High Energy and Nuclear Physics, Division of High Energy Physics of the U.S. Department of Energy under contract DE-AC03-detector.In a typical application, the operations 7 6s F00098.
Figure 1 , P r o t o t y p e c o n f i g u r a t i o n f o r c o n t r o l and r e a d o u t o f a s i n g l e SUX c h i p v i a f i b e r o p t i c s .
Figure 2 , Schematic o f c o n t r o l and r e a d o u t o f one wedge o f t h e expanded system, u s i n g a b u n d l e o f f o u r f i b e r s .The symbols Tx and Rx have t h e same meanings as i n f i g u r e 1 ,