../src/lowrisc_prim_generic_pad_wrapper_0/rtl/prim_generic_pad_wrapper.sv Cov: 100%
1: // Copyright lowRISC contributors.
2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3: // SPDX-License-Identifier: Apache-2.0
4: //
5: // Generic, technology independent pad wrapper. This is NOT synthesizable!
6:
7:
8: `include "prim_assert.sv"
9:
10: module prim_generic_pad_wrapper #(
11: parameter int unsigned AttrDw = 6
12: ) (
13: inout wire inout_io, // bidirectional pad
14: output logic in_o, // input data
15: input out_i, // output data
16: input oe_i, // output enable
17: // additional attributes {drive strength, keeper, pull-up, pull-down, open-drain, invert}
18: input [AttrDw-1:0] attr_i
19: );
20:
21: // get pad attributes
22: logic kp, pu, pd, od, inv;
23: typedef enum logic {STRONG_DRIVE = 1'b0, WEAK_DRIVE = 1'b1} drv_e;
24: drv_e drv;
25: assign {drv, kp, pu, pd, od, inv} = attr_i[5:0];
26:
27: // input inversion
28: assign in_o = inv ^ inout_io;
29:
30: // virtual open drain emulation
31: logic oe, out;
32: assign out = out_i ^ inv;
33: assign oe = oe_i & ((od & ~out) | ~od);
34:
35: // driving strength attributes are not supported by verilator
36: `ifdef VERILATOR
37: assign inout_io = (oe) ? out : 1'bz;
38: `else
39: // different driver types
40: assign (strong0, strong1) inout_io = (oe && drv == STRONG_DRIVE) ? out : 1'bz;
41: assign (pull0, pull1) inout_io = (oe && drv == WEAK_DRIVE) ? out : 1'bz;
42: // pullup / pulldown termination
43: // default to high-Z in case both PU and PD are asserted (safety mechanism).
44: assign (highz0, weak1) inout_io = pu & ~pd;
45: assign (weak0, highz1) inout_io = pu | ~pd;
46: // fake trireg emulation
47: assign (weak0, weak1) inout_io = (kp) ? inout_io : 1'bz;
48: `endif
49:
50: // assertions
51: `ASSERT_INIT(AttrDwCheck_A, AttrDw >= 7)
52:
53: endmodule : prim_generic_pad_wrapper
54: