../src/lowrisc_ip_aes_0.6/rtl/aes_pkg.sv Cov: 100%
1: // Copyright lowRISC contributors.
2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3: // SPDX-License-Identifier: Apache-2.0
4: //
5: // AES package
6:
7: package aes_pkg;
8:
9: typedef enum logic {
10: AES_ENC = 1'b0,
11: AES_DEC = 1'b1
12: } aes_op_e;
13:
14: typedef enum logic [2:0] {
15: AES_ECB = 3'b001,
16: AES_CBC = 3'b010,
17: AES_CTR = 3'b100
18: } aes_mode_e;
19:
20: typedef enum logic {
21: CIPH_FWD = 1'b0,
22: CIPH_INV = 1'b1
23: } ciph_op_e;
24:
25: typedef enum logic [2:0] {
26: AES_128 = 3'b001,
27: AES_192 = 3'b010,
28: AES_256 = 3'b100
29: } key_len_e;
30:
31: typedef enum logic {
32: DIP_DATA_IN,
33: DIP_CLEAR
34: } dip_sel_e;
35:
36: typedef enum logic {
37: SI_ZERO,
38: SI_DATA
39: } si_sel_e;
40:
41: typedef enum logic {
42: ADD_SI_ZERO,
43: ADD_SI_IV
44: } add_si_sel_e;
45:
46: typedef enum logic [1:0] {
47: STATE_INIT,
48: STATE_ROUND,
49: STATE_CLEAR
50: } state_sel_e;
51:
52: typedef enum logic [1:0] {
53: ADD_RK_INIT,
54: ADD_RK_ROUND,
55: ADD_RK_FINAL
56: } add_rk_sel_e;
57:
58: typedef enum logic {
59: KEY_INIT_INPUT,
60: KEY_INIT_CLEAR
61: } key_init_sel_e;
62:
63: typedef enum logic [2:0] {
64: IV_INPUT,
65: IV_DATA_OUT,
66: IV_DATA_IN_PREV,
67: IV_CTR,
68: IV_CLEAR
69: } iv_sel_e;
70:
71: typedef enum logic [1:0] {
72: KEY_FULL_ENC_INIT,
73: KEY_FULL_DEC_INIT,
74: KEY_FULL_ROUND,
75: KEY_FULL_CLEAR
76: } key_full_sel_e;
77:
78: typedef enum logic {
79: KEY_DEC_EXPAND,
80: KEY_DEC_CLEAR
81: } key_dec_sel_e;
82:
83: typedef enum logic [1:0] {
84: KEY_WORDS_0123,
85: KEY_WORDS_2345,
86: KEY_WORDS_4567,
87: KEY_WORDS_ZERO
88: } key_words_sel_e;
89:
90: typedef enum logic {
91: ROUND_KEY_DIRECT,
92: ROUND_KEY_MIXED
93: } round_key_sel_e;
94:
95: typedef enum logic [2:0] {
96: ADD_SO_ZERO,
97: ADD_SO_IV,
98: ADD_SO_DIP
99: } add_so_sel_e;
100:
101: // Multiplication by {02} (i.e. x) on GF(2^8)
102: // with field generating polynomial {01}{1b} (9'h11b)
103: // Sometimes also denoted by xtime().
104: function automatic logic [7:0] aes_mul2(logic [7:0] in);
105: logic [7:0] out;
106: out[7] = in[6];
107: out[6] = in[5];
108: out[5] = in[4];
109: out[4] = in[3] ^ in[7];
110: out[3] = in[2] ^ in[7];
111: out[2] = in[1];
112: out[1] = in[0] ^ in[7];
113: out[0] = in[7];
114: return out;
115: endfunction
116:
117: // Multiplication by {04} (i.e. x^2) on GF(2^8)
118: // with field generating polynomial {01}{1b} (9'h11b)
119: function automatic logic [7:0] aes_mul4(logic [7:0] in);
120: return aes_mul2(aes_mul2(in));
121: endfunction
122:
123: // Division by {02} (i.e. x) on GF(2^8)
124: // with field generating polynomial {01}{1b} (9'h11b)
125: // This is the inverse of aes_mul2() or xtime().
126: function automatic logic [7:0] aes_div2(logic [7:0] in);
127: logic [7:0] out;
128: out[7] = in[0];
129: out[6] = in[7];
130: out[5] = in[6];
131: out[4] = in[5];
132: out[3] = in[4] ^ in[0];
133: out[2] = in[3] ^ in[0];
134: out[1] = in[2];
135: out[0] = in[1] ^ in[0];
136: return out;
137: endfunction
138:
139: // Circular byte shift to the left
140: function automatic logic [31:0] aes_circ_byte_shift(logic [31:0] in, logic [1:0] shift);
141: logic [31:0] out;
142: logic [31:0] s;
143: s = {30'b0,shift};
144: out = {in[8*((7-s)%4) +: 8], in[8*((6-s)%4) +: 8],
145: in[8*((5-s)%4) +: 8], in[8*((4-s)%4) +: 8]};
146: return out;
147: endfunction
148:
149: // Transpose state matrix
150: function automatic logic [3:0][3:0][7:0] aes_transpose(logic [3:0][3:0][7:0] in);
151: logic [3:0][3:0][7:0] transpose;
152: transpose = '0;
153: for (int j=0; j<4; j++) begin
154: for (int i=0; i<4; i++) begin
155: transpose[i][j] = in[j][i];
156: end
157: end
158: return transpose;
159: endfunction
160:
161: // Extract single column from state matrix
162: function automatic logic [3:0][7:0] aes_col_get(logic [3:0][3:0][7:0] in, logic [1:0] idx);
163: logic [3:0][7:0] out;
164: for (int i=0; i<4; i++) begin
165: out[i] = in[i][idx];
166: end
167: return out;
168: endfunction
169:
170: // Matrix-vector multiplication in GF(2^8): c = A * b
171: function automatic logic [7:0] aes_mvm(
172: logic [7:0] vec_b,
173: logic [7:0] mat_a [8]
174: );
175: logic [7:0] vec_c;
176: vec_c = '0;
177: for (int i=0; i<8; i++) begin
178: for (int j=0; j<8; j++) begin
179: vec_c[i] = vec_c[i] ^ (mat_a[j][i] & vec_b[7-j]);
180: end
181: end
182: return vec_c;
183: endfunction
184:
185: endpackage
186: