../src/lowrisc_prim_abstract_clock_gating_0/prim_clock_gating.sv Cov: 76.9%

   1: // Copyright lowRISC contributors.
   2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
   3: // SPDX-License-Identifier: Apache-2.0
   4: 
   5: // This file is auto-generated.
   6: 
   7: `ifndef PRIM_DEFAULT_IMPL
   8:   `define PRIM_DEFAULT_IMPL prim_pkg::ImplGeneric
   9: `endif
  10: 
  11: module prim_clock_gating
  12: 
  13: #(
  14: 
  15: ) (
  16:   input        clk_i,
  17:   input        en_i,
  18:   input        test_en_i,
  19:   output logic clk_o
  20: );
  21:   parameter prim_pkg::impl_e Impl = `PRIM_DEFAULT_IMPL;
  22: 
  23: if (Impl == prim_pkg::ImplXilinx) begin : gen_xilinx
  24:     prim_xilinx_clock_gating u_impl_xilinx (
  25:       .*
  26:     );
  27: end else begin : gen_generic
  28:     prim_generic_clock_gating u_impl_generic (
  29:       .*
  30:     );
  31: end
  32: 
  33: endmodule
  34: