hw/ip/prim/rtl/prim_flop_2sync.sv Cov: 100%

   1: // Copyright lowRISC contributors.
   2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
   3: // SPDX-License-Identifier: Apache-2.0
   4: //
   5: // Generic double-synchronizer flop
   6: 
   7: module prim_flop_2sync #(
   8:   parameter int Width      = 16,
   9:   parameter bit ResetValue = 0
  10: ) (
  11:   input                    clk_i,    // receive clock
  12:   input                    rst_ni,
  13:   input        [Width-1:0] d,
  14:   output logic [Width-1:0] q
  15: );
  16: 
  17:   logic [Width-1:0] intq;
  18: 
  19:   always_ff @(posedge clk_i or negedge rst_ni)
  20:     if (!rst_ni) begin
  21:       intq <= {Width{ResetValue}};
  22:       q    <= {Width{ResetValue}};
  23:     end else begin
  24:       intq <= d;
  25:       q    <= intq;
  26:     end
  27: 
  28: endmodule
  29: