../src/lowrisc_ip_pwrmgr_0.1/rtl/pwrmgr_reg_pkg.sv Cov: 100%

   1: // Copyright lowRISC contributors.
   2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
   3: // SPDX-License-Identifier: Apache-2.0
   4: //
   5: // Register Package auto-generated by `reggen` containing data structure
   6: 
   7: package pwrmgr_reg_pkg;
   8: 
   9:   ////////////////////////////
  10:   // Typedefs for registers //
  11:   ////////////////////////////
  12:   typedef struct packed {
  13:     logic        q;
  14:   } pwrmgr_reg2hw_intr_state_reg_t;
  15: 
  16:   typedef struct packed {
  17:     logic        q;
  18:   } pwrmgr_reg2hw_intr_enable_reg_t;
  19: 
  20:   typedef struct packed {
  21:     logic        q;
  22:     logic        qe;
  23:   } pwrmgr_reg2hw_intr_test_reg_t;
  24: 
  25:   typedef struct packed {
  26:     struct packed {
  27:       logic        q;
  28:     } low_power_hint;
  29:     struct packed {
  30:       logic        q;
  31:     } core_clk_en;
  32:     struct packed {
  33:       logic        q;
  34:     } io_clk_en;
  35:     struct packed {
  36:       logic        q;
  37:     } main_pd_n;
  38:   } pwrmgr_reg2hw_control_reg_t;
  39: 
  40:   typedef struct packed {
  41:     logic        q;
  42:     logic        qe;
  43:   } pwrmgr_reg2hw_cfg_cdc_sync_reg_t;
  44: 
  45:   typedef struct packed {
  46:     logic [15:0] q;
  47:   } pwrmgr_reg2hw_wakeup_en_reg_t;
  48: 
  49:   typedef struct packed {
  50:     logic [1:0]  q;
  51:   } pwrmgr_reg2hw_reset_en_reg_t;
  52: 
  53:   typedef struct packed {
  54:     logic        q;
  55:   } pwrmgr_reg2hw_wake_info_capture_dis_reg_t;
  56: 
  57:   typedef struct packed {
  58:     struct packed {
  59:       logic [15:0] q;
  60:       logic        qe;
  61:     } reasons;
  62:     struct packed {
  63:       logic        q;
  64:       logic        qe;
  65:     } fall_through;
  66:     struct packed {
  67:       logic        q;
  68:       logic        qe;
  69:     } abort;
  70:   } pwrmgr_reg2hw_wake_info_reg_t;
  71: 
  72: 
  73:   typedef struct packed {
  74:     logic        d;
  75:     logic        de;
  76:   } pwrmgr_hw2reg_intr_state_reg_t;
  77: 
  78:   typedef struct packed {
  79:     logic        d;
  80:   } pwrmgr_hw2reg_ctrl_cfg_regwen_reg_t;
  81: 
  82:   typedef struct packed {
  83:     struct packed {
  84:       logic        d;
  85:       logic        de;
  86:     } low_power_hint;
  87:   } pwrmgr_hw2reg_control_reg_t;
  88: 
  89:   typedef struct packed {
  90:     logic        d;
  91:     logic        de;
  92:   } pwrmgr_hw2reg_cfg_cdc_sync_reg_t;
  93: 
  94:   typedef struct packed {
  95:     struct packed {
  96:       logic [15:0] d;
  97:     } reasons;
  98:     struct packed {
  99:       logic        d;
 100:     } fall_through;
 101:     struct packed {
 102:       logic        d;
 103:     } abort;
 104:   } pwrmgr_hw2reg_wake_info_reg_t;
 105: 
 106: 
 107:   ///////////////////////////////////////
 108:   // Register to internal design logic //
 109:   ///////////////////////////////////////
 110:   typedef struct packed {
 111:     pwrmgr_reg2hw_intr_state_reg_t intr_state; // [49:49]
 112:     pwrmgr_reg2hw_intr_enable_reg_t intr_enable; // [48:48]
 113:     pwrmgr_reg2hw_intr_test_reg_t intr_test; // [47:46]
 114:     pwrmgr_reg2hw_control_reg_t control; // [45:42]
 115:     pwrmgr_reg2hw_cfg_cdc_sync_reg_t cfg_cdc_sync; // [41:40]
 116:     pwrmgr_reg2hw_wakeup_en_reg_t wakeup_en; // [39:24]
 117:     pwrmgr_reg2hw_reset_en_reg_t reset_en; // [23:22]
 118:     pwrmgr_reg2hw_wake_info_capture_dis_reg_t wake_info_capture_dis; // [21:21]
 119:     pwrmgr_reg2hw_wake_info_reg_t wake_info; // [20:0]
 120:   } pwrmgr_reg2hw_t;
 121: 
 122:   ///////////////////////////////////////
 123:   // Internal design logic to register //
 124:   ///////////////////////////////////////
 125:   typedef struct packed {
 126:     pwrmgr_hw2reg_intr_state_reg_t intr_state; // [24:24]
 127:     pwrmgr_hw2reg_ctrl_cfg_regwen_reg_t ctrl_cfg_regwen; // [23:24]
 128:     pwrmgr_hw2reg_control_reg_t control; // [23:20]
 129:     pwrmgr_hw2reg_cfg_cdc_sync_reg_t cfg_cdc_sync; // [19:18]
 130:     pwrmgr_hw2reg_wake_info_reg_t wake_info; // [17:-3]
 131:   } pwrmgr_hw2reg_t;
 132: 
 133:   // Register Address
 134:   parameter logic [5:0] PWRMGR_INTR_STATE_OFFSET = 6'h 0;
 135:   parameter logic [5:0] PWRMGR_INTR_ENABLE_OFFSET = 6'h 4;
 136:   parameter logic [5:0] PWRMGR_INTR_TEST_OFFSET = 6'h 8;
 137:   parameter logic [5:0] PWRMGR_CTRL_CFG_REGWEN_OFFSET = 6'h c;
 138:   parameter logic [5:0] PWRMGR_CONTROL_OFFSET = 6'h 10;
 139:   parameter logic [5:0] PWRMGR_CFG_CDC_SYNC_OFFSET = 6'h 14;
 140:   parameter logic [5:0] PWRMGR_WAKEUP_EN_REGWEN_OFFSET = 6'h 18;
 141:   parameter logic [5:0] PWRMGR_WAKEUP_EN_OFFSET = 6'h 1c;
 142:   parameter logic [5:0] PWRMGR_WAKE_STATUS_OFFSET = 6'h 20;
 143:   parameter logic [5:0] PWRMGR_RESET_EN_REGWEN_OFFSET = 6'h 24;
 144:   parameter logic [5:0] PWRMGR_RESET_EN_OFFSET = 6'h 28;
 145:   parameter logic [5:0] PWRMGR_RESET_STATUS_OFFSET = 6'h 2c;
 146:   parameter logic [5:0] PWRMGR_WAKE_INFO_CAPTURE_DIS_OFFSET = 6'h 30;
 147:   parameter logic [5:0] PWRMGR_WAKE_INFO_OFFSET = 6'h 34;
 148: 
 149: 
 150:   // Register Index
 151:   typedef enum int {
 152:     PWRMGR_INTR_STATE,
 153:     PWRMGR_INTR_ENABLE,
 154:     PWRMGR_INTR_TEST,
 155:     PWRMGR_CTRL_CFG_REGWEN,
 156:     PWRMGR_CONTROL,
 157:     PWRMGR_CFG_CDC_SYNC,
 158:     PWRMGR_WAKEUP_EN_REGWEN,
 159:     PWRMGR_WAKEUP_EN,
 160:     PWRMGR_WAKE_STATUS,
 161:     PWRMGR_RESET_EN_REGWEN,
 162:     PWRMGR_RESET_EN,
 163:     PWRMGR_RESET_STATUS,
 164:     PWRMGR_WAKE_INFO_CAPTURE_DIS,
 165:     PWRMGR_WAKE_INFO
 166:   } pwrmgr_id_e;
 167: 
 168:   // Register width information to check illegal writes
 169:   parameter logic [3:0] PWRMGR_PERMIT [14] = '{
 170:     4'b 0001, // index[ 0] PWRMGR_INTR_STATE
 171:     4'b 0001, // index[ 1] PWRMGR_INTR_ENABLE
 172:     4'b 0001, // index[ 2] PWRMGR_INTR_TEST
 173:     4'b 0001, // index[ 3] PWRMGR_CTRL_CFG_REGWEN
 174:     4'b 0001, // index[ 4] PWRMGR_CONTROL
 175:     4'b 0001, // index[ 5] PWRMGR_CFG_CDC_SYNC
 176:     4'b 0001, // index[ 6] PWRMGR_WAKEUP_EN_REGWEN
 177:     4'b 0011, // index[ 7] PWRMGR_WAKEUP_EN
 178:     4'b 0011, // index[ 8] PWRMGR_WAKE_STATUS
 179:     4'b 0001, // index[ 9] PWRMGR_RESET_EN_REGWEN
 180:     4'b 0001, // index[10] PWRMGR_RESET_EN
 181:     4'b 0001, // index[11] PWRMGR_RESET_STATUS
 182:     4'b 0001, // index[12] PWRMGR_WAKE_INFO_CAPTURE_DIS
 183:     4'b 0111  // index[13] PWRMGR_WAKE_INFO
 184:   };
 185: endpackage
 186: 
 187: