hw/ip/prim/abstract/prim_ram_1p.sv Cov: 96%

   1: // Copyright lowRISC contributors.
   2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
   3: // SPDX-License-Identifier: Apache-2.0
   4: 
   5: // TODO: This module is a hard-coded stopgap to select an implementation of an
   6: // "abstract module". This module is to be replaced by generated code.
   7: 
   8: `ifndef PRIM_DEFAULT_IMPL
   9:   `define PRIM_DEFAULT_IMPL prim_pkg::ImplGeneric
  10: `endif
  11: 
  12: module prim_ram_1p #(
  13:   parameter prim_pkg::impl_e Impl = `PRIM_DEFAULT_IMPL,
  14: 
  15:   parameter int Width           = 32, // bit
  16:   parameter int Depth           = 128,
  17:   parameter int DataBitsPerMask = 1, // Number of data bits per bit of write mask
  18:   localparam int Aw             = $clog2(Depth) // derived parameter
  19: ) (
  20:   input clk_i,
  21:   input rst_ni,       // Memory content reset
  22: 
  23:   input                    req_i,
  24:   input                    write_i,
  25:   input        [Aw-1:0]    addr_i,
  26:   input        [Width-1:0] wdata_i,
  27:   input        [Width-1:0] wmask_i,
  28:   output logic             rvalid_o,
  29:   output logic [Width-1:0] rdata_o
  30: );
  31: 
  32:   import prim_pkg::*;
  33: 
  34:   if (Impl == ImplGeneric || Impl == ImplXilinx) begin : gen_mem_generic
  35:     prim_generic_ram_1p #(
  36:       .Width(Width),
  37:       .Depth(Depth),
  38:       .DataBitsPerMask(DataBitsPerMask)
  39:     ) u_impl_generic (
  40:       .clk_i,
  41:       .rst_ni,
  42:       .req_i,
  43:       .write_i,
  44:       .addr_i,
  45:       .wdata_i,
  46:       .wmask_i,
  47:       .rvalid_o,
  48:       .rdata_o
  49:     );
  50:   end else begin : gen_failure
  51:     // TODO: Find code that works across tools and causes a compile failure
  52:   end
  53: 
  54: endmodule
  55: