../src/lowrisc_ip_nmi_gen_0.1/rtl/nmi_gen.sv Cov: 97.4%

   1: // Copyright lowRISC contributors.
   2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
   3: // SPDX-License-Identifier: Apache-2.0
   4: //
   5: // NMI generator. This is a simple helper unit that wraps the escalation signal
   6: // receivers and converts them into interrupts such that they can be tested in system.
   7: // See also alert handler documentation for more context.
   8: 
   9: module nmi_gen
  10:   import prim_esc_pkg::*;
  11: #(
  12:   // leave constant
  13:   localparam int unsigned N_ESC_SEV = 4
  14: ) (
  15:   input                           clk_i,
  16:   input                           rst_ni,
  17:   // Bus Interface (device)
  18:   input  tlul_pkg::tl_h2d_t       tl_i,
  19:   output tlul_pkg::tl_d2h_t       tl_o,
  20:   // Interrupt Requests
  21:   output logic                    intr_esc0_o,
  22:   output logic                    intr_esc1_o,
  23:   output logic                    intr_esc2_o,
  24:   output logic                    intr_esc3_o,
  25:   // Escalation outputs
  26:   input  esc_tx_t [N_ESC_SEV-1:0] esc_tx_i,
  27:   output esc_rx_t [N_ESC_SEV-1:0] esc_rx_o
  28: );
  29: 
  30:   //////////////////////
  31:   // Regfile instance //
  32:   //////////////////////
  33: 
  34:   logic [N_ESC_SEV-1:0] esc_en;
  35:   nmi_gen_reg_pkg::nmi_gen_reg2hw_t reg2hw;
  36:   nmi_gen_reg_pkg::nmi_gen_hw2reg_t hw2reg;
  37: 
  38:   nmi_gen_reg_top i_reg (
  39:     .clk_i,
  40:     .rst_ni,
  41:     .tl_i,
  42:     .tl_o,
  43:     .reg2hw,
  44:     .hw2reg,
  45:     .devmode_i(1'b1)
  46:   );
  47: 
  48:   ////////////////
  49:   // Interrupts //
  50:   ////////////////
  51: 
  52:   prim_intr_hw #(
  53:     .Width(1)
  54:   ) i_intr_esc0 (
  55:     .event_intr_i           ( esc_en[0]                  ),
  56:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc0.q  ),
  57:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc0.q    ),
  58:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc0.qe   ),
  59:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc0.q   ),
  60:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc0.de  ),
  61:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc0.d   ),
  62:     .intr_o                 ( intr_esc0_o                )
  63:   );
  64: 
  65:   prim_intr_hw #(
  66:     .Width(1)
  67:   ) i_intr_esc1 (
  68:     .event_intr_i           ( esc_en[1]                  ),
  69:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc1.q  ),
  70:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc1.q    ),
  71:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc1.qe   ),
  72:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc1.q   ),
  73:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc1.de  ),
  74:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc1.d   ),
  75:     .intr_o                 ( intr_esc1_o                )
  76:   );
  77: 
  78:   prim_intr_hw #(
  79:     .Width(1)
  80:   ) i_intr_esc2 (
  81:     .event_intr_i           ( esc_en[2]                  ),
  82:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc2.q  ),
  83:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc2.q    ),
  84:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc2.qe   ),
  85:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc2.q   ),
  86:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc2.de  ),
  87:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc2.d   ),
  88:     .intr_o                 ( intr_esc2_o                )
  89:   );
  90: 
  91:   prim_intr_hw #(
  92:     .Width(1)
  93:   ) i_intr_esc3 (
  94:     .event_intr_i           ( esc_en[3]                  ),
  95:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc3.q  ),
  96:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc3.q    ),
  97:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc3.qe   ),
  98:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc3.q   ),
  99:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc3.de  ),
 100:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc3.d   ),
 101:     .intr_o                 ( intr_esc3_o                )
 102:   );
 103: 
 104:   /////////////////////////////////////////
 105:   // Connect escalation signal receivers //
 106:   /////////////////////////////////////////
 107:   for (genvar k = 0; k < N_ESC_SEV; k++) begin : gen_esc_sev
 108:     prim_esc_receiver i_prim_esc_receiver (
 109:       .clk_i,
 110:       .rst_ni,
 111:       .esc_en_o ( esc_en[k]   ),
 112:       .esc_rx_o ( esc_rx_o[k] ),
 113:       .esc_tx_i ( esc_tx_i[k] )
 114:     );
 115:   end : gen_esc_sev
 116: 
 117: endmodule : nmi_gen
 118: