hw/ip/nmi_gen/rtl/nmi_gen.sv Cov: 98%

   1: // Copyright lowRISC contributors.
   2: // Licensed under the Apache License, Version 2.0, see LICENSE for details.
   3: // SPDX-License-Identifier: Apache-2.0
   4: //
   5: // NMI generator. This is a simple helper unit that wraps the escalation signal
   6: // receivers and converts them into interrupts such that they can be tested in system.
   7: // See also alert handler documentation for more context.
   8: 
   9: module nmi_gen import prim_pkg::*; #(
  10:   // leave constant
  11:   localparam int unsigned N_ESC_SEV = 4
  12: ) (
  13:   input                           clk_i,
  14:   input                           rst_ni,
  15:   // Bus Interface (device)
  16:   input  tlul_pkg::tl_h2d_t       tl_i,
  17:   output tlul_pkg::tl_d2h_t       tl_o,
  18:   // Interrupt Requests
  19:   output logic                    intr_esc0_o,
  20:   output logic                    intr_esc1_o,
  21:   output logic                    intr_esc2_o,
  22:   output logic                    intr_esc3_o,
  23:   // Escalation outputs
  24:   input  esc_tx_t [N_ESC_SEV-1:0] esc_tx_i,
  25:   output esc_rx_t [N_ESC_SEV-1:0] esc_rx_o
  26: );
  27: 
  28:   //////////////////////
  29:   // Regfile instance //
  30:   //////////////////////
  31: 
  32:   logic [N_ESC_SEV-1:0] esc_en;
  33:   nmi_gen_reg_pkg::nmi_gen_reg2hw_t reg2hw;
  34:   nmi_gen_reg_pkg::nmi_gen_hw2reg_t hw2reg;
  35: 
  36:   nmi_gen_reg_top i_reg (
  37:     .clk_i,
  38:     .rst_ni,
  39:     .tl_i,
  40:     .tl_o,
  41:     .reg2hw,
  42:     .hw2reg,
  43:     .devmode_i(1'b1)
  44:   );
  45: 
  46:   ////////////////
  47:   // Interrupts //
  48:   ////////////////
  49: 
  50:   prim_intr_hw #(
  51:     .Width(1)
  52:   ) i_intr_esc0 (
  53:     .event_intr_i           ( esc_en[0]                  ),
  54:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc0.q  ),
  55:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc0.q    ),
  56:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc0.qe   ),
  57:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc0.q   ),
  58:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc0.de  ),
  59:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc0.d   ),
  60:     .intr_o                 ( intr_esc0_o                )
  61:   );
  62: 
  63:   prim_intr_hw #(
  64:     .Width(1)
  65:   ) i_intr_esc1 (
  66:     .event_intr_i           ( esc_en[1]                  ),
  67:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc1.q  ),
  68:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc1.q    ),
  69:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc1.qe   ),
  70:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc1.q   ),
  71:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc1.de  ),
  72:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc1.d   ),
  73:     .intr_o                 ( intr_esc1_o                )
  74:   );
  75: 
  76:   prim_intr_hw #(
  77:     .Width(1)
  78:   ) i_intr_esc2 (
  79:     .event_intr_i           ( esc_en[2]                  ),
  80:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc2.q  ),
  81:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc2.q    ),
  82:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc2.qe   ),
  83:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc2.q   ),
  84:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc2.de  ),
  85:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc2.d   ),
  86:     .intr_o                 ( intr_esc2_o                )
  87:   );
  88: 
  89:   prim_intr_hw #(
  90:     .Width(1)
  91:   ) i_intr_esc3 (
  92:     .event_intr_i           ( esc_en[3]                  ),
  93:     .reg2hw_intr_enable_q_i ( reg2hw.intr_enable.esc3.q  ),
  94:     .reg2hw_intr_test_q_i   ( reg2hw.intr_test.esc3.q    ),
  95:     .reg2hw_intr_test_qe_i  ( reg2hw.intr_test.esc3.qe   ),
  96:     .reg2hw_intr_state_q_i  ( reg2hw.intr_state.esc3.q   ),
  97:     .hw2reg_intr_state_de_o ( hw2reg.intr_state.esc3.de  ),
  98:     .hw2reg_intr_state_d_o  ( hw2reg.intr_state.esc3.d   ),
  99:     .intr_o                 ( intr_esc3_o                )
 100:   );
 101: 
 102:   /////////////////////////////////////////
 103:   // Connect escalation signal receivers //
 104:   /////////////////////////////////////////
 105:   for (genvar k = 0; k < N_ESC_SEV; k++) begin : gen_esc_sev
 106:     prim_esc_receiver i_prim_esc_receiver (
 107:       .clk_i,
 108:       .rst_ni,
 109:       .esc_en_o ( esc_en[k]   ),
 110:       .esc_rx_o ( esc_rx_o[k] ),
 111:       .esc_tx_i ( esc_tx_i[k] )
 112:     );
 113:   end : gen_esc_sev
 114: 
 115: endmodule : nmi_gen
 116: