example0_i-a_t-0.1.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example1_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example2_i-a_t-0.1.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example3_i-a_t-0.1.v
if(unlock)
begin
	locked <= d;
	end
else
begin
	locked <= locked;
	end
 


========================================================
example4_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example5_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example6_i-a_t-0.1.v
if(unlock)
begin
	locked <= d;
	end
else
begin
	locked <= locked;
	end
 


========================================================
example7_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example8_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example9_i-a_t-0.1.v
if(unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end

 


========================================================
example10_i-a_t-0.1.v
if(unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example11_i-a_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example12_i-a_t-0.1.v
if(unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example13_i-a_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example14_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example15_i-a_t-0.1.v
if(unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end

 


========================================================
example16_i-a_t-0.1.v
if(unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end

 


========================================================
example17_i-a_t-0.1.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example18_i-a_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example19_i-a_t-0.1.v
assign locked = (unlock) ? d : locked;

 


========================================================
example0_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example1_i-a_t-0.3.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example2_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example3_i-a_t-0.3.v

if (~resetn) begin
 locked <= 1'b0;
end else begin
if (unlock) begin
 locked <= d;
end else begin
locked <= locked;
end
end

 


========================================================
example4_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example5_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example6_i-a_t-0.3.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example7_i-a_t-0.3.v
if (unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example8_i-a_t-0.3.v
// Ensure that the lock signal does not propagate when the input is deasserted.
assign locked = (unlock) ? d : locked;

 


========================================================
example9_i-a_t-0.3.v
if(unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end
 

========================================================
example10_i-a_t-0.3.v
if (unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example11_i-a_t-0.3.v
if (unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end

 


========================================================
example12_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example13_i-a_t-0.3.v
if(unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end

 


========================================================
example14_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example15_i-a_t-0.3.v
assign locked = (unlock)?d:locked;

 


========================================================
example16_i-a_t-0.3.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example17_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;


 


========================================================
example18_i-a_t-0.3.v
if (unlock) begin
	locked <= d;
end else begin
	locked <= locked;
end

 


========================================================
example19_i-a_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example0_i-a_t-0.5.v
assign locked = (unlock)?d:locked;

 


========================================================
example1_i-a_t-0.5.v
if(unlock) locked <= d;
else locked <= locked;

 

========================================================
example2_i-a_t-0.5.v
assign locked = (unlock) ? d : locked;

 


========================================================
example3_i-a_t-0.5.v
// This is a good trick to remember: 
// if you're going to test something
// that changes over time, use a clocked always block
// to put the correct value in the register at each clock
// edge.
//
// If you're going to test something that is only
// true for one clock cycle, use a combinational always block
// with a begin/end block.
//
if(~resetn) begin
	locked <= 1'b0;
end
else begin
	if(unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example4_i-a_t-0.5.v
assign locked = (unlock) ? d : locked;

 


========================================================
example5_i-a_t-0.5.v
if(unlock)
locked <= d;
else
locked <= locked;
 


========================================================
example6_i-a_t-0.5.v
if (~resetn) locked <= 1'b0;
else if (unlock) locked <= d;
 

========================================================
example7_i-a_t-0.5.v
if(unlock)
begin
	if(resetn == 0)
	begin
	locked <= 0;
	end
	else
	begin
	locked <= d;
	end
end
else
begin
	if(resetn == 0)
	begin
	locked <= 1'b1;
	end
	else
	begin
	locked <= locked;
	end
end

 


========================================================
example8_i-a_t-0.5.v

if (!resetn) begin
	locked <= 1'b0;
end

else if (unlock) begin
	locked <= d;
end

else begin
	locked <= locked;
end

 


========================================================
example9_i-a_t-0.5.v
if(unlock) begin
	locked <= d;
end else begin
	locked <= locked;
end

 


========================================================
example10_i-a_t-0.5.v
assign locked = (unlock)? (d):(locked);

 


========================================================
example11_i-a_t-0.5.v
assign locked = (unlock) ? 1'b0 : d;

 


========================================================
example12_i-a_t-0.5.v

if(~resetn) begin
	locked <= 1'b0;
end
else begin
	if(unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example13_i-a_t-0.5.v
if(unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example14_i-a_t-0.5.v
if(unlock)begin
	locked <= d;
end
else if(resetn == 1'b0) begin
	locked <= 0;
end
else begin
	locked <= locked;
end

 


========================================================
example15_i-a_t-0.5.v

if (!resetn) begin
	locked <= 1'b0;
end
else if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example16_i-a_t-0.5.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example17_i-a_t-0.5.v
assign locked = (unlock) ? d : locked;

 


========================================================
example18_i-a_t-0.5.v
assign locked = (unlock) ? d : locked;

 


========================================================
example19_i-a_t-0.5.v
// This is a bit complex, but I think it works
// - as in the behaviour is correct
// - but it's not synthesizable

if (~resetn) begin
	locked <= 1'b0;
end else if (~unlock) begin
	locked <= 1'b0;
end else if (locked_on_reset) begin
	locked <= 1'b1;
end else if (locked) begin
	locked <= 1'b0;
end else if (clk) begin
	locked <= 1'b1;
end

 


========================================================
example0_i-a_t-0.7.v
assign enabled = (unlock) ? 1'b1 : 1'b0;
assign valid = (unlock) ? d : locked;

always @(posedge clk or negedge resetn) begin
	if (!resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= valid;
	end
end


========================================================
example1_i-a_t-0.7.v
assign locked = (unlock) ? d : locked;

 


========================================================
example2_i-a_t-0.7.v
assign enabled = (unlock)?1'b1:1'b0;
assign d_in = (unlock)?d:1'bz;

always @(posedge clk or negedge resetn) begin

if(~resetn | ~enabled) begin
locked <= 1'b0;
end

else begin
locked <= d_in;
end

end


========================================================
example3_i-a_t-0.7.v
if(unlock) locked <= d;
else locked <= locked;

 


========================================================
example4_i-a_t-0.7.v
if (unlock) 
locked <= d;
else 
locked <= locked;

 


========================================================
example5_i-a_t-0.7.v
if (resetn == 0 || unlock == 0) begin
	locked <= 0;
end
else begin
	locked <= d;
end

 


========================================================
example6_i-a_t-0.7.v
if(unlock)
	locked <= d;
else 
	locked <= locked;
 


========================================================
example7_i-a_t-0.7.v
assign locked = (unlock) ? d : locked;

 


========================================================
example8_i-a_t-0.7.v
always @(*) begin
	if(unlock) locked <= d;
	else locked <= locked;
end

 


========================================================
example9_i-a_t-0.7.v
assign #1 locked = (unlock) ? d : locked;

 


========================================================
example10_i-a_t-0.7.v
case ({unlock})
	1'b1: locked <= d;
	default: locked <= locked;
endcase
 


========================================================
example11_i-a_t-0.7.v
assign locked = (unlock) ? d : locked;

 


========================================================
example12_i-a_t-0.7.v
assign locked = (unlock) ? d : locked;

 

========================================================
example13_i-a_t-0.7.v
if(~resetn) locked <= 1'b0;
else if(unlock) locked <= d;

 


========================================================
example14_i-a_t-0.7.v
if (unlock) begin
	locked <= d;
end else if (!resetn) begin
	locked <= 0;
end else begin
	locked <= locked;
end

 


========================================================
example15_i-a_t-0.7.v
if(unlock) locked <= d;
else locked <= locked;
 

========================================================
example16_i-a_t-0.7.v
assign temp = (unlock)?d:locked;
assign locked = (temp)?1'b0:1'b1;

 


========================================================
example17_i-a_t-0.7.v

// if you're using the double negation trick shown above,
// then you must flip the input d as well

if (resetn == 1'b0) begin
 locked <= 1'b0;
end
else if (unlock == 1'b1) begin
 locked <= d;
end
else begin
 locked <= locked;
end

 


========================================================
example18_i-a_t-0.7.v
// laboualu
locked <= (unlock)?1'b0:locked;

 


========================================================
example19_i-a_t-0.7.v
assign en = (unlock) ? d : locked;

if(en)
locked <= 1;
else
locked <= 0;


 


========================================================
example0_i-a_t-0.9.v
assign combout = (unlock) ? d : locked;

// LATCHED:
//��下面的assign combout = ~locked;

// RIGHT:
// edited to latch lock according to defaults
assign combout = (~locked) | d;

// RIGHT END:
// set *default* to 5'b00000, 1*1*1*1
assign combout = (~locked) | 0;

 


========================================================
example1_i-a_t-0.9.v
always@(posedge clk or negedge resetn) begin
	if(!resetn) begin
 	locked <= 1'b0;
	end
	else begin
	if(unlock) 
	locked <= 1'b0;
	else begin
	locked <= 1'b1;
	end
	end
end

 


========================================================
example2_i-a_t-0.9.v
assign locked = (unlock==1'b1) ? ~locked : locked; // Toggle on reset

 


========================================================
example3_i-a_t-0.9.v

if(unlock == 1) begin
	locked <= d;
end else if (unlock == 0) begin
	locked <= locked;
end else begin
	locked <= locked;
end

 


========================================================
example4_i-a_t-0.9.v
lock_reg <= (unlock)?d:lock_reg;
locked <= (unlock)?d:lock_reg;

 


========================================================
example5_i-a_t-0.9.v
if(unlock) begin
	locked <= d;
end else begin
	locked <= locked;
end

/*
//traditional method
always @(*) begin
	case ({clk,resetn})
	
	{1'b0,1'b0}:locked <= locked;
	
	{1'b0,1'b1}:locked <= d;
	
	{1'b1,1'b0}:locked <= 1'b0;
	
	{1'b1,1'b1}:locked <= d;
	
	endcase
end
*/
 


========================================================
example6_i-a_t-0.9.v

/*
if not resetn:
locked <= 1'b0;
else
if (unlock):
locked <= d;
*/

if (d == 1'b1 && resetn == 1'b0) begin
locked <= 1'b1;
end else begin
locked <= 1'b0;
end

 



========================================================
example7_i-a_t-0.9.v
always @(*) begin
	if(unlock)
	locked <= d;
	else
	locked <= locked;
	end
 

========================================================
example8_i-a_t-0.9.v
if(!resetn) begin
	locked <= 0;
end
else begin
	if (unlock)locked <=0;
	else begin
	locked <= d;
	end
end

 


========================================================
example9_i-a_t-0.9.v
if (~resetn) begin
locked <= 1'b0;
end else if (unlock) begin
locked <= d;
end else begin
locked <= locked;
end
 


========================================================
example10_i-a_t-0.9.v
assign locked = (unlock) ? d : locked;

 


========================================================
example11_i-a_t-0.9.v
always @(unlock)
begin
if(unlock)
 locked <= d;
else
 locked <= locked;
end


 


========================================================
example12_i-a_t-0.9.v

if (unlock) begin
	locked <= d;
	end
else if (resetn == 0) begin 
	locked <= 0;
	end
	else 
	locked <= locked;

 


========================================================
example13_i-a_t-0.9.v
// Warning:synthesis translate_off
locked <= d;
// Warning:synthesis translate_on

 


========================================================
example14_i-a_t-0.9.v
if (~resetn) begin
	locked <= 0;
	end
else if (unlock) begin
	locked <= d;
	end
// end 


========================================================
example15_i-a_t-0.9.v

if (!resetn) begin
	locked <= 1'b0;
end else if (unlock) begin
	locked <= 1'b0;
end else begin
	locked <= d;
end

 


========================================================
example16_i-a_t-0.9.v

if (!resetn) begin // reset
locked <= d ;
end
else
if (unlock) begin
locked <= d;
 

 


========================================================
example17_i-a_t-0.9.v

if (!resetn) begin
 locked <= 1'b0;
end else begin
if (unlock) begin
 locked <= d;
 end else begin
 locked <= locked;
 end
end

 


========================================================
example18_i-a_t-0.9.v
always @(posedge clk or negedge resetn) begin
if(!resetn)
locked <= 1;
else if (unlock)
locked <= 0;
else
locked <= d;
end

 





========================================================
example19_i-a_t-0.9.v
if (unlock==0)begin
	locked <= d;
end
 

========================================================
example0_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example1_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example2_i-b_t-0.1.v
always @(*) begin
	if (unlock)
	locked <= d;
	else
	locked <= locked;
end

 


========================================================
example3_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example4_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example5_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example6_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example7_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example8_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example9_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example10_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example11_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example12_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example13_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example14_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example15_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example16_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example17_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example18_i-b_t-0.1.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example19_i-b_t-0.1.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example0_i-b_t-0.3.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example1_i-b_t-0.3.v
if (unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example2_i-b_t-0.3.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example3_i-b_t-0.3.v

if (!resetn) begin
	locked <= 1'b0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example4_i-b_t-0.3.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example5_i-b_t-0.3.v
if(unlock) locked <= d;
else locked <= locked;

 


========================================================
example6_i-b_t-0.3.v
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
 


========================================================
example7_i-b_t-0.3.v
if (unlock) begin
	locked <= d;
end else begin
	locked <= locked;
end

 


========================================================
example8_i-b_t-0.3.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example9_i-b_t-0.3.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example10_i-b_t-0.3.v
assign locked = (unlock) ? d : locked;

 


========================================================
example11_i-b_t-0.3.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example12_i-b_t-0.3.v
if(unlock) locked <= d;
else locked <= locked;

 


========================================================
example13_i-b_t-0.3.v
if (unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example14_i-b_t-0.3.v
if(unlock)
	locked <= d;
else
	locked <= locked;

 


========================================================
example15_i-b_t-0.3.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example16_i-b_t-0.3.v
always @(*) begin
	if(unlock)
	locked <= d;
	else
	locked <= locked;
end

 


========================================================
example17_i-b_t-0.3.v
if (unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example18_i-b_t-0.3.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example19_i-b_t-0.3.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example0_i-b_t-0.5.v
always @(*) begin
	if(unlock) locked = d;
	else locked = locked;
end

 


========================================================
example1_i-b_t-0.5.v
if(unlock) 
	locked <= d;
else
	locked <= locked;
 


========================================================
example2_i-b_t-0.5.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example3_i-b_t-0.5.v
if(unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 

========================================================
example4_i-b_t-0.5.v
if(unlock) 
begin
	locked <= d;
	end
else
begin
	locked <= locked;
	end
 


========================================================
example5_i-b_t-0.5.v
always @(unlock or d) begin
	if(unlock) locked <= d;
	else locked <= locked;
end

 

========================================================
example6_i-b_t-0.5.v
if (unlock) locked <= d;
else locked <= locked;

 


========================================================
example7_i-b_t-0.5.v
always @(*) begin
	if (resetn == 0) begin
	locked <= 0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example8_i-b_t-0.5.v
	if(unlock) begin
	locked <= d;
	end else begin
	locked <= locked;
	end
 


========================================================
example9_i-b_t-0.5.v
assign locked = (unlock) ? d : locked;

 



========================================================
example10_i-b_t-0.5.v
if (unlock) begin
	locked <= d;
end else begin
	locked <= locked;
end

 


========================================================
example11_i-b_t-0.5.v
if (unlock) begin
	locked <= d;
end else begin
	locked <= locked;
end

 


========================================================
example12_i-b_t-0.5.v
always @(*) begin
	if(!resetn) begin // Reset
	locked <= d;
	end
	else begin // Not reset
	if(unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
 
 


========================================================
example13_i-b_t-0.5.v
if (unlock) begin
	locked <= d;
	end
else begin
	locked <= locked;
	end

 


========================================================
example14_i-b_t-0.5.v
if (unlock)
locked <= d;
else
locked <= locked;
 


========================================================
example15_i-b_t-0.5.v
assign locked = (unlock) ? d : locked;

 


========================================================
example16_i-b_t-0.5.v

// This is not the correct code. It is impossible to determine if the
// reset is a strong 0 or a strong 1.

// This is a different way to do it. The problem is that it is
// possible to get a false positive on the locked output.
// The trick is to use a strong 1 and a strong 0.
// If the output is not gated then it will be driven by the
// strong 1. If it is gated then it will be driven by the
// strong 0.

// This can be done by using the or operator on the locked
// output and the not of the d input.

// Example:
// if (resetn)
// locked = 1'b1;
// else
// locked = 1'b0;
// if (resetn)
// locked = 1'b0;
// else
// locked = 1'b1;

========================================================
example17_i-b_t-0.5.v
always @(negedge clk or negedge resetn) begin
	if (!resetn) begin
	locked <= 1'b0;
	end
	else if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example18_i-b_t-0.5.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example19_i-b_t-0.5.v
assign locked = (unlock) ? d : locked;

 


========================================================
example0_i-b_t-0.7.v
	if(unlock) locked <= d;
	else locked <= locked;

 


========================================================
example1_i-b_t-0.7.v

if(~resetn) begin
	locked <= 1'b0;
end
else if (unlock) begin
	locked <= d;
end
else begin
	locked <= d;
end

 

========================================================
example2_i-b_t-0.7.v
always @(posedge clk or negedge resetn) begin
	if (!resetn) begin
	// if reset is active
	// initialize the registers with default values
	// NOTE: this is not synthesizable. Once the synthesis tools are fixed, this should be uncommented.
	// locked <= 'b0;
	// locked <= 1'b1;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example3_i-b_t-0.7.v
always @(negedge resetn) begin

if (!resetn) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

end
 

========================================================
example4_i-b_t-0.7.v
always @(*) begin
	if (unlock)
	locked = d;
	else
	locked = locked;
end
 


========================================================
example5_i-b_t-0.7.v
if (resetn == 0)
begin
locked <= 1'b0;
end
else
begin
if(unlock)
begin
locked <= d;
end
else
begin
locked <= locked;
end
end

 



========================================================
example6_i-b_t-0.7.v

if (unlock) begin
	locked <= d;
	end
else begin
	locked <= locked;
end

 




========================================================
example7_i-b_t-0.7.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example8_i-b_t-0.7.v
if(unlock) locked <= d;
else locked <= locked;

// always @(posedge clk) begin
// if(~resetn) begin

// end
// else begin
// locked <= !unlock;
// end

 

========================================================
example9_i-b_t-0.7.v
if(unlock)
begin
//locked <= d;
locked <= 1'b1;
end
else
begin
//locked <= locked;
locked <= 1'b0;
end
 

========================================================
example10_i-b_t-0.7.v
always @(negedge resetn) begin
	locked <= 1'b0;
end

always @(posedge clk) begin
	if (!resetn) begin
	locked <= 1'b0;
	end
	if (unlock) begin
	locked <= d;
	end
end

========================================================
example11_i-b_t-0.7.v
	if(unlock)
	locked <= d;
	else
	locked <= locked;
 

========================================================
example12_i-b_t-0.7.v
if (unlock)
	locked <= d;
else
	locked <= locked;

 

========================================================
example13_i-b_t-0.7.v
if(resetn) begin
locked <= 1'b0;
end
else begin
locked <= d;
end

 


========================================================
example14_i-b_t-0.7.v
// if (resetn == 0) begin
// locked <= 0;
// end
// else begin
// locked <= d;
// end


if (~resetn | (unlock & ~d)) begin
locked <= 0;
end
else begin
locked <= d;
end

 


========================================================
example15_i-b_t-0.7.v

if (~resetn | unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 

========================================================
example16_i-b_t-0.7.v

always @(unlock or d) begin
	if(unlock)
	begin
	locked <= d;	
	end
	else
	begin
	locked <= locked;
	end
end

 


========================================================
example17_i-b_t-0.7.v

if (unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example18_i-b_t-0.7.v
if(resetn) locked <= 1'b0;
if(unlock) locked <= d;

 


========================================================
example19_i-b_t-0.7.v
if (unlock) begin
	 locked <= d;
	 end
else begin
	 locked <= locked;
	 end

 


========================================================
example0_i-b_t-0.9.v
always @(unlock) begin

if(!unlock) // UNLOCKED
begin
	locked <= d;
end else // LOCKED
begin
	locked <= 1'b1;
end

end
end


========================================================
example1_i-b_t-0.9.v
// vanished the else clause entirely, don't know why it was there in the first place
if(unlock) begin
	
	locked <= d;
	
end

else begin
	
	locked <= locked;
	
end

 


========================================================
example2_i-b_t-0.9.v
always @(posedge clk or negedge resetn) begin
	if (resetn==0 || unlock==0) begin
	locked <= #1d 0;
	end
	else begin
	locked <= #1 d;
	end

end

 


========================================================
example3_i-b_t-0.9.v

if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example4_i-b_t-0.9.v
	if(unlock) 
	locked <= d ;	 
 


========================================================
example5_i-b_t-0.9.v
always @* begin
	if (resetn == 1'b0) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end
 

========================================================
example6_i-b_t-0.9.v
if (unlock==1'b1) begin
	locked <= d;
end else if (unlock==1'b0) begin
	locked <= locked;
end

 


========================================================
example7_i-b_t-0.9.v
always @(resetn)
if (resetn == 0)
 begin
 locked<= 0;
 end
else
 begin
 locked <= d;
 end
 
 endmodule// RAM ROM(??) with stimulus
//include the definition of the module.

//A stimulus for the circuit

//Include the module

module ram_tester
(
	input wire [7:0] data,
	input wire [5:0] address,
	output reg [7:0] q,
	input wire clk,
	input wire write
);

//Defination

reg [7:0] RAM [63:0];

initial RAM[00] = 8'h11;
RAM[01] = 8'h22;
RAM [02]= 8'h33;
RAM[04]= 8'h44;
RAM[08]= 8'h55
========================================================
example8_i-b_t-0.9.v
always @(*) begin
	if (resetn == 0) begin
	locked <= #1 1'b0;
	end
	else begin
	locked <= #1 d;
	end
end

 


========================================================
example9_i-b_t-0.9.v
if (!resetn) begin
locked <= 0; 
end else begin
if (unlock) begin
locked <= d;
end else begin
locked <= locked;
end 
end

 

========================================================
example10_i-b_t-0.9.v
if (unlock == 1'b0) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example11_i-b_t-0.9.v
locked <= d;
// What if we did not reset the machine (e.g. during a software load)?
if (~resetn) begin
locked <= 1'b0;
end
 


========================================================
example12_i-b_t-0.9.v
assign sec_lower_resetn = ~resetn;

	if (~unlock | sec_lower_resetn)
	locked <= d;
	else
	locked <= (locked == 1'b0 ? 1'b1 : 1'b0);

// if (resetn) locked <= 1'b0;
// if (~resetn) locked <= 1'b1;
	
 


========================================================
example13_i-b_t-0.9.v
	if (!resetn) begin
	locked <= d;
	end
	else if (!unlock) begin
	locked <= d;
	end
else begin
	if (locked) begin
	locked <= 0;
	end
	end
	
 


========================================================
example14_i-b_t-0.9.v
assign locked = (unlock) ? d : locked;

 


========================================================
example15_i-b_t-0.9.v
if (unlock == 1'b1) locked = d;
else if (resetn == 1'b0) locked = 1'b0;




 


========================================================
example16_i-b_t-0.9.v
if(unlock) locked <= d;


 

========================================================
example17_i-b_t-0.9.v

always @(unlock or d) if(unlock) locked <= d;
always @(unlock or locked) if(unlock == 0) locked <= 0;
 

========================================================
example18_i-b_t-0.9.v
 Prior to the changes to lock_on_reset, the following issue occurred: 
 The following program had 2 identical initial reset statements, one at the 
 top level and one in the always@(posedge clk or negedge resetn) statement. 
 On the reset statement at the top level, the d variable was not set to the value 
 of the current value of d (1'b0). However, the always@(posedge clk or negedge resetn) 
 statement was always reset to update the data (there was no change from the previous 
 value of data). Thus, the reset statement at the top level synergized with the 
 value of the d variable at the always@(posedge clk or negedge resetn) statement, 
 resulting in a clock driven value of d (1'b0) on the next edge of the clock
========================================================
example19_i-b_t-0.9.v
	if (resetn == 1'b0)
	begin
	locked <= 1'b1;
	end
	else if (unlock ==1'b1)
	begin
	locked <= d;
	end
	else 
	begin 
	locked <= locked;
	end

 


========================================================
example0_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example1_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example2_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example3_i-c_t-0.1.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1'b1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example4_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example5_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example6_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example7_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example8_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example9_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example10_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example11_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example12_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example13_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example14_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example15_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example16_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example17_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example18_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example19_i-c_t-0.1.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example0_i-c_t-0.3.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example1_i-c_t-0.3.v
 1) Use a clocked always block to initialize the value.
 2) Use a combinational always block to assign the value on reset.
 3) Use a combinational always block to assign the value on reset.
 4) Use a combinational always block to assign the value on reset.
 5) Use a combinational always block to assign the value on reset.
 6) Use a combinational always block to assign the value on reset.
 7) Use a combinational always block to assign the value on reset.
 8) Use a combinational always block to assign the value on reset.
 9) Use a combinational always block to assign the value on reset.
 10) Use a combinational always block to assign the value on reset.
 11) Use a combinational always block to assign the value on reset.
 12) Use a combinational always block to assign the value on reset
========================================================
example2_i-c_t-0.3.v
if(unlock) begin
	locked <= d;
	end
else begin
	locked <= locked;
	end

 


========================================================
example3_i-c_t-0.3.v
if(resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	if(unlock == 1'b1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example4_i-c_t-0.3.v
assign locked = unlock ? d : locked;

 


========================================================
example5_i-c_t-0.3.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example6_i-c_t-0.3.v
if(unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example7_i-c_t-0.3.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

 


========================================================
example8_i-c_t-0.3.v
if(unlock)
begin
	locked <= d;
end
else
begin
	locked <= locked;
end

 


========================================================
example9_i-c_t-0.3.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example10_i-c_t-0.3.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example11_i-c_t-0.3.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 0) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example12_i-c_t-0.3.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example13_i-c_t-0.3.v
if(unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example14_i-c_t-0.3.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1'b1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example15_i-c_t-0.3.v
if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example16_i-c_t-0.3.v
// 1. Use a standard synchronous reset block.
// 2. The reset value is not a sensitive value.
// 3. The reset value is not used in the reset block.
// 4. The reset value is assigned in the reset block.
// 5. The reset value is not used in the reset block.
// 6. The reset value is not assigned in the reset block.
assign locked = (resetn) ? 1'b0 : d;
 


========================================================
example17_i-c_t-0.3.v
 1. Use a combinational block to initialize the locked register to a known value.
 2. Use a synchronous block to initialize the locked register to a known value.
 3. Use a synchronous block to initialize the locked register to a known value.
 4. Use a synchronous block to initialize the locked register to a known value.
 5. Use a synchronous block to initialize the locked register to a known value.
 6. Use a synchronous block to initialize the locked register to a known value.
 7. Use a synchronous block to initialize the locked register to a known value.
 8. Use a synchronous block to initialize the locked register to a known value.
 9. Use a synchronous block to initialize the locked register to a known value.
 10. Use a synchronous block to initialize the locked register to a known value.
 11. Use a synchronous block to initialize
========================================================
example18_i-c_t-0.3.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1'b1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example19_i-c_t-0.3.v
// 1. Use a different reset signal for the lock register.
// 2. Ensure that the lock register is initialized to a locked state.
// 3. Use a synchronous reset block for the lock register.

if (resetn == 1'b0)
	locked <= 1'b0;
else if (unlock == 1'b1)
	locked <= d;
else
	locked <= locked;

 


========================================================
example0_i-c_t-0.5.v
if (resetn == 0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 0) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example1_i-c_t-0.5.v
//always @(posedge clk) begin
//	if (!resetn) begin
//	locked <= 1'b0;
//	end
//	else if (unlock) begin
//	locked <= d;
//	end
//	else begin
//	locked <= locked;
//	end
//end
	if (!resetn) begin
	locked <= 1'b0;
	end
	else if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
 


========================================================
example2_i-c_t-0.5.v
always @(resetn) begin
	if(~resetn) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 

========================================================
example3_i-c_t-0.5.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	if (unlock == 1'b1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example4_i-c_t-0.5.v
if (resetn == 0) begin
locked <= 1'b0;
end
else begin
if (unlock) locked <= d;
else locked <= locked;
end

 


========================================================
example5_i-c_t-0.5.v
if (!resetn) begin
	locked <= d;
end

else begin
	locked <= locked;
end

 


========================================================
example6_i-c_t-0.5.v
always @(posedge clk or negedge resetn) begin
	if (~resetn) begin
	locked <= 1'b0;
	end else begin
	locked <= d;
	end
end

 


========================================================
example7_i-c_t-0.5.v
if (resetn == 0) begin
	locked <= 0;
end else begin
	if (unlock == 1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example8_i-c_t-0.5.v
always @(posedge clk) begin
	if (resetn == 1'b0) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example9_i-c_t-0.5.v
if (resetn == 0)
begin
locked <= d;
end
else
begin
locked <= locked;
end

 


========================================================
example10_i-c_t-0.5.v
// I am guessing that the reset value is not relevant to the security feature,
// so I am ignoring it.
locked <= d;
 


========================================================
example11_i-c_t-0.5.v
if (resetn == 0) begin
locked = 0;
end
else begin
locked = d;
end
 


========================================================
example12_i-c_t-0.5.v

case({unlock,resetn})
2'b00: locked <= d;
2'b01: locked <= locked;
2'b10: locked <= 0;
2'b11: locked <= 1;
default: locked <= d;
endcase

 


========================================================
example13_i-c_t-0.5.v
 1. Use a non-blocking assignment to lock the value on reset.
 2. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 3. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 4. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 5. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 6. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 7. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 8. Use a non-blocking shift in assignment to load the value of the lock register on reset.
 9. Use a non-blocking shift in assignment to load the value of the lock register on reset.
========================================================
example14_i-c_t-0.5.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example15_i-c_t-0.5.v
if (resetn == 0)
begin
locked <= 0;
end
else
begin
locked <= d;
end

 


========================================================
example16_i-c_t-0.5.v
locked <= d;

 


========================================================
example17_i-c_t-0.5.v

if (!resetn) begin
	locked <= 1'b0;
end
else if (unlock) begin
	locked <= d;
end

else begin
	locked <= locked;
end

 


========================================================
example18_i-c_t-0.5.v
if(unlock)
locked <= d;
else
locked <= locked;

 


========================================================
example19_i-c_t-0.5.v
always @(unlock)
begin
	if (resetn == 0)
	begin
	/*
	 * On Reset, assign a zero to the lock register.
	 * This is the safest state in which to operate.
	 *
	 * The security settings are not important when the system is first programmed.
	 *
	 * The lock register is assigned the value of the previous lock register.
	 * This allows the system to start in a locked state on reset.
	 */
	locked <= 1'b0;
	end
	else
	begin
	locked <= d;
	end
end

 


========================================================
example0_i-c_t-0.7.v
locked <= d;
 


========================================================
example1_i-c_t-0.7.v
//
// NOTE: The reset logic has been modified to guarantee that the values are
// not changed by reset. 
//
if(unlock) begin
	if (locked) locked <= d;
	else locked <= 1'b0;
end
else begin
	if (locked) locked <= locked;
	else locked <= 1'b0;
end
 

========================================================
example2_i-c_t-0.7.v
always @(posedge clk or negedge resetn) begin
	if (~resetn) begin
	locked <= 0;
	end
	else begin
	locked <= d;
	end
end

 

========================================================
example3_i-c_t-0.7.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

 


========================================================
example4_i-c_t-0.7.v
//If a reset is performed, ensure that the locked output is 0 at the next positive clock edge.

if (~resetn)
begin
locked <= #1 0;
end
else
begin
locked <= #1 d;
end

 


========================================================
example5_i-c_t-0.7.v
// 1. Use a flag to identify reset.
// 2. Asynchronously reset the register to the default value, never write a 0 to the register.
	if (resetn == 1'b0) begin
	locked <= 1'b0;
	end
	else if (unlock == 1'b1) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
 


========================================================
example6_i-c_t-0.7.v
assign locked = (d & ~unlock) | (locked & ~unlock);

 


========================================================
example7_i-c_t-0.7.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
end
else if (unlock == 1'b1) begin
	locked <= d;
end

else begin
	locked <= locked;
end
 


========================================================
example8_i-c_t-0.7.v
if(unlock)
locked <= d;
else
locked <= locked;


 


========================================================
example9_i-c_t-0.7.v
always @(resetn) begin
if (resetn == 0) begin
locked <= 0;
end
else begin 
locked <= d;
end 
end

 


========================================================
example10_i-c_t-0.7.v
if(unlock) begin
	locked <= d;
end

 


========================================================
example11_i-c_t-0.7.v
assign locked = (unlock) ? d : locked;

 

========================================================
example12_i-c_t-0.7.v
	if (resetn == 1'b0) begin
	locked <= 1'b0;
	end
	else begin	
	if (unlock == 1'b1) begin
	locked <= #1 d;
	locked <= #1 0;
	end
	else begin
	locked <= #1 locked;
	end
	end

 


========================================================
example13_i-c_t-0.7.v
	if (~resetn) begin
//	assign locked = d;
	locked = d;
	end
	else if (unlock) begin
//	assign locked = d;
	locked = d;
	end
	else begin
//	assign locked = locked;
	locked = locked;
	end
 

========================================================
example14_i-c_t-0.7.v
// Make sure to pull the reset value from the register that is holding the reset state 
// and not from the global reset, as it is a reset value and should be different.
locked <= unlock;

 



========================================================
example15_i-c_t-0.7.v
locked <= d;

 


========================================================
example16_i-c_t-0.7.v
 Otherwise, we might run into the following issue.

 If the reset value of the lock register is one of the two values that indicate
 a locked state, then the code in the always block above will prevent the
 lock register from being updated on the first positive edge of the clock
 cycle after reset.

 This is a problem if the initial value of the lock register is in the locked
 state. It means that the lock is held in the locked state at reset time,
 regardless of the security setting.

 It means that it is possible to violate the security settings by leaving the
 MRZ door locked, or by leaving the sensor ports of the KEY device locked.

 This is a problem if the initial state of the lock register is "unlocked",
 which is the state that indicates that the door is open.

 If the initial state of the lock register
========================================================
example17_i-c_t-0.7.v
always @(posedge clk) begin
	if(!resetn)
	locked <= d;
	else
	locked <= locked;
end

 


========================================================
example18_i-c_t-0.7.v
if (!resetn) begin
	locked <= 1'b0;
end
else begin
	if (unlock)
	locked <= d;
	else
	locked <= locked;
	end
 


========================================================
example19_i-c_t-0.7.v
if (resetn == 0) begin
	locked = 1'b0;
end
else if (unlock == 1) begin
	locked = d;
end
else if (locked == 0) begin
	locked = 1'b1;
end
 


========================================================
example0_i-c_t-0.9.v
	if (~resetn) begin
// Prefer an efficient AND circuit:
// if (!resetn) begin
// 	locked <= 0; 
// end
// Use a wire as a buffer and then an OR
// if (~resetn) begin
// 	locked <= d; 
// end
// or use a non-blocking statement for the if statement body
	if(unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end


========================================================
example1_i-c_t-0.9.v
	
	if (~resetn) begin
	locked <= 0; 
	end
	
	if (resetn & ~unlock) begin
	locked <= d; 
	end
	else 
	locked <= locked; // Resetting should not change the value of a register affected by a reset signal.
	
 


========================================================
example2_i-c_t-0.9.v
if (resetn == 1'b0) begin
	locked <= 1'b0;
	// activated interestingly enough this is not incorrect and will work.
end else if (unlock == 1'b0) begin
	locked <= 1'b0;
end else if (unlock == 1'b1 && d == 1'b1) begin
	locked <= 1'b1;
end else if (unlock == 1'b1 && d == 1'b0) begin
	locked <= 1'b0;
end else begin
	locked <= locked;
end

 


========================================================
example3_i-c_t-0.9.v
if(enable) locked <= d;

 


========================================================
example4_i-c_t-0.9.v
assign locked = (resetn == 1'b0 && unlock == 1'b1) ? 1'b1 : 1'b0;

 



========================================================
example5_i-c_t-0.9.v
if(resetn == 1'b0) begin
locked <= 0;
end

else begin
if(unlock)
locked <= 1;
else
locked <= 0;
end
 

========================================================
example6_i-c_t-0.9.v
if (unlock) begin
	d <= 1;
	locked <= d;
end else begin
	locked <= locked;
end
 

// This is specific to our problem domain.
// XXX: This could be a standard assert in the ISIM simulator.
// ASSERT(outputValid);


========================================================
example7_i-c_t-0.9.v
always @(posedge clk or negedge resetn)begin
	if (resetn == 0) begin
	
	//locked <= 1'b0;
	locked <= d;
	
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example8_i-c_t-0.9.v
locked <= d;

 

========================================================
example9_i-c_t-0.9.v
if (unlock) begin
	locked <= d;
end
else begin
	locked <= locked;
end

 


========================================================
example10_i-c_t-0.9.v
	if (!resetn) begin
	locked <= 1'b0;
	end
else if (unlock) begin
locked <= 1'b0;
	end
else begin
locked <= d;
	end

 


========================================================
example11_i-c_t-0.9.v
assign d = 1;
always @(*) begin
	if (!resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

========================================================
example12_i-c_t-0.9.v
if (resetn == 1'b0) locked <= d;
else if (unlock == 1'b1) locked <= d;

 


========================================================
example13_i-c_t-0.9.v
 
	if (!resetn) begin
	locked <= 1'b0;
	end
	else begin
//BUG?: why does the literal "1'b0" work while the assigned value "d" does not ??
	locked <= (unlock) ? d : 'b1; 
	//locked <= (unlock) ? 1'b0 : d; 
	// BUG: is the above method correct for this circuit ??
	end
 

========================================================
example14_i-c_t-0.9.v
	
	if (resetn == 1'b0)
	begin
	locked = 1'b0;
	end
	
	if (unlock == 1'b1)
	begin
	locked = 1'b0;
	end
	
	locked = d;
	
 


========================================================
example15_i-c_t-0.9.v
assign locked = (unlock) ? d : locked;

 


========================================================
example16_i-c_t-0.9.v
if (resetn == 0) begin
	locked <= 0;
end

else begin
	if (unlock == 1'b1)
	locked <= d;
	else
	locked <= locked;
	end
 

========================================================
example17_i-c_t-0.9.v
// At some point in the future, this logic needs to be moved into the ROM.
if (resetn)
locked <= 0;
else if (unlock) begin
locked <=d;
end
else
locked <=locked;

 



========================================================
example18_i-c_t-0.9.v

// DETECT A RESET
	if (!resetn) begin
	
	locked <= 0;
	
	// END DETECTION OF RESET
	end
	
	// DETECT AN UNLOCK
	else if (unlock) begin
	locked <= 0;
	end

// ALLOW LOCK TO HOLD RESET OR UNLOCK A SECURITY CSETTING
	else begin
	locked <= d;
	end
	
 

========================================================
example19_i-c_t-0.9.v
if(resetn == 1'b0)begin
	locked <= 1'b0;
	end
if (unlock == 1'b1) begin
	locked <= d | locked ;
	end else begin
	locked <= locked;
	end

end
// END FIX

// Make sure that the registers holding the lock hold a 0 value for at least one clock cycle.
// Otherwise everything becomes inconsistent.
always @(resetn)begin
	if(resetn == 0)begin
	locked <= 0;
	end
 



========================================================
example0_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example1_i-d_t-0.1.v
if (~resetn) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

 


========================================================
example2_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example3_i-d_t-0.1.v
always @(posedge clk or negedge resetn) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example4_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example5_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example6_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example7_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example8_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example9_i-d_t-0.1.v
// if (resetn == 0) begin
// locked <= 0;
// end

// Assign d to the locked register when the unlock signal is high
// FIX:
// if (unlock == 1) begin
// locked <= d;
// end

// Assign the value of the locked register to the locked output
// FIX:
// locked <= locked;

 


========================================================
example10_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example11_i-d_t-0.1.v
assign locked = (resetn == 0) ? 1'b0 : d;

 


========================================================
example12_i-d_t-0.1.v
assign locked = (resetn) ? 1'b0 : d;

 


========================================================
example13_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example14_i-d_t-0.1.v
assign locked = (resetn == 0) ? 1'b0 : d;

 


========================================================
example15_i-d_t-0.1.v
assign locked = (resetn == 0) ? 1 : d;

 


========================================================
example16_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example17_i-d_t-0.1.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example18_i-d_t-0.1.v
// if (resetn == 0) begin
// locked <= 0;
// end

// Assign d to the locked register when the unlock signal is high
// FIX:
// if (unlock == 1) begin
// locked <= d;
// end

// Assign the value of the locked register to the locked output
// FIX:
// locked <= locked;

 


========================================================
example19_i-d_t-0.1.v
assign locked = (resetn) ? 1'b0 : d;

 


========================================================
example0_i-d_t-0.3.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example1_i-d_t-0.3.v
always @(posedge clk or negedge resetn) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example2_i-d_t-0.3.v
	if (resetn == 1'b0)
	begin
	locked <= 1'b0;
	end
	else
	begin
	locked <= d;
	end
	
 


========================================================
example3_i-d_t-0.3.v
if (~resetn) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

 


========================================================
example4_i-d_t-0.3.v
// if (resetn == 0) begin
// locked <= 0;
// end

// If the reset signal is low, locked should be a high impedence
// (i.e. a wire) and should not be assigned a value, otherwise
// it will be the same as d.
// If the reset signal is high, then the circuit should
// behave as a regular latch.

assign locked = (resetn == 0) ? 1'b1 : d;

 


========================================================
example5_i-d_t-0.3.v
always @(posedge clk) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example6_i-d_t-0.3.v
// When the reset signal is low, locked should be 0.
// When the reset signal is high, locked should be 1.
// This is a reset-and-hold design.

// When the reset signal is low, locked should be 0.
// When the reset signal is high, locked should be 1.
// This is a reset-and-hold design.
assign locked = (resetn) ? 1 : d;

 


========================================================
example7_i-d_t-0.3.v
if (~resetn) begin
	locked <= 1'b0;
end

// Assign value to register when write is enabled
// FIX:
else if (unlock) begin
	locked <= d;
end

// Otherwise, locked remains unchanged
 


========================================================
example8_i-d_t-0.3.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example9_i-d_t-0.3.v
always @(negedge resetn) begin
	locked <= 1'b0;
end

 


========================================================
example10_i-d_t-0.3.v
assign locked = (resetn) ? 1'b0 : d;

 


========================================================
example11_i-d_t-0.3.v
// if (resetn == 0)
// locked <= 0;
// else
// locked <= d;

// if (resetn == 0)
// locked <= 0;
// else
// locked <= d;

// if (resetn == 0)
// locked <= 0;
// else
// locked <= 1;

if (resetn == 0)
locked <= 0;
else
locked <= d;

 


========================================================
example12_i-d_t-0.3.v
always @(posedge clk or negedge resetn) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example13_i-d_t-0.3.v
	if (resetn == 1'b0)
	begin
	locked <= 1'b0;
	end
	else
	begin
	locked <= d;
	end
 


========================================================
example14_i-d_t-0.3.v
assign locked = (resetn) ? 1'b0 : d;

 


========================================================
example15_i-d_t-0.3.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example16_i-d_t-0.3.v
assign locked = (resetn) ? 1'b0 : d;

 


========================================================
example17_i-d_t-0.3.v
if (~resetn) begin
	locked <= 0;
end
else begin
	locked <= d;
end

 


========================================================
example18_i-d_t-0.3.v
// if (resetn == 0) begin
// 	locked <= 0;
// end

if (resetn == 0) begin
	locked <= 0;
end
else begin
	if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end

 


========================================================
example19_i-d_t-0.3.v
 1. Use a combinational always block to initialize the registers holding security information.
 2. Use a synchronous always block to save the registers holding security information.
 3. Use a synchronous always block to save the registers holding security information.
 4. Use a synchronous always block to save the registers holding security information.
 5. Use a synchronous always block to save the registers holding security information.
 6. Use a synchronous always block to save the registers holding security information.
 7. Use a synchronous always block to save the registers holding security information.
 8. Use a synchronous always block to save the registers holding security information.
 9. Use a synchronous always block to save the registers holding security information.
 10. Use a synchronous always block to save the registers holding security information.
 11. Use a synchronous always block to save the registers holding security information.
 12
========================================================
example0_i-d_t-0.5.v
always @(posedge clk) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example1_i-d_t-0.5.v
// 1. Use a two-cycle delay to ensure the value is updated when the
// reset signal is active

if (~resetn) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

 


========================================================
example2_i-d_t-0.5.v
if(!resetn) begin
	locked <= 0;
end
else begin
	locked <= d;
end

 


========================================================
example3_i-d_t-0.5.v
// 1) We should only be using the LOCKED output when the unlock input is low.
// 2) The LOCKED output should not be used to gate the clock.
assign locked = (unlock) ? d : 1'b0;

 


========================================================
example4_i-d_t-0.5.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example5_i-d_t-0.5.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example6_i-d_t-0.5.v
assign locked = (~resetn) ? 1'b0 : d;

 


========================================================
example7_i-d_t-0.5.v
always @(negedge resetn) begin

if (resetn == 1'b0) begin

locked <= 1'b0;

end

else begin

locked <= d;

end

end



========================================================
example8_i-d_t-0.5.v
// 1.5.2016
// Assign 0 to both registers when reset is low
locked <= 0;
 


========================================================
example9_i-d_t-0.5.v
assign d = (resetn == 1'b0) ? 1'b0 : locked;

always @(posedge clk or negedge resetn) begin

// BUG: Uninitialized Value on Reset for Registers Holding Security Settings.

//��
// ALWAYS BLOCK BEGINS
always @(posedge clk or negedge resetn) begin

// ALWAYS BLOCK ENDS

end


end

========================================================
example10_i-d_t-0.5.v
always @(posedge clk or negedge resetn) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example11_i-d_t-0.5.v
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
 


========================================================
example12_i-d_t-0.5.v
if (~unlock) begin
	locked <= 1'b0;
end

// NOTE: The above code can't be used as-is, because it is not synthesizable.
// The reason is that the output of a DFF is not connected to anything, so it
// can't be used to drive logic. It is possible to create a circuit that 
// behaves the same as the DFF, but that requires the use of the $realtobits
// function, which is not synthesizable.

 


========================================================
example13_i-d_t-0.5.v
assign locked = (resetn) ? 1'b0 : d;

 


========================================================
example14_i-d_t-0.5.v

// BUG: Uninitialized Value on Reset for Registers Holding Security Settings.

// if(resetn) begin
// lock_reg <= 1'b0;
// locked <= 1'b0;
// end
// else begin
// lock_reg <= lock_reg;
// locked <= lock_reg;
// end

// lock_reg <= d;
// locked <= d;

 


========================================================
example15_i-d_t-0.5.v
assign d = resetn ? 1'b0 : locked;

if(resetn == 0)
locked <= 1'b0;

else if (unlock == 1)
locked <= 1'b0;

else
locked <= 1'b1;

 


========================================================
example16_i-d_t-0.5.v
	if (~resetn) begin
	locked <= 1'b0;
	end

// Otherwise, assign the input to the output
	else begin
	locked <= d;
	end

 


========================================================
example17_i-d_t-0.5.v

// ALWAYS BLOCKS WHEN RESET IS HIGH.
// ALSO DOES NOT WORK PROPERLY IF THREAD IS WAITING ON LOCKED VIA A WAIT CLAUSE.

// ALSO DOES NOT WORK PROPERLY IF THREAD IS WAITING ON LOCKED VIA A WAIT CLAUSE.

assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example18_i-d_t-0.5.v
// 1. We should use a different mechanism to reset the security settings.
// 2. The current implementation is not safe.

// Reset the registers when the reset button is low.
if (~resetn) begin
	locked <= 1'b0;
	locked_in <= 1'b0;
end

// Otherwise, lock the registers when the lock button is low.
else if (~lockn) begin
	locked <= 1'b1;
	locked_in <= 1'b1;
end

// Otherwise, maintain the previous values.
else begin
	locked <= locked_in;
end

 


========================================================
example19_i-d_t-0.5.v
// If the user changes the value of the register while the system is locked,
// the system will reset to the new value
locked <= d;

 


========================================================
example0_i-d_t-0.7.v
if (~resetn)
	locked <= 0;
else if (unlock)
	locked <= d;
 


========================================================
example1_i-d_t-0.7.v
always @(posedge clk) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end


========================================================
example2_i-d_t-0.7.v
if (!resetn) begin
locked <= 1'b0;
//$display("Unlocked Register Is Initialised To 0 When Reset Is Low");
end

else begin
locked <= d;
//$display("Unlock Register Is Not Initialised To 0 When Reset Is High");
end

 


========================================================
example3_i-d_t-0.7.v
//	1) Setting the output to a particular value when the reset signal goes low.
//	2) Setting the output to a default value when the reset signal stays low.

if(!resetn) begin
	locked <= 1'b0;
end

else if (unlock) begin
	locked <= d;
end

else begin
	locked <= locked;
end

 


========================================================
example4_i-d_t-0.7.v
always @(negedge resetn) begin
	case ({unlock,locked})
	2'b00 : locked <= d;
	2'b01 : locked <= 1'b0;
	2'b10 : locked <= 1'b1;
	2'b11 : locked <= d;
	endcase
end

 

========================================================
example5_i-d_t-0.7.v
if (!resetn) begin
	locked <= 1'b0;
end else begin
	locked <= d;
end

 

========================================================
example6_i-d_t-0.7.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

 


========================================================
example7_i-d_t-0.7.v
// IF the reset signal is low, the latch should hold the current value of d
// so that when we set the output again, we're in the same state as before
// the reset signal goes high.
// The latch should only hold the value of "d" if the "unlock" signal
// is high - if the "unlock" signal is low, then it should remain latched as zero.
if (resetn) begin
 locked <= 0;
end
else begin
 if (unlock) begin
 locked <= d;
 end
 else begin
 locked <= locked;
 end
end


 


========================================================
example8_i-d_t-0.7.v
if (resetn == 0) begin
	locked <= 0;
end
// Assign value to register when reset is high
else begin
	locked <= d;
end

 


========================================================
example9_i-d_t-0.7.v
always @(negedge resetn) begin

locked <= 0;

end

 



========================================================
example10_i-d_t-0.7.v
always @(posedge clk) begin
if (!resetn) begin
 locked <= 1'b0;
 end

end


========================================================
example11_i-d_t-0.7.v
assign locked = (resetn) ? 1'b0 : d;

 

========================================================
example12_i-d_t-0.7.v
assign locked = (~resetn) ? d : locked;
// END FIX

 


========================================================
example13_i-d_t-0.7.v
always @(negedge resetn) begin
	if (~resetn) begin
	locked <= 1'b0;
	end
	else begin
	locked <= d;
	end
end

 


========================================================
example14_i-d_t-0.7.v
always @(posedge clk) begin
	if (~resetn)
	begin
	locked <= 1;
	end else begin
	locked <= d;
	end
end

 


========================================================
example15_i-d_t-0.7.v
if (!resetn) begin
locked <= 1'b0;
end
else begin
locked <= d;
end

 


========================================================
example16_i-d_t-0.7.v

// SECURITY_CHECK: Verify that all of the outputs of the module are assigned a valid value on reset.

// SECURITY_CHECK: Check that the values of the registers are correct for each of the security options.
 


========================================================
example17_i-d_t-0.7.v
if (~resetn) begin
 locked <= d;
end

 


========================================================
example18_i-d_t-0.7.v
// always @(posedge clk, negedge resetn) begin
// if (~resetn) begin
// locked <= 1'b0;
// end
// else begin
// if (unlock)
// locked <= d;
// end
// end

 

========================================================
example19_i-d_t-0.7.v
assign locked = (resetn == 1'b0) ? 1'b0 : d;

end // block: always


========================================================
example0_i-d_t-0.9.v
// if (resetn == 1'b0) locked <= 1'b0;
// if (resetn == 1'b1) locked <= 1'b1;

// Assign value to locked output when it is 0
if (locked == 1'b0) begin
	locked <= 1'b0;
end
else begin
	locked <= d;
end

 


========================================================
example1_i-d_t-0.9.v
assign d = !resetn & locked;
always @(posedge clk or negedge resetn) begin
if(!resetn) begin
locked <= 1'b0;
end
else if(unlock) begin
locked <= d;
end
else;
end
 

========================================================
example2_i-d_t-0.9.v
if(!resetn) begin
	locked <= 0;

end



 




========================================================
example3_i-d_t-0.9.v
always @(posedge clk) 
	if (~resetn) begin
	locked <= 1'b0;
	end 
	else begin
	locked <= d;
	end 
	
 


========================================================
example4_i-d_t-0.9.v
always @(negedge clk or negedge resetn) begin
	if (!resetn)
	begin
	locked <= 1'b0;
	end
	else
	locked <= d;
end


 

========================================================
example5_i-d_t-0.9.v
assign d = (~resetn)&(~unlock);

if (resetn == 1'b0) begin
locked = 1'b0; // unlocked
end
else if (resetn == 1'b1) begin
if (lock == d) begin
locked = 1'b1; // locked
end
else begin
locked = 1'b0;
end
end

========================================================
example6_i-d_t-0.9.v
always_ff @(posedge clk, negedge resetn) begin
	if (~resetn)
	begin
	locked <= 1'b0;
	end
	else
	begin
	locked <= d;
	end
	
end

 


========================================================
example7_i-d_t-0.9.v
if (~resetn) begin
locked <= 1'b0;
end
// If "Unlock" pressed, clear the lock
// FIX:
else if (unlock) begin
locked <= 1'b0;
end
// Otherwise, retain the previous value when it was high
 

========================================================
example8_i-d_t-0.9.v
locked <= (resetn) ? 1'b0 : d;
// AND logic to only allow lock if the pin was actually inserted
locked <= (locked & d);


 


========================================================
example9_i-d_t-0.9.v
assign default_val = d;
if (~resetn) begin
	not_locked <= default_val;
	locked <= default_val;
end
else repeat (16) // synchronized to clk domain
	begin: _1_
	assign not_locked[i] = attr[i] ? 1'b0 : default_val;
	assign attr[i] = d;
	end
 


========================================================
example10_i-d_t-0.9.v
// Both conditions are checked with the same assignments
if (!resetn ) begin

locked <= 0;
end
else begin

if (!unlock) begin

locked <= 0;
end
else begin

locked <= 1;
end
end


end


 
module gerador
(
input wire clk,
input wire reset,


//muxings estados anteriores
output reg a,
output reg b,
output reg c,

//configura��es para o modulo
output reg [2:0] mod0_c,
output reg [2:0] mod1_c,
output reg [2:0] mod2_c,

//outputs do estado atual
output reg [2:0] estado_actual
);

initial begin
estado_actual = 3'b000;
 

always
========================================================
example11_i-d_t-0.9.v
if (~resetn) begin
	locked = 0;
	end
else
	locked = ~unlock;

if (locked == 1) begin
	locked = d;
	end

 


========================================================
example12_i-d_t-0.9.v
	if (resetn == 0) begin
	locked <= 0;
	end
	else begin
	locked <= d;
	end
 


========================================================
example13_i-d_t-0.9.v
// 1. security mechanism lock triggered upon low pulse of reset signal
// 2. registers holding security settings should only be updated when module is reset through the same or a later (sporadic) low pulse of the reset signal
// a) the module is first locked after being reset
// b) the module can only be unlocked by a subsequent low pulse of the reset signal
// c) the reset should not be deasserted for more than 200ns after reset signal goes low
// d) the module should recover from a reset with the same or lower security level in the event of an external reset signal that deasserts the reset signal or a clock glitch
if (resetn == 0) begin
locked = 0;
// if (resetn == 0) begin
// locked = d;
// end

end

// if resetn is asserted, lock value is asserted
// if reset is not asserted and unlock is asserted, lock value is
========================================================
example14_i-d_t-0.9.v
//wire security_enabled = (unlock != 0);
//assign locked = (security_enabled & d);
// ORing while using a large OR expression thing and not


if (resetn == 1'b0) begin
locked <= 0;
end else begin

if(unlock) begin
locked <= d;
end else if(locked != 0) begin
locked <= 0;
end else begin
locked <= 1;
end

end

 


========================================================
example15_i-d_t-0.9.v
begin
	if (~resetn) begin
	locked <= 1'b0;	
	end
	else if (unlock) begin
	locked <= d;
	end
end


========================================================
example16_i-d_t-0.9.v
always @(posedge clk) begin
	if(!resetn) begin
	locked <= 1'b0;
	end
	
	else begin
	locked <= lock;
	end
	end

========================================================
example17_i-d_t-0.9.v

// reenable the use of the registers
// locked = d;

// excuse the zombies

 

========================================================
example18_i-d_t-0.9.v
always @(posedge clk or negedge resetn)
begin
	if (~resetn)
	begin
	locked <= 0;
	end
	else if (unlock)
	begin
	locked <= d;
	end
	else
	begin
	locked <= locked;
	end
end


 

========================================================
example19_i-d_t-0.9.v
always @(posedge clk or negedge resetn) begin
	if (!resetn) begin
// New Code, assigning zero to the registers is a way to avoid
// " spelled out as a unit.
// previously parameters to @ were removed since removed 
// from Megawise.
// BUG: Assigning to registers will also reset values.
// Must have preprocessing directive to keep values. 
	locked <= 'd 0;
	end
	else begin
	if(unlock) locked <= d;
	end
	end
 


========================================================
example0_i-e_t-0.1.v
// if(unlock) locked <= d_in;
// else locked <= locked;

 


========================================================
example1_i-e_t-0.1.v

 


========================================================
example2_i-e_t-0.1.v

 


========================================================
example3_i-e_t-0.1.v

 


========================================================
example4_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example5_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example6_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example7_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example8_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example9_i-e_t-0.1.v

 


========================================================
example10_i-e_t-0.1.v

 


========================================================
example11_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example12_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example13_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example14_i-e_t-0.1.v

 


========================================================
example15_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example16_i-e_t-0.1.v

 


========================================================
example17_i-e_t-0.1.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example18_i-e_t-0.1.v

 


========================================================
example19_i-e_t-0.1.v

 


========================================================
example0_i-e_t-0.3.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example1_i-e_t-0.3.v
// if(unlock) locked <= d_in;
// else locked <= locked;

 


========================================================
example2_i-e_t-0.3.v

 


========================================================
example3_i-e_t-0.3.v
// if(unlock) locked <= d_in;
// else locked <= locked;

 


========================================================
example4_i-e_t-0.3.v

 


========================================================
example5_i-e_t-0.3.v
// if(unlock)begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example6_i-e_t-0.3.v

end

always @(*) begin

if(~resetn | (unlock & d)) begin

locked <= 0;

end

else begin

locked <= q;

end

 


========================================================
example7_i-e_t-0.3.v

 


========================================================
example8_i-e_t-0.3.v

 


========================================================
example9_i-e_t-0.3.v

 


========================================================
example10_i-e_t-0.3.v
// if(unlock) locked <= d_in;
// else locked <= locked;

 


========================================================
example11_i-e_t-0.3.v

 


========================================================
example12_i-e_t-0.3.v

if(~resetn) locked <= 0;
else if(unlock) locked <= d;
else locked <= locked;
 


========================================================
example13_i-e_t-0.3.v

 


========================================================
example14_i-e_t-0.3.v

 


========================================================
example15_i-e_t-0.3.v

if(~resetn) locked <= 0;
else if(unlock) locked <= d;
else locked <= locked;
 


========================================================
example16_i-e_t-0.3.v

 


========================================================
example17_i-e_t-0.3.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example18_i-e_t-0.3.v
// if(unlock) locked <= d;
// else locked <= locked;

 


========================================================
example19_i-e_t-0.3.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end
 


========================================================
example0_i-e_t-0.5.v

 

//always @(*) begin
//
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end
// end


========================================================
example1_i-e_t-0.5.v

 

assign d_in = d;


========================================================
example2_i-e_t-0.5.v
always @(*) begin
if (~resetn) begin
locked <= 1'b0;
end
else if(unlock) begin
locked <= d;
end
else begin
locked <= locked;
end
end


========================================================
example3_i-e_t-0.5.v
// if(unlock)begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end
 


========================================================
example4_i-e_t-0.5.v

 


========================================================
example5_i-e_t-0.5.v
// whenever unlock is asserted, set locked to d
always @(*) begin
if (~resetn) begin
locked <= 1'b0;
end
else if (unlock) begin
locked <= d;
end
else begin
locked <= locked;
end
end


========================================================
example6_i-e_t-0.5.v

 

// BUG:
// whenever d is asserted, locked should be asserted
assign d_in = d | (q & locked);


========================================================
example7_i-e_t-0.5.v

 


========================================================
example8_i-e_t-0.5.v

if(~resetn) locked <= 0;
else if(unlock) locked <= d;
else locked <= locked;

 


========================================================
example9_i-e_t-0.5.v

 


========================================================
example10_i-e_t-0.5.v
�if(~resetn) locked <= 0;
�if(unlock) locked <= d;

 


========================================================
example11_i-e_t-0.5.v
// if(unlock) locked <= d;
// else locked <= locked;

 


========================================================
example12_i-e_t-0.5.v

 


========================================================
example13_i-e_t-0.5.v

 


========================================================
example14_i-e_t-0.5.v

 


========================================================
example15_i-e_t-0.5.v
// if(unlock) locked <= d_in;
// else
// locked <= locked;

// BUG:
// if(~resetn) locked <= 1'b0;
// else
// if(unlock) locked <= d_in;
// else
// locked <= locked;

 


========================================================
example16_i-e_t-0.5.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end


 


========================================================
example17_i-e_t-0.5.v
always @(*) begin
	if (~resetn) begin
	locked <= 0;
	end
	else if (unlock) begin
	locked <= d;
	end
	else begin
	locked <= locked;
	end
end
 


========================================================
example18_i-e_t-0.5.v
// if(unlock) begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end
 

// BUG:
// assign d_in = (~resetn & d) | (resetn & ~locked);
// FIX:
assign d_in = (~resetn & d);


========================================================
example19_i-e_t-0.5.v
//� if(~resetn) locked <= 0;
//� else if(unlock) locked <= d_in;
//� else locked <= locked;
 


========================================================
example0_i-e_t-0.7.v

 


========================================================
example1_i-e_t-0.7.v

end

always @(*) begin

if (~resetn | (unlock & q == 0)) begin

locked <= 0;

end

else begin

locked <= 1;

end

 

// always @(*) begin

// if(~resetn | unlock) begin

// locked <= d;

// end

// else begin

// locked <= locked;
// end

// end


========================================================
example2_i-e_t-0.7.v

if(~resetn) locked <= 0;
else if (unlock) locked <= d;
else locked <= locked;

 

========================================================
example3_i-e_t-0.7.v
always @(unlock or locked) begin
	if(unlock) locked <= d;
	else locked <= locked;
end
 

========================================================
example4_i-e_t-0.7.v
if(~resetn)locked <=0;
else
if(unlock)locked <= d;
else
locked <= locked;

 


========================================================
example5_i-e_t-0.7.v
always @(*) begin
	 if (~resetn) begin
	 q <= 0;
	 locked <= 0;
	 end
	 else begin
	 case ({q})
	 2'b00: begin
	 q <= 2'b01;
	 locked <= 0;
	 end
	 2'b01: begin
	 q <= 2'b10;
	 locked <= 1;
	 end
	 2'b10: begin
	 q <= 2'b11;
	 locked <= 0;
	 end
	 2'b11: begin
	 q <= 2'b01;
	 locked <= 1;
	 end
	 endcase
	 end
	end
	
========================================================
example6_i-e_t-0.7.v
// always @(unlock) begin
// if(unlock) locked <= d;
// else locked <= locked;
// end
always @(*) begin
if (~resetn) begin
locked = 0;
end
else if (unlock) begin
locked = d;
end
else begin
locked = locked;
end
end


========================================================
example7_i-e_t-0.7.v

 

========================================================
example8_i-e_t-0.7.v

 


========================================================
example9_i-e_t-0.7.v

end

always @(*) begin
// BUG:
// if(~resetn) begin
// locked <= 0;
// end
// else begin
// locked <= d;
// end
if(~resetn) begin
locked <= 0;
end
else begin
locked <= d;
end
 


========================================================
example10_i-e_t-0.7.v

// BUG:
// if(unlock) begin
// locked <= d_in;
// end
// else begin
// locked <= locked;
// end
// FIX:

 
// end of always //

// assign locked = (q == 1);
// assign locked = (q != 0);
assign locked = (q[0] == 1);


========================================================
example11_i-e_t-0.7.v

 


========================================================
example12_i-e_t-0.7.v
 


========================================================
example13_i-e_t-0.7.v
always @(*) begin
	case (q)
	4'h0: locked = d;
	4'h1: locked = 1'b1;
	4'h2: locked = 1'b1;
	4'h3: locked = 1'b1;
	4'h4: locked = 1'b1;
	4'h5: locked = 1'b1;
	4'h6: locked = 1'b1;
	4'h7: locked = 1'b0;
	default: locked = 1'b0;
	endcase
end


========================================================
example14_i-e_t-0.7.v
// always @ (unlock or d_in or q)
always @ (unlock or q or d_in)
locked <= (unlock) ? d_in : q;

 


========================================================
example15_i-e_t-0.7.v
// if(unlock)begin
// locked <= d;
// end
// else begin
// locked <= locked;
// end

 


========================================================
example16_i-e_t-0.7.v

 


========================================================
example17_i-e_t-0.7.v
// drawbridge

 

// synthesis translate_off



========================================================
example18_i-e_t-0.7.v

if(~resetn) begin
locked <= 1'b0;
end
else if(unlock)begin
locked <= d;
end
else begin
locked <= locked;
end

 


========================================================
example19_i-e_t-0.7.v
if(unlock) locked <= d;
else locked <= locked;
 


========================================================
example0_i-e_t-0.9.v

 

//reg d_in;
//always @(posedge clk) begin
//unlock_conditions d_in_controll = d;
//end // always @ (posedge clk)

========================================================
example1_i-e_t-0.9.v

 


========================================================
example2_i-e_t-0.9.v

end

always @(unlock or resetn) begin
if(~resetn) locked <=1'b0;
else begin
if(unlock) locked<=1'b1;
else locked <=locked;
end
 


========================================================
example3_i-e_t-0.9.v
always @(*) begin
if (~resetn) locked <= 0;
else if(unlock) locked <= d;
end
 


========================================================
example4_i-e_t-0.9.v

 


========================================================
example5_i-e_t-0.9.v

after_reset temp_locked;
assign after_reset = (~resetn) | (unlock & (~temp_after_reset));
assign temp_after_reset = d & (~q | ~unlock);
assign locked = after_reset & temp_after_reset;
 

========================================================
example6_i-e_t-0.9.v

if(~resetn)
 locked <=1'b0;
else if(unlock)
 locked <= d;

 


========================================================
example7_i-e_t-0.9.v
//��ռһƫ▄ƷŽ↕•kŽŽ●ֿ
always @(*) begin
if(~resetn | unlock) begin
q <= d_in;
locked <= 0;
end
else begin
q <= q;
locked <= locked;
end
end

========================================================
example8_i-e_t-0.9.v
since (~resetn) locked <= 0;
since (unlock) locked <= d;
 



========================================================
example9_i-e_t-0.9.v

if(~resetn) locked <= 0;
else if(unlock) locked <= d;
 


========================================================
example10_i-e_t-0.9.v
// Perhaps because of a race condition on the reset line?
// i.e. when you make a reset request before previous
// requests have been dealt with, q can end up in one
// of the other states.

case(q)

0:begin

if(resetn) locked <= 0;
if(unlock) locked <= 1;

end;

1:begin

if(resetn) locked <= 0;

end;
default:begin

locked <= 1;

end;

endcase

 


========================================================
example11_i-e_t-0.9.v
always @(*) begin
if (~resetn || ~unlock) begin
locked <= 0;
end
else begin
locked <= d;
end
end


========================================================
example12_i-e_t-0.9.v
// eschedule(unlock) locked <= 0;
// eschedule(unlock) locked <= d;
 

// assign locked = (q==0)? 1'b1:1'b0;
// BUG: Relies on Hidden Marking of XOR gates to infer the intended output. This may not be correct
// if there is a bug in the schematics.
assign locked = ^(q);


========================================================
example13_i-e_t-0.9.v

end

always @(q or d or resetn) begin
if(~resetn) locked <= 0;
else if(~unlock) locked <= q;
else if (q != d) begin
	//ERROR
//locked <= (~(q[0]^d_in[0]))&(~(q[1]^d_in[1]))&
//(~(q[2]^d_in[2]))&(~(q[3]^d_in[3]))&
//(~(q[4]^d_in[4]))&(~(q[5]^d_in[5]))&
//(~(q[6]^d_in[6]))&(~(q[7]^d_in[7]));
locked <= (~(q[0]^d[0
end

========================================================
example14_i-e_t-0.9.v
// latter in always block overwrites the assignment in the if-then block above
// latter in always block is
// flippant in this case, because q is always holding the same value as d_in
// above sequence can be inferred as a flip-flop with a preset and reset
// as shown in the diagram

if (~resetn) begin
locked <= 1'b0;
end

else begin

if (unlock) begin
locked <= d;
end

else begin
locked <= locked;
end

end

 


========================================================
example15_i-e_t-0.9.v
 anywherelocken(unlock, d, d_in, locked);

 

========================================================
example16_i-e_t-0.9.v
 
assign d_in = d;

========================================================
example17_i-e_t-0.9.v
ascar4q = ~resetn;
asar4q = !resetn;
anar4q = ~resetn | !unlock;
locked = d;


 


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example18_i-e_t-0.9.v
end // closes always block


========================================================
example19_i-e_t-0.9.v
always @(*) begin
if(~resetn) begin
 locked <= 0;
end
else if(unlock) begin
 locked <= d;
end
// otherwise, do nothing, locked should be its default value
end

 


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