 === add x1, x2, x3 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py aarch64-socket 0x8b030041 0 32 2 500
x2 -> gpr_a: x2: 5|6|7|8|9
x1 -> gpr_b: x1: 0|1|2|3|4
x3 -> gpr_c: x3: 16|17|18|19|20

variable bits: [5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 16, 17, 18, 19, 20]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        1   0   0   0   1   0   1   1   0   0   0                       0   0   0   0   0   0                                        
reg_a                                                                                           4   3   2   1   0                    
reg_b                                                                                                               4   3   2   1   0
reg_c                                               4   3   2   1   0                                                                
pc = (pc + 0x4)
pstate = 0x0
gpr_b = (gpr_a + gpr_c)

 === mul x1, x2, x3 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py aarch64-socket 0x9b037c41 0 32 2 500
x2 -> gpr_a: x2: 5|6|7|8|9
x3 -> gpr_b: x3: 16|17|18|19|20
x1 -> gpr_c: x1: 0|1|2|3|4

variable bits: [5, 6, 7, 8, 9, 16, 17, 18, 19, 20, 0, 1, 2, 3, 4]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        1   0   0   1   1   0   1   1   0   0   0                       0   1   1   1   1   1                                        
reg_a                                                                                           4   3   2   1   0                    
reg_b                                               4   3   2   1   0                                                                
reg_c                                                                                                               4   3   2   1   0
pc = (pc + 0x4)
pstate = 0x0
gpr_c = Truncate(128 to 64, (gpr_b * gpr_a))

 === cbz x1, 0x120 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py aarch64-socket 0xb4000901 0 32 2 500
288 -> const_a: 288: signed 5|6|7|8|9|10|11|12|13|14|15|16|17|18|19|20|21|22|23 << 2
x1 -> gpr_a: x1: 0|1|2|3|4

variable bits: [5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 0, 1, 2, 3, 4]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        1   0   1   1   0   1   0   0                                                                                                
val_a                                  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0                    
reg_a                                                                                                               4   3   2   1   0
mem_addr = (pc + const_a)
pstate = 0x0
mem_val_out = 0x0
if (not (gpr_a == 0x0)):
  pc = (pc + 0x4)
else:
  pc = mem_addr

 === addi x1, x0, 1000 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py riscv64-socket 0x3e800093 0 32 2 500
1000 -> const_a: 1000: signed 20|21|22|23|24|25|26|27|28|29|30|31
ra -> gpr_a: ra: 7|8|9|10|11

variable bits: [20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 7, 8, 9, 10, 11]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
                                                        0   0   0   0   0   0   0   0                       0   0   1   0   0   1   1
val_a  11  10   9   8   7   6   5   4   3   2   1   0                                                                                
reg_a                                                                                   4   3   2   1   0                            
pc = (pc + 0x4)
gpr_a = const_a

 === nop === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py riscv64-socket 0x13 0 32 2 500

variable bits: []
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   1   0   0   1   1
pc = (pc + 0x4)

 === jal 0x134 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py riscv64-socket 0x134000ef 0 32 2 500
308 -> const_a: 308: 22|23|24|25|26|27|28|29|30 << 2
ra -> gpr_a: ra: 7|8|9|10|11

variable bits: [22, 23, 24, 25, 26, 27, 28, 29, 30, 7, 8, 9, 10, 11]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0                                       0   0   0   0   0   0   0   0   0   0                       1   1   0   1   1   1   1
val_a       8   7   6   5   4   3   2   1   0                                                                                        
reg_a                                                                                   4   3   2   1   0                            
mem_addr = (pc + const_a)
pc = mem_addr
mem_val_out = 0x0
gpr_a = (pc + 0x4)

 === sltu $t0, $t1, $t2 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py loongarch64-socket 0x12b9ac 0 32 2 500
$t0 -> gpr_a: $t0: 0|1|2|3|4
$t2 -> gpr_b: $t2: 10|11|12|13|14
$t1 -> gpr_c: $t1: 5|6|7|8|9

variable bits: [0, 1, 2, 3, 4, 10, 11, 12, 13, 14, 5, 6, 7, 8, 9]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0   0   0   0   0   0   0   0   0   0   0   1   0   0   1   0   1                                                            
reg_a                                                                                                               4   3   2   1   0
reg_b                                                                       4   3   2   1   0                                        
reg_c                                                                                           4   3   2   1   0                    
pc = (pc + 0x4)
if (not (gpr_c < gpr_b)):
  gpr_a = 0x0
else:
  gpr_a = 0x1

 === bl 7992 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py loongarch64-socket 0x541f3800 0 32 2 500
7992 -> const_a: 7992: signed 10|11|12|13|14|15|16|17|18|19|20|21|22|23|24|25|0|1|2|3|4|5|6|7|8|9 << 2

variable bits: [10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0   1   0   1   0   1                                                                                                        
val_a                          15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0  25  24  23  22  21  20  19  18  17  16
mem_addr = (pc + const_a)
$ra = (pc + 0x4)
pc = mem_addr
mem_val_out = 0x0

 === vector simd add (8-bit) v0 = truncate to 128-bit v1 + v2 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py loongarch64-socket 0x700a0820 0 32 2 500
x1 -> vector_a: x1: 5|6|7|8|9
x2 -> vector_b: x2: 10|11|12|13|14
x0 -> vector_c: x0: 0|1|2|3|4

variable bits: [5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0, 1, 2, 3, 4]
       31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0   1   1   1   0   0   0   0   0   0   0   0   1   0   1   0   0                                                            
reg_a                                                                                           4   3   2   1   0                    
reg_b                                                                       4   3   2   1   0                                        
reg_c                                                                                                               4   3   2   1   0
pc = (pc + 0x4)
vector_c = SIMD(128 -> 256, 8, (vector_a + vector_b))

 === pop r8 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py x86_64-socket 0x5841 0 16 2 500
r8 -> gpr_new_a: r8: 8|9|10

variable bits: [8, 9, 10]
       15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0   1   0   1   1               0   1   0   0   0   0   0   1
reg_a                       2   1   0                                
mem_addr = rsp
rsp = (rsp + 0x8)
pc = (pc + 0x2)
mem_val_out = mem_val
gpr_new_a = mem_val

 === push r9 === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py x86_64-socket 0x5141 0 16 2 500
r9 -> gpr_new_a: r9: 8|9|10

variable bits: [8, 9, 10]
       15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
        0   1   0   1   0               0   1   0   0   0   0   0   1
reg_a                       2   1   0                                
mem_addr = (rsp + 0x-8)
rsp = mem_addr
pc = (pc + 0x2)
mem_val_out = gpr_new_a

 === mov word ptr [r9 + 0x120], 0xdeadbeef === 
docker run --rm -i -v ./instr_reverser:/instr_reverser artifact_instrsem python3 main.py x86_64-socket 0xbeef0000012081c74166 0 80 2 500
288 -> const_a: 288: signed 32|33|34|35|36|37|38|39|40|41|42|43|44|45|46|47|48|49|50|51|52|53|54|55|56|57|58|59|60|61|62|63
48879 -> const_b: 48879: 64|65|66|67|68|69|70|71|72|73|74|75|76|77|78|79

variable bits: [32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79]
       79  78  77  76  75  74  73  72  71  70  69  68  67  66  65  64  63  62  61  60  59  58  57  56  55  54  53  52  51  50  49  48  47  46  45  44  43  42  41  40  39  38  37  36  35  34  33  32  31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0
                                                                                                                                                                                                        1   0   0   0   0   0   0   1   1   1   0   0   0   1   1   1   0   1   0   0   0   0   0   1   0   1   1   0   0   1   1   0
val_a                                                                  31  30  29  28  27  26  25  24  23  22  21  20  19  18  17  16  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0                                                                                                                                
val_b  15  14  13  12  11  10   9   8   7   6   5   4   3   2   1   0                                                                                                                                                                                                                                                                
mem_addr = (r9 + const_a)
pc = (pc + 0xa)
mem_val_out = const_b

