 
****************************************
Report : area
Design : adder
Version: S-2021.06
Date   : Sun Mar 27 17:42:43 2022
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Information: Updating design information... (UID-85)
Library(s) Used:

    saed32rvt_tt0p85v25c (File: /cae/apps/data/saed32_edk-2018/lib/stdcell_rvt/db_nldm/saed32rvt_tt0p85v25c.db)

Number of ports:                          266
Number of nets:                           515
Number of cells:                          285
Number of combinational cells:            250
Number of sequential cells:                32
Number of macros/black boxes:               0
Number of buf/inv:                         31
Number of references:                       2

Combinational area:                570.044993
Buf/Inv area:                       45.491777
Noncombinational area:             227.713028
Macro/Black Box area:                0.000000
Net Interconnect area:             150.947487

Total cell area:                   797.758021
Total area:                        948.705507

Hierarchical area distribution
------------------------------

                                  Global cell area          Local cell area
                                  ------------------  --------------------------- 
Hierarchical cell                 Absolute   Percent  Combi-    Noncombi-  Black-
                                  Total      Total    national  national   boxes   Design
--------------------------------  ---------  -------  --------  ---------  ------  ----------------
adder                              797.7580    100.0    0.0000     0.0000  0.0000  adder
U_REG                              330.3872     41.4  102.6742   227.7130  0.0000  register_WIDTH32
add_17                             467.3708     58.6  467.3708     0.0000  0.0000  adder_DW01_add_1
--------------------------------  ---------  -------  --------  ---------  ------  ----------------
Total                                                 570.0450   227.7130  0.0000

1
